Hf0.5Zr0.5O2-based ferroelectric devices for digital and analog non-volatile memories

Το διηλεκτρικό υλικό HfO2 έχει χρησιμοποιηθεί εκτενώς τα τελευταία χρόνια και έχει μπει σε βιομηχανική παραγωγή από το 2007 σαν διηλεκτρικό πύλης των τρανζίστορ τεχνολογίας CMOS. Πρόσφατα βρέθηκε ότι το HfO2 είναι σιδηροηλεκτρικό υλικό, όταν κρυσταλλωθεί στη μη κεντροσυμμετρική ορθορομβική δομή. Η κραματοποίησή του με Zr ή ο εμπλουτισμός του με Si, Ge, Al, Gd και άλλες προσμίξεις σταθεροποιεί τη σιδηροηλεκτρική φάση ή τη μετατρέπει σε αντισιδηροηλεκτρική (τετραγωνική δομή). Αυτό ανοίγει νέους δρόμους για πολλές εφαρμογές, συμπεριλαμβανομένων των ενσωματωμένων σιδηροηλεκτρικών μη πτητικών μνημών, αφού το HfO2 και το ZrO2 είναι συμβατά με την τεχνολογία πυριτίου. Στο πλαίσιο της παρούσας διατριβής διερευνήθηκαν οι βέλτιστες συνθήκες σύνθεσης Hf1-xZrxO2 (HZO) για την επίτευξη σιδηροηλεκτρικού υλικού. Δομές πυκνωτών μέταλλο-σιδηροηλεκτρικό-ημιαγωγός (MFS) TiN/HZO/Ge παρασκευάστηκαν με τη μέθοδο της εναπόθεσης με μοριακές δέσμες υποβοηθούμενης από πλάσμα ατομικού οξυγόνου/αζώτου σε θάλαμο υπερυψηλού κενού στο εργαστήριο Μοριακής Επιταξίας και Επιστήμης των Επιφανειών του ΕΚΕΦΕ-Δημόκριτος. Ο δομικός χαρακτηρισμός των πυκνωτών επιβεβαιώνει την επικράτηση της ορθορομβικής/σιδηροηλεκτρικής φάσης του ΗΖΟ και τις καθαρές ΗΖΟ/Ge διεπιφάνειες, οδηγώντας σε καλά σιδηροηλεκτρικά χαρακτηριστικά. Στη συνέχεια, μελετήθηκε η περιοχή απογύμνωσης φορέων στην επιφάνεια του ημιαγωγού Ge, η οποία σχηματίζεται σε χαμηλότερες θερμοκρασίες, και η επίδρασή της στα σιδηροηλεκτρικά χαρακτηριστικά του HZO. Από μετρήσεις της πόλωσης, του ρεύματος μετατόπισης και της χωρητικότητας πυκνωτών σε υποστρώματα γερμανίου p, n και n+ τύπου υπολογίστηκε το πεδίο αποπόλωσης συναρτήσει της θερμοκρασίας. Δύο βασικά φαινόμενα που παίζουν ρόλο στην αξιοπιστία των σιδηροηλεκτρικών διατάξεων είναι η αφύπνιση («wake-up»), δηλαδή η διεύρυνση/βελτίωση του βρόχου P-V εφαρμόζοντας μια σειρά ηλεκτρικών κύκλων, και η αποτύπωση (imprint) της πόλωσης, η οποία είναι η μερική σταθεροποίηση της μίας εκ των δύο πιθανών σιδηροηλεκτρικών καταστάσεων με την πάροδο του χρόνου. Από ηλεκτρικές μετρήσεις της πόλωσης με χρονική και θερμοκρασιακή εξάρτηση, προέκυψαν συμπεράσματα για το μηχανισμό του φαινομένου. Η παραπάνω μελέτη οδήγησε στην παρασκευή σιδηροηλεκτρικών τρανζίστορ επίδρασης πεδίου (FeFETs) με δομή πύλης TiN/HZO σε p-τύπου κανάλι Ge. Αντικαθιστώντας το διηλεκτρικό πύλης των συμβατικών τρανζίστορ με σιδηροηλεκτρικό, παρατηρήθηκε η αναμενόμενη μετατόπιση της χαρακτηριστικής καμπύλης Ids-Vg με την αλλαγή της πόλωσης, εμφανίζοντας ένα παράθυρο μνήμης MW = 0.55 V. Χάρη στη δυνατότητα μερικής στρέψης της πόλωσης στο ΗΖΟ, τα FeFETs εκτός από τις δύο ακραίες καταστάσεις ON και OFF, παρουσιάζουν και ενδιάμεσες καταστάσεις. Αυτό το φαινόμενο τα καθιστά κατάλληλα για εφαρμογή σε αναλογικές μη-πτητικές μνήμες, και χάρη στο μικρό πάχος οξειδίου (15 nm), λειτουργούν με χαμηλή τάση/ισχύ. Τέλος, παρουσιάζονται κάποια αρχικά αποτελέσματα σε πυκνωτές με 5 nm ΗΖΟ σε υποστρώματα ημιαγωγού Nb:SrTiO3 (NSTO) και μεταλλικό TiN ή W ως πάνω ηλεκτρόδιο, τα οποία δείχνουν λειτουργία σύναψης. Η ένταση ρεύματος των πυκνωτών μεταβάλλεται αναλόγως με την κατάσταση πόλωσης του σιδηροηλεκτρικού, κάνοντάς το να λειτουργεί σαν αναλογική μνήμη. Από μετρήσεις ρεύματος σε διάφορες θερμοκρασίες και την ανάλυσή τους, η αγωγιμότητα αποδίδεται σε θερμιονική εκπομπή Schottky και η μεταβολή του ρεύματος στη μεταβολή της αντίστασης στην επιφάνεια του ημιαγωγού, λόγω μεταβολής του φράγματος δυναμικού. Οι διατάξεις παρουσιάζουν πλαστικότητα σύναψης και είναι κατάλληλες για εφαρμογές σε νευρομορφικά δίκτυα.The dielectric material HfO2 has been extensively used in recent years and has entered industrial production since 2007 as a gate dielectric of CMOS technology transistors. HfO2 has recently been found to be ferroelectric when it is crystallized at the non-centrosymmetric orthorhombic phase. Alloying it with Zr or doping it with Si, Ge, Al, Gd and other elements stabilizes the ferroelectric phase or turns it into antiferroelectric (tetragonal phase). This opens new opportunities for many applications, including integrated ferroelectric non-volatile memories, since HfO2 and ZrO2 are compatible with silicon technology. In the present dissertation, the optimal fabrication conditions of Hf1-xZrxO2 (HZO) to achieve a ferroelectric material were investigated. TiN/HZO/Ge metal-ferroelectric-semiconductor (MFS) capacitor structures were prepared by atomic oxygen/nitrogen plasma-assisted molecular beam deposition in an ultrahigh vacuum chamber at the Laboratory of Molecular Epitaxy and Surface Science of NCSR-Demokritos. Physical characterization of the capacitors confirms the predominance of the orthorhombic/ferroelectric phase of HZO and the clean HZO/Ge interfaces, leading to good ferroelectric characteristics. Subsequently, the depletion region in the surface of the Ge semiconductor, formed at lower temperatures, and its effect on the ferroelectric characteristics of HZO were studied. From measurements of polarization, displacement current and capacitor capacitance on p, n and n+ type germanium substrates the depolarization field as a function of temperature was calculated. Two main issues in the reliability of ferroelectric devices are “wake-up”, that is the broadening/improvement of the P-V loop by applying a series of electrical cycles, and polarization imprint, which is the partial stabilization of one of the two possible ferroelectric states over time. From time and temperature depended electrical measurements of the polarization, conclusions about the mechanism of the phenomenon were drawn. The above study led to the fabrication of ferroelectric field-effect transistors (FeFETs) with TiN/HZO gate structure on a p-type Ge channel. By replacing the gate dielectric of conventional transistors with a ferroelectric material, the expected shift of the Ids-Vg characteristic curve with the polarization switching was observed, showing a memory window of MW = 0.55 V. Due to the possibility of partial polarization switching in HZO, FeFETs in addition to the ON and OFF states, also present intermediate states. This phenomenon makes them suitable for application in analog non-volatile memories, and due to the low oxide thickness (15 nm), they operate at low voltage/power. Finally, some first results on capacitors with 5 nm HZO on Nb:SrTiO3 (NSTO) semiconductor substrates and metallic TiN or W as top electrode are presented, which show synaptic performance. The current of the capacitors is modulated by the polarization state in the ferroelectric, making it work as an analog memory. From current measurements at various temperatures and their analysis, the conductivity is attributed to thermionic Schottky emission and the change in current to the change in resistance in the surface of the semiconductor, due to modulation of the potential barrier. The devices show synaptic plasticity and are suitable for applications in neuromorphic networks

Review and perspective on ferroelectric HfO₂-based thin films for memory applications

The ferroelectricity in fluorite-structure oxides such as hafnia and zirconia has attracted increasing interest since 2011. They have various advantages such as Si-based complementary metal oxide semiconductor-compatibility, matured deposition techniques, a low dielectric constant and the resulting decreased depolarization field, and stronger resistance to hydrogen annealing. However, the wake-up effect, imprint, and insufficient endurance are remaining reliability issues. Therefore, this paper reviews two major aspects: the advantages of fluorite-structure ferroelectrics for memory applications are reviewed from a material’s point of view, and the critical issues of wake-up effect and insufficient endurance are examined, and potential solutions are subsequently discussed

Roadmap on ferroelectric hafnia- and zirconia-based materials and devices

Ferroelectric hafnium and zirconium oxides have undergone rapid scientific development over the last decade, pushing them to the forefront of ultralow-power electronic systems. Maximizing the potential application in memory devices or supercapacitors of these materials requires a combined effort by the scientific community to address technical limitations, which still hinder their application. Besides their favorable intrinsic material properties, HfO2–ZrO2 materials face challenges regarding their endurance, retention, wake-up effect, and high switching voltages. In this Roadmap, we intend to combine the expertise of chemistry, physics, material, and device engineers from leading experts in the ferroelectrics research community to set the direction of travel for these binary ferroelectric oxides. Here, we present a comprehensive overview of the current state of the art and offer readers an informed perspective of where this field is heading, what challenges need to be addressed, and possible applications and prospects for further development

Through Silicon Via Field-Effect Transistor with Hafnia-based Ferroelectrics and the Doping of Silicon by Gallium Implantation Utilizing a Focused Ion Beam System

3-dimensional integration has become a standard to further increase the transistor density and to enhance the integrated functionality in microchips. Integrated circuits are stacked on top of each other and copper-filled through-silicon VIAs (TSVs) are the industry-accepted choice for their vertical electrical connection. The aim of this work is to functionalize the TSVs by implementing vertical field-effect transistors inside the via holes. The front and back sides of 200 ... 300 µm thin silicon wafers were doped to create the source/drain regions of n- and p-FETs. The TSVFETs showed very stable saturation currents and on/off current ratios of about 10^6 (n-TSVFET) and 10^3 (p-TSVFET) for a gate voltage magnitude of 4V. The use of hafnium zirconium oxide on a thin SiO_2 interface layer as gate dielectric material in a p-TSVFET, enabled the implementation of a charge trapping memory inside the TSVs, showing a memory window of about 1V. This allows the non-volatile storage of the transistor on/off state. In addition, the demonstration of the use of gallium as the source/drain dopant in planar p-FET test structures (ion implanted from a focused ion beam tool) paves the way for maskless doping and for a process flow with a low thermal budget. It was shown, that ion implanted gallium can be activated and annealed at relatively low temperatures of 500 °C ... 700 °C.:Abstract / Kurzzusammenfassung Danksagung Index I List of Figures III List of Tables X List of Symbols XI List of Abbreviations XV 1 Introduction 1 2 Fundamentals 5 2.1 Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) 5 2.1.1 Historical Development - Technological Advancements 7 2.1.2 Field-Effect Transistors in Semiconductor Memories 10 2.2 3D Integration and the Use of TSVs (Through Silicon VIAs) 16 2.3 Doping of Silicon 19 2.3.1 Doping by Thermal Diffusion 20 2.3.2 Doping by Ion Implantation 22 3 Electrical Characterization 24 3.1 Resistivity Measurements 24 3.1.1 Resistance Determination by Four-Point Probes Measurement 24 3.1.2 Contact Resistivity 27 3.1.3 Doping Concentration 32 3.2 C-V Measurements 35 3.2.1 Fundamentals of MIS C-V Measurements 35 3.2.2 Interpretation of C-V Measurements 37 3.3 Transistor Measurements 41 3.3.1 Output Characteristics (I_D-V_D) 41 3.3.2 Transfer Characteristics (I_D-V_G) 42 4 TSV Transistor 45 4.1 Idea and Motivation 45 4.2 Design and Layout of the TSV Transistor 47 4.2.1 Design of the TSV Transistor Structures 47 4.2.2 Test Structures for Planar FETs 48 5 Variations in the Integration Scheme of the TSV Transistor 51 5.1 Doping by Diffusion from Thin Films 51 5.1.1 Determination of Doping Profiles 52 5.1.2 n- and p- TSVFETs Doped Manufactures by the Use of the Diffusion Technique 59 5.2 Ferroelectric Hafnium-Zirconium-Oxide (HZO) in the Gate Stack 81 5.2.1 Planar ferroelectric p-MOSFETs Doped by Thermal Diffusion 82 5.2.2 p-TSVFETs with Hafnium-Zirconium-Oxide Metal Gate 90 5.3 Doping by Ion Implantation of Gallium with a Focused Ion Beam (FIB) Tool 96 5.3.1 Ga doped Si Diodes 97 5.3.2 Planar p-MOSFETs Doped by Ga Implantation 108 5.3.3 Proposal for a parallel integration of Cu TSVs and p-TSVFETs 117 6 Summary and Outlook 120 Bibliography XVIII A Appendix XXXVI A.1 Resistivity and Dopant Density XXXVI A.2 Mask set for the TSVFET XXXVII A.3 Mask Design of the Planar Test Structures XXXVIII Curriculum Vitae XXXIX List of Scientific Publications XL

Optimization of performance and reliability of HZO-based capacitors for ferroelectric memory applications

In an era in which the amount of produced and stored data continues to exponentially grow, standard memory concepts start showing size, power consumption and costs limitation which make the search for alternative device concepts essential. Within a context where new technologies such as DRAM, magnetic RAM, resistive RAM, phase change memories and eFlash are explored and optimized, ferroelectric memory devices like FeRAM seem to showcase a whole range of properties which could satisfy market needs, offering the possibility of creating a non-volatile RAM. In fact, hafnia and zirconia-based ferroelectric materials opened up a new scenario in the memory technology scene, overcoming the dimension scaling limitations and the integration difficulties presented by their predecessors perovskite ferroelectrics. In particular, HfₓZr₁₋ₓO₂ stands out because of high processing flexibility and ease of integration in the standard semiconductor industry process flows for CMOS fabrication. Nonetheless, further understanding is necessary in order tocorrelate device performance and reliability to the establishment of ferroelectricity itself. The aim of this work is to investigate how the composition of the ferroelectric oxide, together with the one of the electrode materials influence the behavior of a ferroelectric RAM. With this goal, different process parameters and reliability properties are considered and an analysis of the polarization reversal is performed. Starting from undoped hafnia and zirconia and subsequently examining their intermixed system, it is shown how surface/volume energy contributions, mechanical stress and oxygen-related defects all concur in the formation of the ferroelectric phase. Based on the process optimization of an HfₓZr₁₋ₓO₂-based capacitor performed within these pages, a 64 kbit 1T1C FeRAM array is demonstrated by Sony Semiconductor Solutions Corporation which shows write voltage and latency as low as 2.0 V and 16 ns, respectively. Outstanding retention and endurance performances are also predicted, which make the addressed device an extremely strong competitor in the semiconductor scene

Reliability of HfO2-Based Ferroelectric FETs: A Critical Review of Current and Future Challenges

Ferroelectric transistors (FeFETs) based on doped hafnium oxide (HfO2) have received much attention due to their technological potential in terms of scalability, highspeed, and low-power operation. Unfortunately, however, HfO2-FeFETs also suffer from persistent reliability challenges, specifically affecting retention, endurance, and variability. A deep understanding of the reliability physics of HfO2-FeFETs is an essential prerequisite for the successful commercialization of this promising technology. In this article, we review the literature about the relevant reliability aspects of HfO2-FeFETs. We initially focus on the reliability physics of ferroelectric capacitors, as a prelude to a comprehensive analysis of FeFET reliability. Then, we interpret key reliability metrics of the FeFET at the device level (i.e., retention, endurance, and variability) based on the physical mechanisms previously identified. Finally, we discuss the implications of device-level reliability metrics at both the circuit and system levels. Our integrative approach connects apparently unrelated reliability issues and suggests mitigation strategies at the device, circuit, or system level. We conclude this article by proposing a set of research opportunities to guide future development in this field

Integration of Ferroelectric HfO2 onto a III-V Nanowire Platform

The discovery of ferroelectricity in CMOS-compatible oxides, such as doped hafnium oxide, has opened new possibilities for electronics by reviving the use of ferroelectric implementations on modern technology platforms. This thesis presents the ground-up integration of ferroelectric HfO2 on a thermally sensitive III-V nanowire platform leading to the successful implementation of ferroelectric transistors (FeFETs), tunnel junctions (FTJs), and varactors for mm-wave applications. As ferroelectric HfO2 on III-V semiconductors is a nascent technology, a special emphasis is put on the fundamental integration issues and the various engineering challenges facing the technology.The fabrication of metal-oxide-semiconductor (MOS) capacitors is treated as well as the measurement methods developed to investigate the interfacial quality to the narrow bandgap III-V materials using both electrical and operando synchrotron light source techniques. After optimizing both the films and the top electrode, the gate stack is integrated onto vertical InAs nanowires on Si in order to successfully implement FeFETs. Their performance and reliability can be explained from the deeper physical understanding obtained from the capacitor structures.By introducing an InAs/(In)GaAsSb/GaSb heterostructure in the nanowire, a ferroelectric tunnel field effect transistor (ferro-TFET) is fabricated. Based on the ultra-short effective channel created by the band-to-band tunneling process, the localized potential variations induced by single ultra-scaled ferroelectric domains and individual defects are sensed and investigated. By intentionally introducing a gate-source overlap in the ferro-TFET, a non-volatile reconfigurable single-transistor solution for modulating an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing is implemented.Finally, by fabricating scaled ferroelectric MOS capacitors in the front-end with a dedicated and adopted RF and mm-wave backend-of-line (BEOL) implementation, the ferroelectric behavior is captured at RF and mm-wave frequencies