41,011 research outputs found

    A Modular Programmable CMOS Analog Fuzzy Controller Chip

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    We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital programmability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely label blocks and rule blocks. The architecture realizes a lattice partition of the universe of discourse, which at the hardware level means that the fuzzy labels associated to every input (realized by the label blocks) are shared among the rule blocks. This reduces the area and power consumption and is the key point for chip modularity. The proposed architecture is demonstrated through a 16-rule two input CMOS 1-μm prototype which features an operation speed of 2.5 Mflips (2.5×10^6 fuzzy inferences per second) with 8.6 mW power consumption. Core area occupation of this prototype is of only 1.6 mm 2 including the digital control and memory circuitry used for programmability. Because of the architecture modularity the number of inputs and rules can be increased with any hardly design effort.This work was supported in part by the Spanish C.I.C.Y.T under Contract TIC96-1392-C02- 02 (SIVA)

    Design and control of parallel three phase voltage source Inverters in low voltage AC microgrid

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    Design and hierarchical control of three phase parallel Voltage Source Inverters are developed in this paper. The control scheme is based on synchronous reference frame and consists of primary and secondary control levels. The primary control consists of the droop control and the virtual output impedance loops. This control level is designed to share the active and reactive power correctly between the connected VSIs in order to avoid the undesired circulating current and overload of the connected VSIs. The secondary control is designed to clear the magnitude and the frequency deviations caused by the primary control. The control structure is validated through dynamics simulations.The obtained results demonstrate the effectiveness of the control structure

    Low Power system Design techniques for mobile computers

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    Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low power design and techniques to exploit them on the architecture of the system. We focus on: min imizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system, including error control, sys tem decomposition, communication and MAC protocols, and low power short range net works

    Intensity-based image registration using multiple distributed agents

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    Image registration is the process of geometrically aligning images taken from different sensors, viewpoints or instances in time. It plays a key role in the detection of defects or anomalies for automated visual inspection. A multiagent distributed blackboard system has been developed for intensity-based image registration. The images are divided into segments and allocated to agents on separate processors, allowing parallel computation of a similarity metric that measures the degree of likeness between reference and sensed images after the application of a transform. The need for a dedicated control module is removed by coordination of agents via the blackboard. Tests show that additional agents increase speed, provided the communication capacity of the blackboard is not saturated. The success of the approach in achieving registration, despite significant misalignment of the original images, is demonstrated in the detection of manufacturing defects on screen-printed plastic bottles and printed circuit boards

    Multi-agent systems for power engineering applications - part 2 : Technologies, standards and tools for building multi-agent systems

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    This is the second part of a 2-part paper that has arisen from the work of the IEEE Power Engineering Society's Multi-Agent Systems (MAS) Working Group. Part 1 of the paper examined the potential value of MAS technology to the power industry, described fundamental concepts and approaches within the field of multi-agent systems that are appropriate to power engineering applications, and presented a comprehensive review of the power engineering applications for which MAS are being investigated. It also defined the technical issues which must be addressed in order to accelerate and facilitate the uptake of the technology within the power and energy sector. Part 2 of the paper explores the decisions inherent in engineering multi-agent systems for applications in the power and energy sector and offers guidance and recommendations on how MAS can be designed and implemented. Given the significant and growing interest in this field, it is imperative that the power engineering community considers the standards, tools, supporting technologies and design methodologies available to those wishing to implement a MAS solution for a power engineering problem. The paper describes the various options available and makes recommendations on best practice. It also describes the problem of interoperability between different multi-agent systems and proposes how this may be tackled

    Coordinated Control of Energy Storage in Networked Microgrids under Unpredicted Load Demands

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    In this paper a nonlinear control design for power balancing in networked microgrids using energy storage devices is presented. Each microgrid is considered to be interfaced to the distribution feeder though a solid-state transformer (SST). The internal duty cycle based controllers of each SST ensures stable regulation of power commands during normal operation. But problem arises when a sudden change in load or generation occurs in any microgrid in a completely unpredicted way in between the time instants at which the SSTs receive their power setpoints. In such a case, the energy storage unit in that microgrid must produce or absorb the deficit power. The challenge lies in designing a suitable regulator for this purpose owing to the nonlinearity of the battery model and its coupling with the nonlinear SST dynamics. We design an input-output linearization based controller, and show that it guarantees closed-loop stability via a cascade connection with the SST model. The design is also extended to the case when multiple SSTs must coordinate their individual storage controllers to assist a given SST whose storage capacity is insufficient to serve the unpredicted load. The design is verified using the IEEE 34-bus distribution system with nine SST-driven microgrids.Comment: 8 pages, 10 figure

    A review of personal communications services

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    This article can be accessed from the link below - Copyright @ 2009 Nova Science Publishers, LtdPCS is an acronym for Personal Communications Service. PCS has two layers of meaning. At the low layer, from the technical perspective, PCS is a 2G mobile communication technology operating at the 1900 MHz frequency range. At the upper layer, PCS is often used as an umbrella term that includes various wireless access and personal mobility services with the ultimate goal of enabling users to freely communicate with anyone at anytime and anywhere according to their demand. Ubiquitous PCS can be implemented by integrating the wireless and wireline systems on the basis of intelligent network (IN), which provides network functions of terminal and personal mobility. In this chapter, we focus on various aspects of PCS except location management. First we describe the motivation and technological evolution for personal communications. Then we introduce three key issues related to PCS: spectrum allocation, mobility, and standardization efforts. Since PCS involves several different communication technologies, we introduce its heterogeneous and distributed system architecture. IN is also described in detail because it plays a critical role in the development of PCS. Finally, we introduce the application of PCS and its deployment status since the mid-term of 1990’s.This work was supported in part by the National Natural Science Foundation of China under Grant No. 60673159 and 70671020; the National High-Tech Research and Development Plan of China under Grant No. 2006AA01Z214, and the Engineering and Physical Sciences Research Council (EPSRC) of UK under Grant EP/E060722/1

    Design techniques for low-power systems

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    Portable products are being used increasingly. Because these systems are battery powered, reducing power consumption is vital. In this report we give the properties of low-power design and techniques to exploit them on the architecture of the system. We focus on: minimizing capacitance, avoiding unnecessary and wasteful activity, and reducing voltage and frequency. We review energy reduction techniques in the architecture and design of a hand-held computer and the wireless communication system including error control, system decomposition, communication and MAC protocols, and low-power short range networks

    Performance study of voice over frame relay : a thesis presented in partial fulfilment of the requirements for the degree of Master of Engineering in Information Engineering, Massey University, Albany, New Zealand

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    Frame Relay (FR) represents an important paradigm shift in modern telecommunication. This technology is beginning to evolve from data only application to broad spectrum of multimedia users and potential to provide end users with cost effective transport of voice traffic for intra office communication. In this project the recent development in voice communication over Frame relay is investigated. Simulations were carried out using OPNET, a powerful simulation software. Following the simulation model, a practical design of the LAN-to-LAN connectivity experiment was also done in the Net Lab. From the results of the simulation, Performance measures such as delay, jitter, and throughput are reported. It is evident from the results that real-time voice or video across a frame relay network can provide acceptable performance
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