Electronic impairment mitigation in optically multiplexed multicarrier systems

In order to improve the performance of optically multiplexed multicarrier systems with channel spacing equal to the symbol rate per carrier, we propose and systematically investigate an electronic signal processing technique to achieve near-interchannel crosstalk free and intersymbol-interference (ISI) free operation. We theoretically show that achieving perfect orthogonality between channels in these systems, together with ISI free operation as needed in generic communication systems, requires the shaping of the spectral profiles of not only the demultiplexing filter, but also the signal of each channel before demultiplexing. We develop a novel semianalytical method to quantitatively analyze the levels of residual crosstalk and ISI arising from nonideal system response in these systems. We show that by prefiltering the signal to ensure that the system impulse response before channel demultiplexing approaches the targeted condition, the residual crosstalk due to imperfect orthogonality can be significantly mitigated and the necessity for carrier phase control in single-quadrature format-based system can be relaxed. Further combining prefiltering and receiver-side postfiltering to adaptively trim the demultiplexing filter enhances the performance. The use of the combined digital signal processing (DSP) in coherent-detection quadrature phase-shifted keying (QPSK)-based optically multiplexed multicarrier system shows that this method outperforms conventional QPSK-based multicarrier system without DSP or with only receiver-side DSP, especially when the responses of the transmitter and the demultiplexing filter are not precisely designed and the sampling rate of the analogue-to-digital converter is not sufficiently high. In addition, the inclusion of ISI free operation, with this aspect similar to the reshaping method in conventional wavelength-division-multiplexing systems, allows the relaxation of the modulation bandwidth and chromatic dispersion compensation

Evaluation Of Multicarrier Air Interfaces In The Presence Of Interference For L-Band And C-Band Air-Ground Communications

The use of aeronautical vehicles and systems is continuously growing, and this means current aeronautical communication systems, particularly those operating in the very high frequency (VHF) aviation band, will suffer from severe congestion in some regions of the world. For example, it is estimated that air-to-ground (AG) communication traffic density will at least double by 2035 over that in 2012, based on the most-likely growth scenario for Europe. This traffic growth (worldwide) has led civil aviation authorities such as the FAA in the USA, and EuroControl in Europe, to jointly explore development of future communication infrastructures (FCI). According to international aviation systems policies, both current and future AG communication systems will be deployed in L-band (960-1164 MHz), and possibly in C-band (5030-5091 GHz) because of the favorable AG radio propagation characteristics in these bands. During the same time period as the FCI studies, the use of multicarrier communication technologies has become very mature for terrestrial communication systems, but for AG systems it is still being studied and tested. Aiming toward future demands, EuroControl and FAA sponsored work to define several new candidate AG radio systems with high data rate and high reliability. Dominant among these is now an L-Band Digital Aeronautical Communication Systems (L-DACS): L-DACS1. L-DACS1 is a multicarrier communication system based on the popular orthogonal frequency division multiplexing (OFDM) modulation technique. For airport surface area communication systems used in C-band, EuroControl and FAA also proposed another OFDM communication system based on the IEEE 802.16e standard, termed aeronautical mobile airport communication system (AeroMACS). This system has been proposed to provide the growing need of communication traffic in airport environments. In this dissertation, first we review existing and proposed aviation communication systems in VHF-band, L-band and C-band. We then focus our study on the use of multicarrier techniques in these aviation bands. We compare the popular and dominant multicarrier technique OFDM (which is used in cellular networks such long-term evolution (LTE) and wireless local area networks such as Wi-Fi) with the filterbank multicarrier (FBMC) technique. As far as we are aware, we are the first to propose and evaluate FBMC for aviation communication systems. We show, using analysis and computer simulations, along with measurement based (NASA) air-ground and airport surface channel models, that FBMC offers advantages in performance over the OFDM schemes. Via use of sharp filters in the frequency domain, FBMC reduces out of band interference. Specifically, it is more robust to high-power distance measurement equipment (DME) interference, and via replacement of guard bands with data-bearing subcarriers, FBMC can offer higher throughput than the contending L-DACS1 scheme, by up to 23%. Similar advantages over AeroMACS pertain in the airport surface channel. Our FBMC bit error ratio performance is comparable to that of the OFDM schemes, and is even better for our “spectrally-shaped” version of FBMC. For these improvements, FBMC requires a modest complexity increase. Our final contribution in this dissertation is the presentation of spectrally shaped FBMC (SS-FBMC). This idea allocates unequal power to subcarriers to contend with non-white noise or non-white interference. Our adaptive algorithm selects a minimum number of guard subcarriers and then allocates power accordingly to remaining subcarriers based on a “water-filling-like” approach. We are the first to propose such a cognitive radio technique with FBMC for aviation applications. Results show that SSFBMC improves over FBMC in both performance and throughput

Digital enhancement techniques for data converters in scaled CMOS technologies

This thesis presents digital enhancement techniques for data converters in advanced technology nodes. With technology scaling, traditional voltage-domain (VD) analog-to-digital converters (ADCs) face two major challenges: (1) reduction of dynamic range due to supply voltage scaling, and (2) decrease in intrinsic gain of transistors which makes high gain amplifier design tough. To address these challenges, a two-stage ADC architecture is presented which uses time-domain quantization to exploit the advantages of technology scaling. The architecture, consisting of a first stage successive approximation register (SAR) and a second stage ring oscillator, is highly digital and scaling friendly. Two prototypes have been developed to validate the proposed architecture. The 40nm CMOS prototype achieves 75.7 dB dynamic range at an excellent Schreier figure-of-merit of 172.2 dB. The proposed architecture has been extended to a capacitance-to-digital converter and a prototype has been developed in 40nm CMOS. The prototype can sense capacitances with a resolution of 1.3fF and has a Walden figure-of-merit of 60 fJ/step which is more than two times better than the current state-of-the-art. This thesis also presents digital techniques to improve performance of continuous-time(CT), delta-sigma digital-to-analog converters (DACs). Recently, CT delta-sigma DACs have received more attention than their discrete, switched-capacitor counterpart mainly because of low power and/or higher speed of operation. However, a critical disadvantage of CT, delta-sigma DACs is their greatly increased sensitivity to inter-symbol interference (ISI) error. To address this shortcoming of CT DACs, this thesis presents several algorithms that can mitigate ISI error simultaneously with static mismatch error. Further, the proposed algorithms are fully digital in nature and as such, are best poised to take maximum advantage of technology scaling. Thus, the techniques presented in this thesis will be important enabling factors in raising the envelope of performance of CT delta-sigma DACs in advanced technology nodes.Electrical and Computer Engineerin

High-speed PAM4-based Optical SDM Interconnects with Directly Modulated Long-wavelength VCSEL

This paper reports the demonstration of high-speed PAM-4 transmission using a 1.5-{\mu}m single-mode vertical cavity surface emitting laser (SM-VCSEL) over multicore fiber with 7 cores over different distances. We have successfully generated up to 70 Gbaud 4-level pulse amplitude modulation (PAM-4) signals with a VCSEL in optical back-to-back, and transmitted 50 Gbaud PAM-4 signals over both 1-km dispersion-uncompensated and 10-km dispersion-compensated in each core, enabling a total data throughput of 700 Gbps over the 7-core fiber. Moreover, 56 Gbaud PAM-4 over 1-km has also been shown, whereby unfortunately not all cores provide the required 3.8 $\times$ 10 $^{-3}$ bit error rate (BER) for the 7% overhead-hard decision forward error correction (7% OH HDFEC). The limited bandwidth of the VCSEL and the adverse chromatic dispersion of the fiber are suppressed with pre-equalization based on accurate end-to-end channel characterizations. With a digital post-equalization, BER performance below the 7% OH-HDFEC limit is achieved over all cores. The demonstrated results show a great potential to realize high-capacity and compact short-reach optical interconnects for data centers.Comment: 7 pages, accepted to publication in 'Journal of Lightwave Technology (JLT

Design and implementation of a wideband sigma delta ADC

Abstract. High-speed and wideband ADCs have become increasingly important in response to the growing demand for high-speed wireless communication services. Continuous time sigma delta modulators (CTƩ∆M), well-known for their oversampling and noise shaping properties, offer a promising solution for low-power and high-speed design in wireless applications. The objective of this thesis is to design and implement a wideband CTƩ∆M for a global navigation satellite system(GNSS) receiver. The targeted modulator architecture is a 3rdorder single-bit CTƩ∆M, specifically designed to operate within a 15 MHz signal bandwidth. With an oversampling ratio of 25, the ADC’s sampling frequency is set at 768 MHz. The design goal is to achieve a theoretical signal to noise ratio (SNR) of 55 dB. This thesis focuses on the design and implementation of the CTƩ∆M, building upon the principles of a discrete time Ʃ∆ modulator, and leveraging system-level simulation and formulations. A detailed explanation of the coefficient calculation procedure specific to CTƩ∆ modulators is provided, along with a "top-down" design approach that ensures the specified requirements are met. MATLAB scripts for coefficient calculation are also included. To overcome the challenges associated with the implementation of CTƩ∆ modulators, particularly excess loop delay and clock jitter sensitivity, this thesis explores two key strategies: the introduction of a delay compensation path and the utilization of a finite impulse response (FIR) feedback DAC. By incorporating a delay compensation path, the stability of the modulator can be ensured and its noise transfer function (NTF) can be restored. Additionally, the integration of an FIR feedback DAC addresses the issue of clock jitter sensitivity, enhancing the overall performance and robustness of the CTƩ∆M. The CTƩ∆Ms employ the cascade of integrators with feed forward (CIFF) and cascade of integrators with feedforward and feedback (CIFF-B) topologies, with a particular emphasis on the CIFF-B configuration using 22nm CMOS technology node and a supply voltage of 0.8 V. Various simulations are performed to validate the modulator’s performance. The simulation results demonstrate an achievable SNR of 55 dB with a power consumption of 1.36 mW. Furthermore, the adoption of NTF zero optimization techniques enhances the SNR to 62 dB.Laajakaistaisen jatkuva-aikaisen sigma delta-AD-muuntimen suunnittelu ja toteutus. Tiivistelmä. Nopeat ja laajakaistaiset AD-muuntimet ovat tulleet entistä tärkeämmiksi nopeiden langattomien kommunikaatiopalvelujen kysynnän kasvaessa. Jatkuva-aikaiset sigma delta -modulaattorit (CTƩ∆M), joissa käytetään ylinäytteistystä ja kohinanmuokkausta, tarjoavat lupaavan ratkaisun matalan tehonkulutuksen ja nopeiden langattomien sovellusten suunnitteluun. Tämän työn tarkoituksena on suunnitella ja toteuttaa laajakaistainen jatkuva -aikainen sigma delta -modulaattori satelliittipaikannusjärjestelmien (GNSS) vastaanottimeen. Arkkitehtuuriltaan modulaattori on kolmannen asteen 1-bittinen CTƩ∆M, jolla on 15MHz:n signaalikaistanleveys. Ylinäytteistyssuhde on 25 ja AD muuntimen näytteistystaajuus 768 MHz. Tavoitteena on saavuttaa teoreettinen 55 dB signaalikohinasuhde (SNR). Tämä työ keskittyy jatkuva-aikaisen sigma delta -modulaattorin suunnitteluun ja toteutukseen, perustuen diskreettiaikaisen Ʃ∆-modulaattorin periaatteisiin ja systeemitason simulointiin ja mallitukseen. Jatkuva-aikaisen sigma delta -modulaattorin kertoimien laskentamenetelmä esitetään yksityiskohtaisesti, ja vaatimusten täyttyminen varmistetaan “top-down” -suunnitteluperiaatteella. Liitteenä on kertoimien laskemiseen käytetty MATLAB-koodi. Jatkuva-aikaisten sigma delta -modulaattoreiden erityishaasteiden, liian pitkän silmukkaviiveen ja kellojitterin herkkyyden, voittamiseksi tutkitaan kahta strategiaa, viiveen kompensointipolkua ja FIR takaisinkytkentä -DA muunninta. Viivekompensointipolkua käyttämällä modulaattorin stabiilisuus ja kohinansuodatusfunktio saadaan varmistettua ja korjattua. Lisäksi FIR takaisinkytkentä -DA-muuntimen käyttö pienentää kellojitteriherkkyyttä, parantaen jatkuva aikaisen sigma delta -modulaattorin kokonaissuorituskykyä ja luotettavuutta. Toteutetuissa jatkuva-aikaisissa sigma delta -modulaattoreissa on kytketty peräkkäin integraattoreita myötäkytkentärakenteella (CIFF) ja toisessa sekä myötä- että takaisinkytkentärakenteella (CIFF-B). Päähuomio on CIFF-B rakenteessa, joka toteutetaan 22nm CMOS prosessissa käyttäen 0.8 voltin käyttöjännitettä. Suorityskyky varmistetaan erilaisilla simuloinneilla, joiden perusteella 55 dB SNR saavutetaan 1.36 mW tehonkulutuksella. Lisäksi kohinanmuokkausfunktion optimoinnilla SNR saadaan nostettua 62 desibeliin

A CMOS Digital Beamforming Receiver

As the demand for high speed communication is increasing, emerging wireless techniques seek to utilize unoccupied frequency ranges, such as the mm-wave range. Due to high path loss for higher carrier frequencies, beamforming is an essential technology for mm-wave communication. Compared to analog beamforming, digital beamforming provides multiple simultaneous beams without an SNR penalty, is more accurate, enables faster steering, and provides full access to each element. Despite these advantages, digital beamforming has been limited by high power consumption, large die area, and the need for large numbers of analog-to-digital converters. Furthermore, beam squinting errors and ADC non-linearity limit the use of large digital beamforming arrays. We address these limitations. First, we address the power and area challenge by combining Interleaved Bit Stream Processing (IL-BSP) with power and area efficient Continuous-Time Band-Pass Delta-Sigma Modulators (CTBPDSMs). Compared to conventional DSP, IL-BSP reduces both power and area by 80%. Furthermore, the new CTBPDSM architecture reduces ADC area by 67% and the energy per conversion by 43% compared to previous work. Second, we introduce the first integrated digital true-time-delay digital beamforming receiver to resolve the beam squinting. True-time-delay beamforming eliminates squinting, making it an ideal choice for large-array wide-bandwidth applications. Third, we present a new current-steering DAC architecture that provides a constant output impedance to improve ADC linearity. This significantly reduces distortion, leading to an SFDR improvement of 13.7 dB from the array. Finally, we provide analysis to show that the ADC power consumption of a digital beamformer is comparable to that of the ADC power for an analog beamformer. To summarize, we present a prototype phased array and a prototype timed array, both with 16 elements, 4 independent beams, a 1 GHz center frequency, and a 100 MHz bandwidth. Both the phased array and timed array achieve nearly ideal conventional and adaptive beam patterns, including beam tapering and adaptive nulling. With an 11.2 dB array gain, the phased array achieves a 58.5 dB SNDR over a 100 MHz bandwidth, while consuming 312 mW and occupying 0.22 mm2. The timed array achieves an EVM better than -37 dB for 5 MBd QAM-256 and QAM-512, occupies only 0.29 mm2, and consumes 453 mW.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147716/1/smjang_1.pd

Demonstration and evaluation of an optimized RFS comb for terabit flexible optical networks

We experimentally demonstrate and evaluate an optimization strategy of a recirculating frequency shifting (RFS) optical comb for terabit flexible optical networks. We achieve an increased optical signal-to-noise ratio (OSNR) with good stability (no system outage) by reducing erbium-doped-fiber amplifier gain in the shifting loop and deploying an in-loop noise suppression filter. We demonstrate that this source can support 20×200  Gb/s dual polarization Nyquist-16QAM transmission. With optimization, the RFS comb has greater and more uniform OSNR per channel. Flexible optical networks with software-defined networking are particularly suited to this enhanced RFS due to 1) programmable frequency spacing, 2) dense, stable spacing enabling very high spectral efficiency, 3) uniform performance across channels, and 4) sufficient OSNR for high-order modulation. The RFS can be used in short links when using low overhead forward error correction (FEC). Distances as great as 1150 km are achieved when using a 20% FEC overhead. Long-distance tests at 4 Tb/s result in a post-FEC net rate of 3.3 Tb/s and 6.3 bit/s/Hz of spectral efficiency

Design and Analysis of Binary Driven Coherent M-ary Qam Transmitter for Next Generation Optical Networks

This work presents a design for a binary driven optical square M-ary quadrature amplitude modulation (QAM) transmitter for high speed optical networks. The transmitter applies tandem quadrature phase shift keying (QPSK) modulators to eliminate the need for linear broadband amplifiers and high-resolution digital to analog converters (DACs), which are both required by conventional transmitters. The transmitter design could be scaled to any order of square M-ary QAM by simply adding more QPSK modulators in tandem. It also provides a Gray coded symbol constellation, insuring the lowest bit error rate possible during symbol recovery. We also provide the design for the coupling ratios of the optical couplers that take into account the insertion loss of the optical components, in order to generate a proper 16-QAM and 64-QAM symbol constellation with equally-spaced symbols. Additionally, we analyze the impact of coupling ratio errors as well as phase errors on the bit error rate (BER) performance and constellation diagrams. The performance is tested using the OptiSystem simulation at 50 Gbaud and under presence of additive white Gaussian noise (AWGN), which demonstrated high quality symbol constellation and a BER performance similar to theoretical expectations. For 16-QAM, a BER better than 10-4 and power penalty of about 2 dB are achieved for coupling ratio errors less than 10 %, or phase errors within ±7 degrees. The 64-QAM transmitter, on the other hand, demonstrated a BER better than 10-4 and power penalty of about 1 dB for coupling ratio errors less than 4%, or phase errors within ±2 degrees. Adviser: Lim Nguye