Computing Shortest Paths in the Plane with Removable Obstacles

We consider the problem of computing a Euclidean shortest path in the presence of removable obstacles in the plane. In particular, we have a collection of pairwise-disjoint polygonal obstacles, each of which may be removed at some cost c_i > 0. Given a cost budget C > 0, and a pair of points s, t, which obstacles should be removed to minimize the path length from s to t in the remaining workspace? We show that this problem is NP-hard even if the obstacles are vertical line segments. Our main result is a fully-polynomial time approximation scheme (FPTAS) for the case of convex polygons. Specifically, we compute an (1 + epsilon)-approximate shortest path in time O({nh}/{epsilon^2} log n log n/epsilon) with removal cost at most (1+epsilon)C, where h is the number of obstacles, n is the total number of obstacle vertices, and epsilon in (0, 1) is a user-specified parameter. Our approximation scheme also solves a shortest path problem for a stochastic model of obstacles, where each obstacle\u27s presence is an independent event with a known probability. Finally, we also present a data structure that can answer s-t path queries in polylogarithmic time, for any pair of points s, t in the plane

The Steiner Ratio for the Obstacle-Avoiding Steiner Tree Problem

This thesis examines the (geometric) Steiner tree problem: Given a set of points P in the plane, find a shortest tree interconnecting all points in P, with the possibility of adding points outside P, called the Steiner points, as additional vertices of the tree. The Steiner tree problem has been studied in different metric spaces. In this thesis, we study the problem in Euclidean and rectilinear metrics. One of the most natural heuristics for the Steiner tree problem is to use a minimum spanning tree, which can be found in O(nlogn) time . The performance ratio of this heuristic is given by the Steiner ratio, which is defined as the minimum possible ratio between the lengths of a minimum Steiner tree and a minimum spanning tree. We survey the background literature on the Steiner ratio and study the generalization of the Steiner ratio to the case of obstacles. We introduce the concept of an anchored Steiner tree: an obstacle-avoiding Steiner tree in which the Steiner points are only allowed at obstacle corners. We define the obstacle-avoiding Steiner ratio as the ratio of the length of an obstacle-avoiding minimum Steiner tree to that of an anchored obstacle-avoiding minimum Steiner tree. We prove that, for the rectilinear metric, the obstacle-avoiding Steiner ratio is equal to the traditional (obstacle-free) Steiner ratio. We conjecture that this is also the case for the Euclidean metric and we prove this conjecture for three points and any number of obstacles

Shortest Paths and Steiner Trees in VLSI Routing

Routing is one of the major steps in very-large-scale integration (VLSI) design. Its task is to find disjoint wire connections between sets of points on a chip, subject to numerous constraints. This problem is solved in a two-stage approach, which consists of so-called global and detailed routing steps. For each set of metal components to be connected, global routing reduces the search space by computing corridors in which detailed routing sequentially determines the desired connections as shortest paths. In this thesis, we present new theoretical results on Steiner trees and shortest paths, the two main mathematical concepts in routing. In the practical part, we give computational results of BonnRoute, a VLSI routing tool developed at the Research Institute for Discrete Mathematics at the University of Bonn. Interconnect signal delays are becoming increasingly important in modern chip designs. Therefore, the length of paths or direct delay measures should be taken into account when constructing rectilinear Steiner trees. We consider the problem of finding a rectilinear Steiner minimum tree (RSMT) that --- as a secondary objective --- minimizes a signal delay related objective. Given a source we derive some structural properties of RSMTs for which the weighted sum of path lengths from the source to the other terminals is minimized. Also, we present an exact algorithm for constructing RSMTs with weighted sum of path lengths as secondary objective, and a heuristic for various secondary objectives. Computational results for industrial designs are presented. We further consider the problem of finding a shortest rectilinear Steiner tree in the plane in the presence of rectilinear obstacles. The Steiner tree is allowed to run over obstacles; however, if it intersects an obstacle, then no connected component of the induced subtree must be longer than a given fixed length. This kind of length restriction is motivated by its application in VLSI routing where a large Steiner tree requires the insertion of repeaters which must not be placed on top of obstacles. We show that there are optimal length-restricted Steiner trees with a special structure. In particular, we prove that a certain graph (called augmented Hanan grid) always contains an optimal solution. Based on this structural result, we give an approximation scheme for the special case that all obstacles are of rectangular shape or are represented by at most a constant number of edges. Turning to the shortest paths problem, we present a new generic framework for Dijkstra's algorithm for finding shortest paths in digraphs with non-negative integral edge lengths. Instead of labeling individual vertices, we label subgraphs which partition the given graph. Much better running times can be achieved if the number of involved subgraphs is small compared to the order of the original graph and the shortest path problems restricted to these subgraphs is computationally easy. As an application we consider the VLSI routing problem, where we need to find millions of shortest paths in partial grid graphs with billions of vertices. Here, the algorithm can be applied twice, once in a coarse abstraction (where the labeled subgraphs are rectangles), and once in a detailed model (where the labeled subgraphs are intervals). Using the result of the first algorithm to speed up the second one via goal-oriented techniques leads to considerably reduced running time. We illustrate this with the routing program BonnRoute on leading-edge industrial chips. Finally, we present computational results of BonnRoute obtained on real-world VLSI chips. BonnRoute fulfills all requirements of modern VLSI routing and has been used by IBM and its customers over many years to produce more than one thousand different chips. To demonstrate the strength of BonnRoute as a state-of-the-art industrial routing tool, we show that it performs excellently on all traditional quality measures such as wire length and number of vias, but also on further criteria of equal importance in the every-day work of the designer

Obstacle-avoiding rectilinear Steiner tree.

Li, Liang.Thesis (M.Phil.)--Chinese University of Hong Kong, 2009.Includes bibliographical references (leaves 57-61).Abstract also in Chinese.Abstract --- p.iAcknowledgement --- p.ivChapter 1 --- Introduction --- p.1Chapter 1.1 --- Background --- p.1Chapter 1.1.1 --- Partitioning --- p.1Chapter 1.1.2 --- Floorplanning and Placement --- p.2Chapter 1.1.3 --- Routing --- p.2Chapter 1.1.4 --- Compaction --- p.3Chapter 1.2 --- Motivations --- p.3Chapter 1.3 --- Problem Formulation --- p.4Chapter 1.3.1 --- Properties of OARSMT --- p.4Chapter 1.4 --- Progress on the Problem --- p.4Chapter 1.5 --- Contributions --- p.5Chapter 1.6 --- Thesis Organization --- p.6Chapter 2 --- Literature Review on OARSMT --- p.8Chapter 2.1 --- Introduction --- p.8Chapter 2.2 --- Previous Methods --- p.9Chapter 2.2.1 --- OARSMT --- p.9Chapter 2.2.2 --- Shortest Path Problem with Blockages --- p.13Chapter 2.2.3 --- OARSMT with Delay Minimization --- p.14Chapter 2.2.4 --- OARSMT with Worst Negative Slack Maximization --- p.14Chapter 2.3 --- Comparison --- p.15Chapter 3 --- Heuristic Method --- p.17Chapter 3.1 --- Introduction --- p.17Chapter 3.2 --- Our Approach --- p.18Chapter 3.2.1 --- Handling of Multi-pin Nets --- p.18Chapter 3.2.2 --- Propagation --- p.20Chapter 3.2.3 --- Backtrack --- p.23Chapter 3.2.4 --- Finding MST --- p.26Chapter 3.2.5 --- Local Refinement Scheme --- p.26Chapter 3.3 --- Experimental Results --- p.28Chapter 3.4 --- Summary --- p.28Chapter 4 --- Exact Method --- p.32Chapter 4.1 --- Introduction --- p.32Chapter 4.2 --- Review on GeoSteiner --- p.33Chapter 4.3 --- Overview of our Approach --- p.33Chapter 4.4 --- FST with Virtual Pins --- p.34Chapter 4.4.1 --- Definition of FST --- p.34Chapter 4.4.2 --- Notations --- p.36Chapter 4.4.3 --- Properties of FST with Virtual Pins --- p.36Chapter 4.5 --- Generation of FST with Virtual Pins --- p.46Chapter 4.5.1 --- Generation of FST with Two Pins --- p.46Chapter 4.5.2 --- Generation of FST with 3 or More Pins --- p.48Chapter 4.6 --- Concatenation of FSTs with Virtual Pins --- p.50Chapter 4.7 --- Experimental Results --- p.52Chapter 4.8 --- Summary --- p.53Chapter 5 --- Conclusion --- p.55Bibliography --- p.6

Geometric-based Optimization Algorithms for Cable Routing and Branching in Cluttered Environments

The need for designing lighter and more compact systems often leaves limited space for planning routes for the connectors that enable interactions among the system’s components. Finding optimal routes for these connectors in a densely populated environment left behind at the detail design stage has been a challenging problem for decades. A variety of deterministic as well as heuristic methods has been developed to address different instances of this problem. While the focus of the deterministic methods is primarily on the optimality of the final solution, the heuristics offer acceptable solutions, especially for such problems, in a reasonable amount of time without guaranteeing to find optimal solutions. This study is an attempt to furthering the efforts in deterministic optimization methods to tackle the routing problem in two and three dimensions by focusing on the optimality of final solutions. The objective of this research is twofold. First, a mathematical framework is proposed for the optimization of the layout of wiring connectors in planar cluttered environments. The problem looks at finding the optimal tree network that spans multiple components to be connected with the aim of minimizing the overall length of the connectors while maximizing their common length (for maintainability and traceability of connectors). The optimization problem is formulated as a bi-objective problem and two solution methods are proposed: (1) to solve for the optimal locations of a known number of breakouts (where the connectors branch out) using mixed-binary optimization and visibility notion and (2) to find the minimum length tree that spans multiple components of the system and generates the optimal layout using the previously-developed convex hull based routing. The computational performance of these methods in solving a variety of problems is further evaluated. Second, the problem of finding the shortest route connecting two given nodes in a 3D cluttered environment is considered and addressed through deterministically generating a graphical representation of the collision-free space and searching for the shortest path on the found graph. The method is tested on sample workspaces with scattered convex polyhedra and its computational performance is evaluated. The work demonstrates the NP-hardness aspect of the problem which becomes quickly intractable as added components or increase in facets are considered

Initial detailed routing algorithms

In this work, we present a study of the problem of routing in the context of the VLSI physical synthesis flow. We study the fundamental routing algorithms such as maze routing, A*, and Steiner tree-based algorithms, as well as some global routing algorithms, namely FastRoute 4.0 and BoxRouter 2.0. We dissect some of the major state of the art initial detailed routing tools, such as RegularRoute, TritonRoute, SmartDR and Dr.CU 2.0. We also propose an initial detailed routing flow, and present an implementation of the proposed routing flow, with a track assignment technique that models the problem as an instance of the maximum independent weighted set (MWIS) and utilizes integer linear programming (ILP) as a solver. The implementation of the proposed initial detailed routing flow also includes an implementation of multiple-source and multiple-target A* for terminal andnet connection with adjustable rules and weights. Finally, we also present a study of the results obtained by the implementation of the proposed initial detailed routing flow and a comparison with the ISPD 2019 contest winners, considering the ISPD 2019 and benchmark suite and evaluation tools.Neste trabalho, apresentamos um estudo do problema de roteamento no contexto do fluxo de síntese física de circuitos integrados VLSI. Nós estudamos algoritmos de roteamento fundamentais como roteamento de labirinto, A* e baseados em árvores de Steiner, além de alguns algoritmos de roteamento global como FastRoute 4.0 e BoxRouter 2.0. Nós dissecamos alguns dos principais trabalhos de roteamento detalhado inicial do estado da arte, como RegularRoute, TritonRoute, SmartDR e Dr.CU 2.0. Também propomos um fluxo de roteamento detalhado inicial, e apresentamos uma implementação do fluxo de roteametno proposto, com uma técnica de assinalamento de trilhas que modela o problema como uma instância do problema do conjunto independente de peso máximo e usa programação linear inteira como um resolvedor. A implementação do fluxo de rotemaento detalhado inicial proposto também inclui uma implementação de um A* com múltiplas fontes e múltiplos destinos para conexão de terminais e redes, com regras e pesos ajustáveis. Por fim, nós apresentamos um estudo dos resultados obtidos pela implementação do fluxo de roteamento detalhado inicial proposto e comparamos com os vencedores do ISPD 2019 contest considerando a suíte de teste e ferramentas de avaliação do ISPD 2019

Transportation networks inspired by leaf venation algorithms

Copyright IoP publishingBiological systems have adapted to environmental constraints and limited resource availability. In the present study, we evaluate the algorithm underlying leaf venation (LV) deployment using graph theory. We compare the traffic balance, travel and cost efficiency of simply-connected LV networks to those of the fan tree and of the spanning tree. We use a Pareto front to show that the total length of leaf venations is close to optimal. Then we apply the LV algorithm to design transportation networks in the city of Atlanta. Results show that leaf-inspired models can perform similarly or better than computer-intensive optimization algorithms in terms of network cost and service performance, which could facilitate the design of engineering transportation networks