A common operator for FFT and FEC decoding

International audienceIn the Software Radio context, the parametrization is becoming an important topic especially when it comes to multistandard designs. This paper capitalizes on the Common Operator technique to present new common structures for the FFT and FEC decoding algorithms. A key benefit of exhibiting common operators is the regular architecture it brings when implemented in a Common Operator Bank (COB). This regularity makes the architecture open to future function mapping and adapted to accommodated silicon technology variability through dependable design

AutoAccel: Automated Accelerator Generation and Optimization with Composable, Parallel and Pipeline Architecture

CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. These architectures provide programmers with the ability to reprogram the FPGAs for flexible acceleration of many workloads. Nonetheless, this advantage is often overshadowed by the poor programmability of FPGAs whose programming is conventionally a RTL design practice. Although recent advances in high-level synthesis (HLS) significantly improve the FPGA programmability, it still leaves programmers facing the challenge of identifying the optimal design configuration in a tremendous design space. This paper aims to address this challenge and pave the path from software programs towards high-quality FPGA accelerators. Specifically, we first propose the composable, parallel and pipeline (CPP) microarchitecture as a template of accelerator designs. Such a well-defined template is able to support efficient accelerator designs for a broad class of computation kernels, and more importantly, drastically reduce the design space. Also, we introduce an analytical model to capture the performance and resource trade-offs among different design configurations of the CPP microarchitecture, which lays the foundation for fast design space exploration. On top of the CPP microarchitecture and its analytical model, we develop the AutoAccel framework to make the entire accelerator generation automated. AutoAccel accepts a software program as an input and performs a series of code transformations based on the result of the analytical-model-based design space exploration to construct the desired CPP microarchitecture. Our experiments show that the AutoAccel-generated accelerators outperform their corresponding software implementations by an average of 72x for a broad class of computation kernels

THE APPLICATION OF REAL-TIME SOFTWARE IN THE IMPLEMENTATION OF LOW-COST SATELLITE RETURN LINKS

Digital Signal Processors (DSPs) have evolved to a level where it is feasible for digital modems with relatively low data rates to be implemented entirely with software algorithms. With current technology it is still necessary for analogue processing between the RF input and a low frequency IF but, as DSP technology advances, it will become possible to shift the interface between analogue and digital domains ever closer towards the RF input. The software radio concept is a long-term goal which aims to realise software-based digital modems which are completely flexible in terms of operating frequency, bandwidth, modulation format and source coding. The ideal software radio cannot be realised until DSP, Analogue to Digital (A/D) and Digital to Analogue (D/A) technology has advanced sufficiently. Until these advances have been made, it is often necessary to sacrifice optimum performance in order to achieve real-time operation. This Thesis investigates practical real-time algorithms for carrier frequency synchronisation, symbol timing synchronisation, modulation, demodulation and FEC. Included in this work are novel software-based transceivers for continuous-mode transmission, burst-mode transmission, frequency modulation, phase modulation and orthogonal frequency division multiplexing (OFDM). Ideal applications for this work combine the requirement for flexible baseband signal processing and a relatively low data rate. Suitable applications for this work were identified in low-cost satellite return links, and specifically in asymmetric satellite Internet delivery systems. These systems employ a high-speed (>>2Mbps) DVB channel from service provider to customer and a low-cost, low-speed (32-128 kbps) return channel. This Thesis also discusses asymmetric satellite Internet delivery systems, practical considerations for their implementation and the techniques that are required to map TCP/IP traffic to low-cost satellite return links

Cognitive Radio Programming: Existing Solutions and Open Issues

Software defined radio (sdr) technology has evolved rapidly and is now reaching market maturity, providing solutions for cognitive radio applications. Still, a lot of issues have yet to be studied. In this paper, we highlight the constraints imposed by recent radio protocols and we present current architectures and solutions for programming sdr. We also list the challenges to overcome in order to reach mastery of future cognitive radios systems.La radio logicielle a évolué rapidement pour atteindre la maturité nécessaire pour être mise sur le marché, offrant de nouvelles solutions pour les applications de radio cognitive. Cependant, beaucoup de problèmes restent à étudier. Dans ce papier, nous présentons les contraintes imposées par les nouveaux protocoles radios, les architectures matérielles existantes ainsi que les solutions pour les programmer. De plus, nous listons les difficultés à surmonter pour maitriser les futurs systèmes de radio cognitive

Equalização digital para sistemas de transmissão ópticos coerentes

This thesis focus on the digital equalization of fiber impairments for coherent optical transmission systems. New efficient and low-complexity equalization and mitigation techniques that counteract fiber nonlinear impairments are proposed and the tradeoff between performance and complexity is numerically assessed and experimentally demonstrated in metro and long-haul 400G superchannels-based transmission systems. Digital backpropagation (DBP) based on low-complexity split-step Fourier method and Volterra series nonlinear equalizers are experimentally assessed in an uniform superchannel system. In contrast with standard DBP methods, these techniques prove to be able to be implemented with larger step-sizes, consequently requiring a reduced number of multiplications, and still achieve a significant reach extension over linear equalization techniques. Moreover, given its structure, the complexity of the proposed Volterra-based DBP approach can be easily adjusted by changing the nonlinear filter dimension according to the system requirements, thus providing a higher flexibility to the nonlinear equalization block. A frequency-hybrid superchannel envisioning near-future flexible networks is then proposed as a way to increase the system bit-rate granularity. The problematic of the power-ratio between superchannel carriers is addressed and optimized for linear and nonlinear operation regimes using three distinct FEC paradigms. Applying a single FEC to the entire superchannel has a simpler implementation and is found to be a more robust approach, tolerating larger uncertainties on the system parameters optimization. We also investigate the performance gain provided by the application of different DBP techniques in frequency-hybrid superchannel systems, and its implications on the optimum power-ratio. It is shown that the application of DBP can be restricted to the carrier transporting the higher cardinality QAM format, since the DBP benefit on the other carriers is negligible, which might bring a substantially complexity reduction of the DBP technique applied to the superchannel.A presente tese foca-se na equalização digital das distorções da fibra para sistemas óticos de transmissão coerente. São propostas novas técnicas eficientes e de baixa complexidade para a equalização e mitigação das distorções não lineares da fibra, e o compromisso entre desempenho e complexidade é testado numericamente e demonstrado experimental em sistemas de transmissão metro e longa distância baseados em supercanais 400G. A propagação digital inversa baseada no método de split-step Fourier e equalizadores não lineares de séries de Volterra de baixa complexidade são testadas experimentalmente num sistema baseado em supercanais uniformes. Ao contrário dos métodos convencionais utilizados, estas técnicas podem ser implementadas utilizando menos interações e ainda extender o alcance do sistema face às técnicas de equalização linear. Para além disso, a complexidade do método baseado em Volterra pode ser facilmente ajustada alterando a dimensão do filtro não linear de acordo com os requisitos do sistema, concedendo assim maior flexibilidade ao bloco de equalização não linear. Tendo em vista as futuras redes flexı́veis, um supercanal hı́brido na frequência é proposto de modo a aumentar a granularidade da taxa de transmissão do sistema. A problemática da relação de potência entre as portadoras do supercanal é abordada e optimizada em regimes de operação linear e não linear utilizando paradigmas diferentes de códigos correctores de erros. A aplicação de um único código corrector de erros à totalidade do supercanal mostra ser a abordagem mais robusta, tolerando maiores incertezas na optimização dos parâmetros do sistema. O ganho de desempenho dado pela aplicação de diferentes técnicas de propagação digital inversa em sistemas de supercanais hı́bridos na frequência é tamém analizado, assim como as suas implicações na relação óptima de potência. Mostra-se que esta pode ser restringida à portadora que transporta o formato de modulação de ordem mais elevada, uma vez que o benefı́cio trazido pelas restantes portadotas é negligenciável, permitindo reduzir significativamente a complexidade do algoritmo aplicado.Programa Doutoral em Telecomunicaçõe

mm-Wave Data Transmission and Measurement Techniques: A Holistic Approach

The ever-increasing demand on data services places unprecedented technical requirements on networks capacity. With wireless systems having significant roles in broadband delivery, innovative approaches to their development are imperative. By leveraging new spectral resources available at millimeter-wave (mm-wave) frequencies, future systems can utilize new signal structures and new system architectures in order to achieve long-term sustainable solutions.This thesis proposes the holistic development of efficient and cost-effective techniques and systems which make high-speed data transmission at mm-wave feasible. In this paradigm, system designs, signal processing, and measurement techniques work toward a single goal; to achieve satisfactory system level key performance indicators (KPIs). Two intimately-related objectives are simultaneously addressed: the realization of efficient mm-wave data transmission and the development of measurement techniques to enable and assist the design and evaluation of mm-wave circuits.The standard approach to increase spectral efficiency is to increase the modulation order at the cost of higher transmission power. To improve upon this, a signal structure called spectrally efficient frequency division multiplexing (SEFDM) is utilized. SEFDM adds an additional dimension of continuously tunable spectral efficiency enhancement. Two new variants of SEFDM are implemented and experimentally demonstrated, where both variants are shown to outperform standard signals.A low-cost low-complexity mm-wave transmitter architecture is proposed and experimentally demonstrated. A simple phase retarder predistorter and a frequency multiplier are utilized to successfully generate spectrally efficient mm-wave signals while simultaneously mitigating various issues found in conventional mm-wave systems.A measurement technique to characterize circuits and components under antenna array mutual coupling effects is proposed and demonstrated. With minimal setup requirement, the technique effectively and conveniently maps prescribed transmission scenarios to the measurement environment and offers evaluations of the components in terms of relevant KPIs in addition to conventional metrics.Finally, a technique to estimate transmission and reflection coefficients is proposed and demonstrated. In one variant, the technique enables the coefficients to be estimated using wideband modulated signals, suitable for implementation in measurements performed under real usage scenarios. In another variant, the technique enhances the precision of noisy S-parameter measurements, suitable for characterizations of wideband mm-wave components

Synthesis of multi-cycle circuits from guarded atomic actions

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.Cataloged from PDF version of thesis.Includes bibliographical references (p. 143-147).One solution to the timing closure problem is to perform infrequent operations in more than one clock cycle. Despite the apparent simplicity of the solution statement, it is not easily considered because it requires changes in RTL, which in turn exacerbates the verification problem. Another approach to the problem is to avoid it altogether, by using a high-level design methodology and allow the synthesis tool to generate the design that matches design requirements. This approach hinges on the ability of the tool to be able to generate satisfactory RTL from the high-level description, an ability which often cannot be tested until late in the project. Failure to meet the requirements can result in costly delays as an alternative way of expressing the design intent is sought and experimented with. We offer a timing closure solution that does not suffer from these problems. We have selected atomic actions as the high-level design methodology. We exploit the fact that semantics of atomic actions are untimed, that is, the time to execute an action does not change its outcome. The current hardware synthesis technique from atomic actions assumes that each action takes one clock cycle to complete its computation. Consequently, the action with the longest combinational path determines the clock cycle of the entire design, often leading to needlessly slow circuits. By augmenting the description of the actions with desired timing information, we allow the designer to split long paths over multiple clock cycles without giving up the semantics of atomicity. We also introduce loops with dynamic bounds into the atomic action description. These loops are not unrolled for synthesis, but the guards are evaluated for each iteration. Our synthesis results show that the clock speed and performance of circuits can be improved substantially with our technique, without having to substantially change the design.by Michal Karczmarek.Ph.D