1,099 research outputs found

    제쑰 μ‹œμŠ€ν…œμ—μ„œμ˜ 예츑 λͺ¨λΈλ§μ„ μœ„ν•œ 지λŠ₯적 데이터 νšλ“

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    ν•™μœ„λ…Όλ¬Έ (박사) -- μ„œμšΈλŒ€ν•™κ΅ λŒ€ν•™μ› : κ³΅κ³ΌλŒ€ν•™ 산업곡학과, 2021. 2. μ‘°μ„±μ€€.Predictive modeling is a type of supervised learning to find the functional relationship between the input variables and the output variable. Predictive modeling is used in various aspects in manufacturing systems, such as automation of visual inspection, prediction of faulty products, and result estimation of expensive inspection. To build a high-performance predictive model, it is essential to secure high quality data. However, in manufacturing systems, it is practically impossible to acquire enough data of all kinds that are needed for the predictive modeling. There are three main difficulties in the data acquisition in manufacturing systems. First, labeled data always comes with a cost. In many problems, labeling must be done by experienced engineers, which is costly. Second, due to the inspection cost, not all inspections can be performed on all products. Because of time and monetary constraints in the manufacturing system, it is impossible to obtain all the desired inspection results. Third, changes in the manufacturing environment make data acquisition difficult. A change in the manufacturing environment causes a change in the distribution of generated data, making it impossible to obtain enough consistent data. Then, the model have to be trained with a small amount of data. In this dissertation, we overcome this difficulties in data acquisition through active learning, active feature-value acquisition, and domain adaptation. First, we propose an active learning framework to solve the high labeling cost of the wafer map pattern classification. This makes it possible to achieve higher performance with a lower labeling cost. Moreover, the cost efficiency is further improved by incorporating the cluster-level annotation into active learning. For the inspection cost for fault prediction problem, we propose a active inspection framework. By selecting products to undergo high-cost inspection with the novel uncertainty estimation method, high performance can be obtained with low inspection cost. To solve the recipe transition problem that frequently occurs in faulty wafer prediction in semiconductor manufacturing, a domain adaptation methods are used. Through sequential application of unsupervised domain adaptation and semi-supervised domain adaptation, performance degradation due to recipe transition is minimized. Through experiments on real-world data, it was demonstrated that the proposed methodologies can overcome the data acquisition problems in the manufacturing systems and improve the performance of the predictive models.예츑 λͺ¨λΈλ§μ€ 지도 ν•™μŠ΅μ˜ μΌμ’…μœΌλ‘œ, ν•™μŠ΅ 데이터λ₯Ό 톡해 μž…λ ₯ λ³€μˆ˜μ™€ 좜λ ₯ λ³€μˆ˜ κ°„μ˜ ν•¨μˆ˜μ  관계λ₯Ό μ°ΎλŠ” 과정이닀. 이런 예츑 λͺ¨λΈλ§μ€ μœ‘μ•ˆ 검사 μžλ™ν™”, λΆˆλŸ‰ μ œν’ˆ 사전 탐지, κ³ λΉ„μš© 검사 κ²°κ³Ό μΆ”μ • λ“± 제쑰 μ‹œμŠ€ν…œ μ „λ°˜μ— 걸쳐 ν™œμš©λœλ‹€. 높은 μ„±λŠ₯의 예츑 λͺ¨λΈμ„ λ‹¬μ„±ν•˜κΈ° μœ„ν•΄μ„œλŠ” μ–‘μ§ˆμ˜ 데이터가 ν•„μˆ˜μ μ΄λ‹€. ν•˜μ§€λ§Œ 제쑰 μ‹œμŠ€ν…œμ—μ„œ μ›ν•˜λŠ” μ’…λ₯˜μ˜ 데이터λ₯Ό μ›ν•˜λŠ” 만큼 νšλ“ν•˜λŠ” 것은 ν˜„μ‹€μ μœΌλ‘œ 거의 λΆˆκ°€λŠ₯ν•˜λ‹€. 데이터 νšλ“μ˜ 어렀움은 크게 세가지 원인에 μ˜ν•΄ λ°œμƒν•œλ‹€. 첫번째둜, 라벨링이 된 λ°μ΄ν„°λŠ” 항상 λΉ„μš©μ„ μˆ˜λ°˜ν•œλ‹€λŠ” 점이닀. λ§Žμ€ λ¬Έμ œμ—μ„œ, 라벨링은 μˆ™λ ¨λœ μ—”μ§€λ‹ˆμ–΄μ— μ˜ν•΄ μˆ˜ν–‰λ˜μ–΄μ•Ό ν•˜κ³ , μ΄λŠ” 큰 λΉ„μš©μ„ λ°œμƒμ‹œν‚¨λ‹€. λ‘λ²ˆμ§Έλ‘œ, 검사 λΉ„μš© λ•Œλ¬Έμ— λͺ¨λ“  검사가 λͺ¨λ“  μ œν’ˆμ— λŒ€ν•΄ μˆ˜ν–‰λ  수 μ—†λ‹€. 제쑰 μ‹œμŠ€ν…œμ—λŠ” μ‹œκ°„μ , κΈˆμ „μ  μ œμ•½μ΄ μ‘΄μž¬ν•˜κΈ° λ•Œλ¬Έμ—, μ›ν•˜λŠ” λͺ¨λ“  검사 결과값을 νšλ“ν•˜λŠ” 것이 μ–΄λ ΅λ‹€. μ„Έλ²ˆμ§Έλ‘œ, 제쑰 ν™˜κ²½μ˜ λ³€ν™”κ°€ 데이터 νšλ“μ„ μ–΄λ ΅κ²Œ λ§Œλ“ λ‹€. 제쑰 ν™˜κ²½μ˜ λ³€ν™”λŠ” μƒμ„±λ˜λŠ” λ°μ΄ν„°μ˜ 뢄포λ₯Ό λ³€ν˜•μ‹œμΌœ, 일관성 μžˆλŠ” 데이터λ₯Ό μΆ©λΆ„νžˆ νšλ“ν•˜μ§€ λͺ»ν•˜κ²Œ ν•œλ‹€. 이둜 인해 적은 μ–‘μ˜ λ°μ΄ν„°λ§ŒμœΌλ‘œ λͺ¨λΈμ„ μž¬ν•™μŠ΅μ‹œμΌœμ•Ό ν•˜λŠ” 상황이 λΉˆλ²ˆν•˜κ²Œ λ°œμƒν•œλ‹€. λ³Έ λ…Όλ¬Έμ—μ„œλŠ” 이런 데이터 νšλ“μ˜ 어렀움을 κ·Ήλ³΅ν•˜κΈ° μœ„ν•΄ λŠ₯동 ν•™μŠ΅, λŠ₯동 피쳐값 νšλ“, 도메인 적응 방법을 ν™œμš©ν•œλ‹€. λ¨Όμ €, 웨이퍼 맡 νŒ¨ν„΄ λΆ„λ₯˜ 문제의 높은 라벨링 λΉ„μš©μ„ ν•΄κ²°ν•˜κΈ° μœ„ν•΄ λŠ₯λ™ν•™μŠ΅ ν”„λ ˆμž„μ›Œν¬λ₯Ό μ œμ•ˆν•œλ‹€. 이λ₯Ό 톡해 적은 라벨링 λΉ„μš©μœΌλ‘œ 높은 μ„±λŠ₯의 λΆ„λ₯˜ λͺ¨λΈμ„ ꡬ좕할 수 μžˆλ‹€. λ‚˜μ•„κ°€, ꡰ집 λ‹¨μœ„μ˜ 라벨링 방법을 λŠ₯λ™ν•™μŠ΅μ— μ ‘λͺ©ν•˜μ—¬ λΉ„μš© νš¨μœ¨μ„±μ„ ν•œμ°¨λ‘€ 더 κ°œμ„ ν•œλ‹€. μ œν’ˆ λΆˆλŸ‰ μ˜ˆμΈ‘μ— ν™œμš©λ˜λŠ” 검사 λΉ„μš© 문제λ₯Ό ν•΄κ²°ν•˜κΈ° μœ„ν•΄μ„œλŠ” λŠ₯동 검사 방법을 μ œμ•ˆν•œλ‹€. μ œμ•ˆν•˜λŠ” μƒˆλ‘œμš΄ λΆˆν™•μ‹€μ„± μΆ”μ • 방법을 톡해 κ³ λΉ„μš© 검사 λŒ€μƒ μ œν’ˆμ„ μ„ νƒν•¨μœΌλ‘œμ¨ 적은 검사 λΉ„μš©μœΌλ‘œ 높은 μ„±λŠ₯을 얻을 수 μžˆλ‹€. λ°˜λ„μ²΄ 제쑰의 웨이퍼 λΆˆλŸ‰ μ˜ˆμΈ‘μ—μ„œ λΉˆλ²ˆν•˜κ²Œ λ°œμƒν•˜λŠ” λ ˆμ‹œν”Ό λ³€κ²½ 문제λ₯Ό ν•΄κ²°ν•˜κΈ° μœ„ν•΄μ„œλŠ” 도메인 적응 방법을 ν™œμš©ν•œλ‹€. 비ꡐ사 도메인 적응과 λ°˜κ΅μ‚¬ 도메인 μ μ‘μ˜ 순차적인 μ μš©μ„ 톡해 λ ˆμ‹œν”Ό 변경에 μ˜ν•œ μ„±λŠ₯ μ €ν•˜λ₯Ό μ΅œμ†Œν™”ν•œλ‹€. λ³Έ λ…Όλ¬Έμ—μ„œλŠ” μ‹€μ œ 데이터에 λŒ€ν•œ μ‹€ν—˜μ„ 톡해 μ œμ•ˆλœ 방법둠듀이 μ œμ‘°μ‹œμŠ€ν…œμ˜ 데이터 νšλ“ 문제λ₯Ό κ·Ήλ³΅ν•˜κ³  예츑 λͺ¨λΈμ˜ μ„±λŠ₯을 높일 수 μžˆμŒμ„ ν™•μΈν•˜μ˜€λ‹€.1. Introduction 1 2. Literature Review 9 2.1 Review of Related Methodologies 9 2.1.1 Active Learning 9 2.1.2 Active Feature-value Acquisition 11 2.1.3 Domain Adaptation 14 2.2 Review of Predictive Modelings in Manufacturing 15 2.2.1 Wafer Map Pattern Classification 15 2.2.2 Fault Detection and Classification 16 3. Active Learning for Wafer Map Pattern Classification 19 3.1 Problem Description 19 3.2 Proposed Method 21 3.2.1 System overview 21 3.2.2 Prediction model 25 3.2.3 Uncertainty estimation 25 3.2.4 Query wafer selection 29 3.2.5 Query wafer labeling 30 3.2.6 Model update 30 3.3 Experiments 31 3.3.1 Data description 31 3.3.2 Experimental design 31 3.3.3 Results and discussion 34 4. Active Cluster Annotation for Wafer Map Pattern Classification 42 4.1 Problem Description 42 4.2 Proposed Method 44 4.2.1 Clustering of unlabeled data 46 4.2.2 CNN training with labeled data 48 4.2.3 Cluster-level uncertainty estimation 49 4.2.4 Query cluster selection 50 4.2.5 Cluster-level annotation 50 4.3 Experiments 51 4.3.1 Data description 51 4.3.2 Experimental setting 51 4.3.3 Clustering results 53 4.3.4 Classification performance 54 4.3.5 Analysis for label noise 57 5. Active Inspection for Fault Prediction 60 5.1 Problem Description 60 5.2 Proposed Method 65 5.2.1 Active inspection framework 65 5.2.2 Acquisition based on Expected Prediction Change 68 5.3 Experiments 71 5.3.1 Data description 71 5.3.2 Fault prediction models 72 5.3.3 Experimental design 73 5.3.4 Results and discussion 74 6. Adaptive Fault Detection for Recipe Transition 76 6.1 Problem Description 76 6.2 Proposed Method 78 6.2.1 Overview 78 6.2.2 Unsupervised adaptation phase 81 6.2.3 Semi-supervised adaptation phase 83 6.3 Experiments 85 6.3.1 Data description 85 6.3.2 Experimental setting 85 6.3.3 Performance degradation caused by recipe transition 86 6.3.4 Effect of unsupervised adaptation 87 6.3.5 Effect of semi-supervised adaptation 88 7. Conclusion 91 7.1 Contributions 91 7.2 Future work 94Docto

    Analyzing sampling methodologies in semiconductor manufacturing

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    Thesis (M.B.A.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering; in conjunction with the Leaders for Manufacturing Program at MIT, 2004.Includes bibliographical references (p. 81-83).This thesis describes work completed during an internship assignment at Intel Corporation's process development and wafer fabrication manufacturing facility in Santa Clara, California. At the highest level, this work relates to the importance of adequately creating and maintaining data within IT solutions in order to receive the full business benefit expected through the use of these systems. More specifically, the project uses, as a case example, the sampling methodology used in the fab for metrology data collection to show that significant issues exist relating to the software Various recommendations were undertaken to improve the application's effectiveness. As part of this effort, plans for an online reporting tool were developed allowing much greater visibility into the system's ongoing performance. Initial data updates and other improvements resulted in a reduction in both product cycle times and required labor hours for metrology operations. application database and business processes concerning data accuracy and completeness. The organizational challenges contributing to this problem will also be discussed. Without a rigorous focus on the accuracy and completeness of data within manufacturing execution systems, the results of continuous improvement activities will be less than expected. Furthermore, sharing information relating to these projects across geographical boundaries and business units is vital to the success of manufacturing organizations.by Richard M. Anthony.S.M.M.B.A

    A review of data mining applications in semiconductor manufacturing

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    The authors acknowledge Fundacao para a Ciencia e a Tecnologia (FCT-MCTES) for its financial support via the project UIDB/00667/2020 (UNIDEMI).For decades, industrial companies have been collecting and storing high amounts of data with the aim of better controlling and managing their processes. However, this vast amount of information and hidden knowledge implicit in all of this data could be utilized more efficiently. With the help of data mining techniques unknown relationships can be systematically discovered. The production of semiconductors is a highly complex process, which entails several subprocesses that employ a diverse array of equipment. The size of the semiconductors signifies a high number of units can be produced, which require huge amounts of data in order to be able to control and improve the semiconductor manufacturing process. Therefore, in this paper a structured review is made through a sample of 137 papers of the published articles in the scientific community regarding data mining applications in semiconductor manufacturing. A detailed bibliometric analysis is also made. All data mining applications are classified in function of the application area. The results are then analyzed and conclusions are drawn.publishersversionpublishe

    Quantifying the value of ownership of yield analysis technologies

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    Gallium nitride-based microwave high-power heterostructure field-effect transistors

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    The research described in this thesis has been carried out within a joint project between the Radboud Universiteit Nijmegen (RU) and the Technische Universiteit Eindhoven (TU/e) with the title: "Performance enhancement of GaN-based microwave power amplifiers: material, device and design issues". This project has been granted by the Dutch Technology Foundation STW under project number NAF 5040. The aims of this project have been to develop the technology required to grow state-of-the-art AlGaN/GaN epilayers on sapphire and semi-insulating (s.i.) SiC substrates using metal organic chemical vapor deposition (MOCVD) and to fabricate microwave (f > 1 GHz) high-power (Pout > 10 W) heterostructure field-effect transistors (HFETs) on these epitaxial films. MOCVD growth of AlGaN/GaN epilayers and material characterization has been done within the group Applied Materials Science (AMS) of RU. Research at the Opto-Electronic Devices group (OED) of TU/e has focused on both electrical characterization of AlGaN/GaN epilayers and design, process technology development, and characterization of GaN-based HFETs and CPW passive components. Although a considerable amount of work has been done during this research with respect to processing of CPW passive components on s.i. SiC substrates, this thesis focused on active AlGaN/GaN devices only. GaN is an excellent option for high-power/high-temperature microwave applications because of its high electric breakdown field (3 MV/cm) and high electron saturation velocity (1.5 x 107 cm/s). The former is a result of the wide bandgap (3.44 eV at RT) and enables the application of high supply voltages (> 50 V), which is one of the two requirements for highpower device performance. In addition, the wide bandgap allows the material to withstand much higher operating temperatures (300oC - 500oC) than can the conventional semiconductor materials such as Si, GaAs, and InP. A big advantage of GaN over SiC is the possibility to grow heterostructures, e.g. AlGaN/GaN. The resulting two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction serves as the conductive channel. Large drain currents (> 1 A/mm), which are the second requirement for a power device, can be achieved because of the high electron sheet densities (> 1 x 1013 cm-2) and high electron saturation velocity. These material properties clearly indicate why GaN is a very suitable candidate for next-generation microwave high-power/high-temperature applications such as high-power amplifiers (HPAs) for GSM base stations, and microwave monolithic integrated circuits (MMICs) for radar systems. In this thesis we have presented the design, technology, and measurement results of n.i.d. AlGaN/GaN:Fe HFETs grown on s.i. 4H-SiC substrates by MOCVD. These devices have submicrometer T- or FP-gates with a gate length (Lg) of 0.7 Β΅m and total gate widths (Wg) of 0.25 mm, 0.5 mm, and 1.0 mm, respectively. The 1.0 mm devices are capable of producing a maximum microwave output power (Pout) of 11.9 W at S-band (2 GHz - 4 GHz) using class AB bias conditions of VDS = 50 V and VGS = -4.65 V. It has to be noted that excellent scaling of Pout with Wg has been demonstrated. In addition, the associated power gain (Gp) ranges between 15 dB and 20 dB, and for the power added efficiency (PAE) values from 54 % up to 70 % have been obtained. These results clearly illustrate both the successful development of the MOCVD growth process, and the successful development and integration of process modules such as ohmic and Schottky contact technology, device isolation, electron beam lithography, surface passivation, and air bridge technology, into a process flow that enables the fabrication of state-of-the-art large periphery n.i.d. AlGaN/GaN:Fe HFETs on s.i. SiC substrates, which are perfectly suitable for application in e.g. HPAs at S-band

    Commercial Off-The-Shelf (COTS) Parts Risk and Reliability User and Application Guide

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    All COTS parts are not created equal. Because they are not created equal, the notion that one can force the commercial industry to follow a set of military specifications and standards, along with the certifications, audits and qualification commitments that go with them, is unrealistic for the sale of a few parts. The part technologies that are Defense Logistics Agency (DLA) certified or Military Specification (MS) qualified, are several generations behind the state-of-the-art high-performance parts that are required for the compact, higher performing systems for the next generation of spacecraft and instruments. The majority of the part suppliers are focused on the portion of the market that is producing high-tech commercial products and systems. To that end, in order to compete in the high performance and leading edge advanced technological systems, an alternative approach to risk assessment and reliability prediction must be considered

    Integration of software tools to aid the implementation of a DFM strategy

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    US Microelectronics Packaging Ecosystem: Challenges and Opportunities

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    The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technological solutions to enhance cost-effectiveness while incorporating more features into the silicon footprint. One promising approach is Heterogeneous Integration (HI), which involves advanced packaging techniques to integrate independently designed and manufactured components using the most suitable process technology. However, adopting HI introduces design and security challenges. To enable HI, research and development of advanced packaging is crucial. The existing research raises the possible security threats in the advanced packaging supply chain, as most of the Outsourced Semiconductor Assembly and Test (OSAT) facilities/vendors are offshore. To deal with the increasing demand for semiconductors and to ensure a secure semiconductor supply chain, there are sizable efforts from the United States (US) government to bring semiconductor fabrication facilities onshore. However, the US-based advanced packaging capabilities must also be ramped up to fully realize the vision of establishing a secure, efficient, resilient semiconductor supply chain. Our effort was motivated to identify the possible bottlenecks and weak links in the advanced packaging supply chain based in the US.Comment: 22 pages, 8 figure

    Nanofabrication of Metallic Nanostructures and Integration with Light Detection Devices

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    Metallic nanostructures have been investigated with various applications especially for integration with light detection devices. The incident light can be manipulated by those nanostructures to enhance light absorption therefor improve device performance. However, previous studies focused on optical design. The electrical properties of these integrated light detection devices have not been fully considered. The photon generated carriers transport and collection are critical for light detection devices as well. An optimized device platform considering from both the optical and electrical aspects to fully utilize these nanostructures is highly desired for future light detection devices. This dissertation targeted on three objectives, beginning with the fabrication process development of various nanostructures on different substrates. High quality nanostructures were achieved with minimum 20nm gap and 45nm line width. The second objective was developing the metallic fishnet nanostructures integrated Schottky contact a-Si solar cell to improve both light absorption and photon generated carrier collection. The fishnet was designed as the light trapping structure and 2D connected top contact to collect carriers. The third objective was developing metallic nanostructures integrated GeSn photodetectors. The H shape nano antennas were integrated on GeSn photodetectors. Multiple resonant absorption peaks at infrared range were observed using spectroscopic ellipsometry. However, there was no obvious photoresponse value improvement of developed solar cells and H shape antennas integrated GeSn photodetectors. For further investigation, interdigitated electrodes integrated GeSn photodetectors were designed. With less carrier transit time, the responsivity value of the integrated Ge0.991Sn0.009 photodetector was 72Β΅A/W at 1.55Β΅m at room temperature which was 6 times higher comparing to device without integration. Meanwhile, with the increased carrier life time by decreasing temperature, the responsivity value of integrated Ge0.93Sn0.07 detectors at 1.55Β΅m at 100K was 8.5mA/W which was 200 times higher than the value at 300K. These results suggest relative large surface recombination rate was the dominant loss mechanism in metallic nanostructures integrated light detection devices, as the ratio of carrier life time and transit time determines the gain of photodetector. The light detection devices integrated with metallic nanostructures can be developed to maximize device performance with light trapping effect and carrier collection efficiency
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