Error control for reliable digital data transmission and storage systems

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. In this paper we present some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative alorithm to find the error locator polynomial. Two codes are considered: (1) a d sub min = 4 single-byte-error-correcting (SBEC), double-byte-error-detecting (DBED) RS code; and (2) a d sub min = 6 double-byte-error-correcting (DBEC), triple-byte-error-detecting (TBED) RS code

Study of application of practical performance criteria for the implementation of efficient error-reduction coding Final report

Criteria for implementation of efficient error reduction codin

Reliable data transfer via frequency transmission

Reliable single directional frequency data transfer is a method of electronic communication that is a potential alternative to a bi-directional or wired method. It is intended to determine whether or not single directional data transfer can be designed to perform at the same reliability level as other methods of data transmission. The reason for researching this is to see whether, two-way communication is necessary. Upon finding results to this question it will be determined if single directional frequency data transfer can be as power efficient as bi directional data transfer. It will also look into the overall performance of the method and how it can deal with inhibiting factors that will be introduced to simulate real world external variations in the signal. How reliable single directional frequency transfer is, will be determined through experiments that are tasked at finding the maximum transmission rate of the devices made and the distance that data transmission can be conducted over. The investigation will require the design of an experimental apparatus that will allow results to be found in the maximum possible transmission rate and distance transmission can cover. The experimental apparatus will consist of two possessors, one for encoding a message, the other for decoding a message. The apparatus will also require an integrated radio frequency transmitter circuit as well as a receiver radio frequency integrated circuit. The processors will need to be coded with a new protocol that will allow the incorporation of three forward error correction techniques. This is so that a basic, intermediate and advanced method of forward error correction can be compared when gathering results. Throughout this research consideration into all aspects that can possibly improve the energy efficiency of the electrical apparatus will be addressed an implemented. By creating an experimental apparatus that is competitive against other data transmission methods in terms of energy efficiency. With an energy efficient experimental apparatus, then results found could be a close representation of the likely outcomes if single directional data transmission was to be implemented on a larger scale

Concatenation of convolutional and block codes Final report

Comparison of concatenated and sequential decoding systems and convolutional code structural propertie

Stall Pattern Avoidance in Polynomial Product Codes

Product codes are a concatenated error-correction scheme that has been often considered for applications requiring very low bit-error rates, which demand that the error floor be decreased as much as possible. In this work, we consider product codes constructed from polynomial algebraic codes, and propose a novel low-complexity post-processing technique that is able to improve the error-correction performance by orders of magnitude. We provide lower bounds for the error rate achievable under post processing, and present simulation results indicating that these bounds are tight.Comment: 4 pages, 2 figures, GlobalSiP 201

Evaluation of cross-layer reliability mechanisms for satellite digital multimedia broadcast

This paper presents a study of some reliability mechanisms which may be put at work in the context of Satellite Digital Multimedia Broadcasting (SDMB) to mobile devices such as handheld phones. These mechanisms include error correcting codes, interleaving at the physical layer, erasure codes at intermediate layers and error concealment on the video decoder. The evaluation is made on a realistic satellite channel and takes into account practical constraints such as the maximum zapping time and the user mobility at several speeds. The evaluation is done by simulating different scenarii with complete protocol stacks. The simulations indicate that, under the assumptions taken here, the scenario using highly compressed video protected by erasure codes at intermediate layers seems to be the best solution on this kind of channel

Fast transform decoding of nonsystematic Reed-Solomon codes

A Reed-Solomon (RS) code is considered to be a special case of a redundant residue polynomial (RRP) code, and a fast transform decoding algorithm to correct both errors and erasures is presented. This decoding scheme is an improvement of the decoding algorithm for the RRP code suggested by Shiozaki and Nishida, and can be realized readily on very large scale integration chips