Switching mode power amplifier for bluetooth applications

Modern fully integrated transceivers architectures, require circuits with low area, low cost, low power, and high efficiency. A key block in modern transceivers is the power amplifier, which is deeply studied in this thesis. First, we study the implementation of a classical Class-A amplifier, describing the basic operation of an RF power amplifier, and analysing the influence of the real models of the reactive components in its operation. Secondly, the Class-E amplifier is deeply studied. The different types of implementations are reviewed and theoretical equations are derived and compared with simulations. There were selected four modes of operation for the Class-E amplifier, in order to perform the implementation of the output stage, and the subsequent comparison of results. This led to the selection of the mode with the best trade-off between efficiency and harmonics distortion, lower power consumption and higher output power. The optimal choice was a parallel circuit containing an inductor with a finite value. To complete the implementation of the PA in switching mode, a driver was implemented. The final block (output stage together with the driver) got 20 % total efficiency (PAE) transmitting 8 dBm output power to a 50 W load with a total harmonic distortion (THD) of 3 % and a total consumption of 28 mW. All implementations are designed using standard 130 nm CMOS technology. The operating frequency is 2.4 GHz and it was considered an 1.2 V DC power supply. The proposed circuit is intended to be used in a Bluetooth transmitter, however, it has a wider range of applications

Derivation of Closed-Form Design Equations for Idealized Operation of Inverse Class-E Power Amplifiers at Any Duty Ratio

Complementary to the conventional class-E topology, inverse class-E operation has several advantages over the class-E counterpart, such as lower peak switch voltage and smaller circuit inductance, which are attractive to high power RF design and MMIC implementation. This paper derives the closed-form design equations that can be used to synthesize the idealized operation of inverse class-E power amplifiers at any switch duty ratio. Calculation of the key design parameters, such as the maximum switch voltage and circuit components values, is elaborated and compared with the case of conventional class-E operation. Further, the theoretical analysis is confirmed and verified by numerical simulations performed on a 500mW, 2.4GHz idealized inverse class-E power amplifier

UHF class E/F2 outphasing transmitter for 12 dB PAPR signals

This paper exploits the degree of freedom provided by the continuous class-E modes in order to reduce the impact of a FET on-state resistance when approximating the zero voltage switching (ZVS) operation along a wide range of resistive loads. A UHF class-E/F2 power amplifier (PA), which includes a lumped element drain terminating network to synthesize the optimal load modulation (LM) trajectory, has been designed to maintain an efficiency as high as possible along an output power control range above 10 dB. Based on this PA, an outphasing scheme in the 700 MHz frequency band has been implemented. It is shown to provide an efficiency higher than 60% up to an output power below 5% (-13 dB) of its peak value (47 W). Under mixed-mode operation and applying digital predistorsion (DPD), a 10 MHz LTE signal with a peak-to-average power ratio (PAPR) as high as 12.2 dB has been linearly reproduced with average efficiency and PAE values of 46.6% and 42.9%, respectively.This work was supported by Spanish Ministry of Science, Innovation and Universities through TEC2017-83343-C4-1-R project, co-funded with FEDER. D. Vegas also thanks for the BES-2015-072203 grant. The support provided by Prof. P. Gilabert and Prof. G. Montoro, UPC, on the GMP-LUT DPD is highly appreciated

Microwave class-E power amplifiers: a brief review of essential concepts in high-frequency class-E PAs and related circuits

Since Nathan Sokal's invention of the class-E power amplifier (PA), the vast majority of class-E results have been reported at kilohertz and millihertz frequencies, but the concept is increasingly applied in the ultrahigh-frequency (UHF) [1]-[13], microwave [14]-[20], and even millimeter-wave range [21]. The goal of this article is to briefly review some interesting concepts concerning high-frequency class-E PAs and related circuits. (The article on page 26 of this issue, "A History of Switching-Mode Class-E Techniques" by Andrei Grebennikov and Frederick H. Raab, provides a historical overview of class-E amplifier development.)We acknowledge support, in part, by a Lockheed Martin Endowed Chair at the University of Colorado and in part by the Spanish Ministry of Economy, Industry, and Competitiveness (MINECO) through TEC2014-58341-C4-1-R and TEC2017-83343-C4-1-R projects, cofunded with FEDER

A Precise analysis of a class e amplifier

An analytical approach to the design and simulation of a Class-E power amplifier under typical high frequency switching conditions is presented. The analysis will optimize the loading network at the output for transistors with an exponential transition current, while accounting for harmonics injected into the circuit from the choke inductor and a non-infinite output Q. Two methods have been successfully implemented to simulate the class-E amplifier waveforms, optimize the required circuit components, and calculate amplifier performances such as efficiency and total harmonic distortion (THD). The first optimizes the circuit parameters while considering finite choke inductances, drain current fall time, and loaded quality factor of the output network inductance. The second accounts for all these in addition to a finite ON resistance of the switch, rise and fall time of the input signal, and parasitic resistances of both circuit inductors. The first method (integral method) utilizes an iterative technique where each waveform is defined symbolically and solved using the integral function in MATLAB. Initial values are assumed and an iterative process is implemented to quickly arrive at the desired results. The second method (finite difference method) expresses the circuit equations using differential equations and solves them simultaneously using finite difference technique. The results of the theoretical analysis is then compared to a commercial circuit simulation software program (Spectre ©) as well as to a low frequency hardware circuit utilizing discrete components. The presented analysis is shown to accurately model the high frequency simulation as well as the actual hardware circuit with the results discussed

Design of Low-Power Transmitter and Receiver Front End

This thesis focuses on the design of "RF front-end blocks" for the transmitter and receiver. The blocks include the low noise amplifier (LNA) and mixer downconversion at the receiving side, while the power amplifier includes the pre-driver circuit, and mixer up-conversion at the transmitter side. All of the blocks were designed in a 65nm design kit. The basics of these RF blocks are first described in chapters two to four. After that, the general principle of operations is then described and different topologies are discussed. In chapter 5 the proposed design is discussed. The proposed design is composed of a differential IDCS narrow band LNA, with a passive down-conversion mixer on the receiving side, designed for bluetooth low energy (BLE) applications, that operates at 2.4 GHz with a 1.2 V supply voltage. The overall conversion gain at the receiving side was found to be greater than 13 dB with a double side band noise figure of 8.3 dB having a 1 dB compression point of -11.8 dB, and with IIP3 of -2.06 dBm having a power consumption of 251 μwatts. On the transmission side, a power amplifier with a pre-driver circuit and a passive up-conversion mixer has been designed to operate at a 1.2 V supply at the frequency of operation 2.4 GHz, having overall gain of 24 dB with maximum power added efficiency of 34% when using maximum output power of 11 dBm. The Cadence virtuoso design kit was used for simulation. Additionally, the layout considerations were discussed, followed by presentation of the post-layout results and graphs, and, finally, some conclusions have been drawn

The Switched Mode Power Amplifiers

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Design of an RF CMOS Power Amplifier for Wireless Sensor Networks

The Power Amplifier (PA) is the last Radio Frequency (RF) building block in a transmitter, directly driving an antenna. The low power RF input signal of the PA is amplified to a significant power RF output signal by converting DC power into RF power. Since the PA consumes a majority of the power, efficiency plays one of the most important roles in a PA design. Designing an efficient, fully integrated RF PA that can operate at low supply voltage (1.2V), low power, and low RF frequency (433MHz) is a major challenge. The class E Power Amplifier, which is one type of switch mode PA, is preferred in such a scenario because of its higher theoretical efficiency compared to linear power amplifiers. A controllable class E RF power amplifier design implemented in 0.13 µm CMOS process is presented. The circuit was designed, simulated, laid out, fabricated, and tested. The PA will be integrated as a part of a complete wireless transceiver system using the same process