A fully digital feedback control of gate driver for current balancing of parallel connected power devices

Parallel connected power devices such as Insulated Gate Bipolar Transistors (IGBTs) can be used to realize a system with higher current and higher power rating. However, the operation of parallel connected IGBTs is prone to unbalancing due to variation in parameters of the semiconductor devices and asymmetric parallel system. In this paper, feedback control is proposed for peak overshoot minimization as well as current balancing of parallel connected IGBTs. A fully digital feedback control (DFC) is implemented using the universal clock for balanced operation of the two parallel connected IGBTs

An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis

Accepted versio

Switching Performance Evaluation, Design, and Test of a Robust 10 kV SiC MOSFET Based Phase Leg for Modular Medium Voltage Converters

10 kV SiC MOSFETs are one of the most promising power semiconductor devices for next-generation high-performance modular medium voltage (MV) converters. With extraordinary device characteristics, 10 kV SiC MOSFETs also bring a variety of challenges in the design and test of MV converters. To tackle these inherent challenges, this dissertation focuses on a robust half bridge (HB) phase leg based on 10 kV SiC MOSFETs for modular MV converters. A baseline design and test of the phase leg is established first as the foundation of the research in this dissertation. Thorough evaluation of 10 kV SiC MOSFETs’ switching performance in a phase leg is necessary before applying them in MV converters. The impact of parasitic capacitors and the freewheeling diode is investigated to understand the switching performance more extensively and guide the converter design. One non-negligible challenge is the flashover fault resulting from the premature insulation breakdown, a short circuit fault with extremely fast transients. A device model is established to analyze the behavior of 10 kV SiC MOSFETs when the fault occurs in a phase leg thoroughly. Subsequently, the gate driver and protection design considerations are summarized to achieve lower short circuit current and overvoltage and ensure the survival of the MOSFET that in ON state when the fault happens. Furthermore, it is challenging to design the overcurrent/short circuit protection with fast response and strong noise immunity under fast switching transients for 10 kV SiC MOSFETs. The noise immunity of the desaturation (desat) protection is studied quantitatively to provide design guidelines for noise immunity enhancement. Then, the protection scheme based on desat protection is developed and validated withimmunity, the strong noise immunity of the developed protection is also successfully validated. In addition, a simple test scheme is proposed and validated experimentally, in order to qualify the HB phase leg based on the 10 kV SiC MOSFET comprehensively for the modular MV converter applications. The test scheme includes the ac-dc continuous test with two phase legs in series to create the testing condition similar to what is generated in a modular MV converter, especially the high dv/dt. The test scheme can fully test the capability of the phase leg to withstand high dv/dt and its resulting noise

Design new voltage balancing control series connected for HV-IGBT`s

The insulated gate bipolar transistors (IGBTs) are widely used in various applications as they require low gate drive power and gate voltage. This paper proposes an active gain circuit to maintain voltage stability of series-connected IGBTs for high voltage applications. The novel gate driver circuit with closed-loops control amplifies the gate signal while restricting the IGBT emitter voltage below a predetermined level. With the proposed circuit, serial-connected IGBTs can replace high-voltage IGBTs (HV-IGBTs) for high-voltage applications through the active control of the gate signal time delay. Closed-loop controls function is to charged current to the gate to restrict the IGBT emitter voltage to a predetermined level. This paper also presents the experiment on the gate driver capability based on a series-connected IGBTs with three IGBTs and a snubber circuit. The experimental results show a voltage offset with active control with a wide variation in load and imbalance conditions. Lastly, the experimental results are validated with the simulation results, where the simulation results agree with the experimental results

Design and implementation of a 1.3 KW, single-phase, seven-level, GaN AC-DC converter

In today's world, electrical energy meets an increasing amount of the world's power needs as more countries are transitioning from traditional energy sources such as fossil fuels to renewable energy sources. The importance of power electronics has substantially increased due to their key roles in harnessing and delivering energy efficiently from renewable energy sources. As many modern applications of power electronics such as renewable energy harnessing, electric vehicle, and data center energy management require high-performance power electronics, innovative approaches to more robust, smaller, and efficient power converters are in great demand. This work presents detailed design process and hardware implementation of 1.3 kW, 90-264 Vrms (60 Hz) to 400 VDC converter. As a part of the trend in power electronics, the proposed converter features an innovative topology optimized for size miniaturization and high efficiency: a seven-level flying capacitor multilevel design with gallium nitride MOSFETs operating at 120 kHz. The converter is currently in competition for the IEEE International Future Energy Challenge 2016. It has achieved over 96% conversion efficiency at about 300 W output power. The development of fully functional power factor correction and digital control is in steady progress. With the sophisticated digital control and heat sink for better heat dissipation, this converter is projected to have a power density greater than 2 W/cubic-cm (32.8 W/cubic-inch) with over 98% efficiency.Ope

Developing A Medium-Voltage Three-Phase Current Compensator Using Modular Switching Positions

The objective of this thesis is to present the context, application, theory, design, construction, and testing of a proposed solution to unbalanced current loading on three-phase four-wire systems. This solution, known as the Medium-Voltage Unbalanced Current Static Compensator or MV-UCSC, is designed to recirculate currents between the three phases of adistribution system. Through this redistribution of the currents negative- and zero-sequence current components are eliminated and a balanced load is seen upstream from the point of installation. The MV-UCSC as it operates in the distribution system is presented followed by its effect on traditional compensation equipment. The construction of the MV-UCSC as well as 13.8 kV simulations are then shown. Development of the switching positions required by the MVUCSC is then given followed by a variation on this switching position with the intent to reduce part count. Finally, the testing the 13.8 kV three-phase four-wire, neutral-point-clamped, elevenlevel, flying-capacitor-based MV-UCSC connected directly to the grid is presented