FM0/MANCHESTER ENCODING METHOD FOR STORAGE BY USING VLSI CIRCUIT

In this paper, a completely reused VLSI design of FM0/Manchester coding technique for memory application has been proposed. during this paper, we have a tendency to square measure coding the one-bit knowledge into sixteen-bit knowledge and storing it into a memory of sure address location given by the linear feedback register (LFSR), whose input is taken from the pseudo random sequence generator (PRSG). The encoded sixteen-bit data is held on into memory controller; the encoded knowledge is decoded into one-bit knowledge below the condition: once MSB bit is at logic state 1. By victimization FM0/Manchester coding and cryptography technique, the info is going to be secure; this method is straightforward and quick to hold out. This paper develops a completely reused VLSI design, associated additionally exhibits an economical performance

AN ARCHITECTURAL APPROACH FOR REDUCINGPOWER AND INCREASING SECURITY OF RFID TAGS

Radio Frequency Identification (RFID) technology is currently employed for a variety of applications such as RFID-based wireless payment, healthcare, homeland security, asset management,etc. Due to newer privacy requirements and increasingly secure applications, typical RFID tags are required to expand security features such as data encryption and safe transactions. However, RFID tags have extremely strict low-power consumption requirements. Thus, reduced power consumption and secure data transactions are two main problems for the next generation RFID tags.This dissertation presents an architectural approach to address these two main problems.This dissertation provides a multi-domain solution to improve the power consumption andsecurity, while also reducing design time and verification time of the system. In particular, Idescribe (1)a smart buffering technique to allow a tag to remain in a standby mode until addressed,(2)a multi-layer, low-power technique that transcends the passive-transaction, physical, and data layers to provide secure transactions, (3) an FPGA-based traffic profiler system to generate traces of RFID communications for both tag verification and power analysis without the need of actual hardware, and (4) a design automation technique to create physical layer encoding and decoding blocks in hardware suitable for RFID tags.This dissertation presents four contributions: (1) As a result, based on a Markov Process energymodel, the smart buffering technique is shown to reduce power consumption by 85% over a traditionalactive tag; (2) The multi-layer, low-power security technique provides protection againstmalicious reader attacks to disable the tag, to steal the information stored in or communicatedto the device. The power consumption overhead for implementing these layers of security is increased approximately 13% over the basic tag controller; (3) In addition, the FPGA-based traffic profiler system has been able to generate traces for ISO 18000 part 6C (EPC Gen2) protocol; and (4) The designs of endocing/decoding blocks are generated automatically by the Physical LayerSynthesis tool for five protocols used in or related to RFID. Consequently, any power consumption of five designs is less than 5 £gW. Furthermore, compared with five designs implemented by hand, the difference of the power consumption between two of them is less than 7% at most

Physical Layer Approach for Securing RFID Systems

Radio Frequency IDentification (RFID) is a contactless, automatic identification wireless technology primarily used for identifying and tracking of objects, goods and humans. RFID is not only limited to identification and tracking applications. This proliferating wireless technology has been deployed in numerous securities sensitive applications e.g. access control, e-passports, contactless payments, driver license, transport ticking and health cards. RFID inherits all the security and privacy problems that are related to wireless technology and in addition to those that are specific to RFID systems. The security and privacy protection schemes proposed in literature for wireless devices are mostly secured through symmetric/asymmetric keys encryption/decryption and hash functions. The security of all these cryptographic algorithms depends on computationally complex problems that are hard to compute using available resources. However, these algorithms require cryptographic operations on RFID tags which contradict the low cost demand of RFID tags. Due to limited number of logic gates in tags, i.e., 5K-10K, these methods are not practical. Much research effort has done in attempt to solve consumer's privacy and security problem. Solutions that prevent clandestine inventory are mostly application layer techniques. To solve this problem, a new RFID physical layer scheme has been proposed namely Direct Sequence Backscatter Encryption (DSB Enc). The proposed scheme uses level generator to produce different levels before transmitting the signal to the tag. The tag response to the signal sent by the reader using backscatter communications on the same signal which looks random to the eavesdropper. Therefore eavesdropper cannot extract the information from reader to tag and tag to reader communication using passive eavesdropping. As reader knows the different generated levels added to the carrier signal, it can remove the levels and retrieve the tag's messages. We proposed a lightweight, low-cost and practically secure physical layer security to the RFID system, for a supply chain processing application, without increasing the computational power and tag's cost. The proposed scheme was validated by simulations on GNU Radio and experimentation using SDR and a WISP tag. Our implementation and experimental results validate that DSB Enc is secure against passive eavesdropping, replay and relay attacks. It provides better results in the presence of AWGN channel.1 yea

Low power digital baseband core for wireless Micro-Neural-Interface using CMOS sub/near-threshold circuit

This thesis presents the work on designing and implementing a low power digital baseband core with custom-tailored protocol for wirelessly powered Micro-Neural-Interface (MNI) System-on-Chip (SoC) to be implanted within the skull to record cortical neural activities. The core, on the tag end of distributed sensors, is designed to control the operation of individual MNI and communicate and control MNI devices implanted across the brain using received downlink commands from external base station and store/dump targeted neural data uplink in an energy efficient manner. The application specific protocol defines three modes (Time Stamp Mode, Streaming Mode and Snippet Mode) to extract neural signals with on-chip signal conditioning and discrimination. In Time Stamp Mode, Streaming Mode and Snippet Mode, the core executes basic on-chip spike discrimination and compression, real-time monitoring and segment capturing of neural signals so single spike timing as well as inter-spike timing can be retrieved with high temporal and spatial resolution. To implement the core control logic using sub/near-threshold logic, a novel digital design methodology is proposed which considers INWE (Inverse-Narrow-Width-Effect), RSCE (Reverse-Short-Channel-Effect) and variation comprehensively to size the transistor width and length accordingly to achieve close-to-optimum digital circuits. Ultra-low-power cell library containing 67 cells including physical cells and decoupling capacitor cells using the optimum fingers is designed, laid-out, characterized, and abstracted. A robust on-chip sense-amp-less SRAM memory (8X32 size) for storing neural data is implemented using 8T topology and LVT fingers. The design is validated with silicon tapeout and measurement shows the digital baseband core works at 400mV and 1.28 MHz system clock with an average power consumption of 2.2 μW, resulting in highest reported communication power efficiency of 290Kbps/μW to date

On the design and implementation of efficient antennas for high frequency-radio frequency identification read/write devices

AbstractThis article describes an in‐depth methodical approach to the development of efficient high‐frequency (HF) antennas for use in radio frequency identification (RFID) systems operating at 13.56 MHz. It presents brief theory relevant to RFID communication and sets up a framework within which features and requirements of antennas are linked to key design parameters such as antenna form‐factor and size; RF power level, material and communication protocol. Tuning circuits necessary to adjust the resonance and power matching characteristics of antennas for good transponder interrogation and response recovery are discussed. To validate the approaches outlined, a stepwise design and measurement of an HF antenna for an ISO/IEC 15693 compliant read/write device (RWD) is described. Common practical problems that are often encountered in such design processes are also commented on. The prototyped antenna was tuned, connected to the RWD via a 50 coaxial cable and tested

NFC Security Solution for Web Applications

Töö eesmärgiks on võrrelda erinevaid eksisteerivaid veebirakenduste turvalahendusi, analüüsida NFC sobivust turvalahenduste loomiseks ning pakkuda välja uus NFC autentimise ja signeerimise lahendus läbi Google Cloud Messaging teenuse ja NFC Java Card’i. Autori pakutud lahendus võimaldab kasutajal ennast autentida ja signeerida läbi NFC mobiiliseadme ja NFC Java Card’i, nõudmata kasutajalt eraldi kaardilugejat. Antud lahendust on võimalik kasutada kui ühtset kasutajatuvastamise viisi erinevatele rakendustele, ilma lisaarenduseta.This thesis compares existing and possible security solutions for web applications, analyses NFC compatibility for security solutions and proposes a new NFC authentication and signing solution using Google Cloud Messaging service and NFC Java Card. This new proposed solution enables authentication and signing via NFC enabled mobile phone and NFC Java Card without any additional readers or efforts to be made. This smart card solution can be used within multiple applications and gives the possibility to use same authentication solution within different applications

Ambient backscatterers for low cost and low power wireless applications

Sensors that are used in Internet-of-Things (IoT) area are hampered by extremely high costs and excessive battery power consumption – but wireless, reflective, sensor-tags could help address these issues. In agricultural applications: in order to monitor a field of 500 plants, the operating cost will typically rack up hundreds of pounds per field and will gobble tens of milliwatts per sensor. In this thesis we have tried to address some of these shortfalls by opting for each plant to have an antenna, one transistor that acts as a switch, and one microcontroller. Each sensor uses wireless communication based on a reflections technology known as backscatter. The antenna acts as a mirror and when it is illuminated with a signal, it reflects back the wave. The signal comes from an FM radio station and it is freely available in the air. The plant-sensor can modulate the information by a very smart switching of this antenna. We are trying, under laboratory conditions, to combine this low power, low-cost technology with tape-based, flexible nanomaterial printed sensors. As nanotechnology enables flexible inkjet printed electronics to revolutionise IoT applications, we developed a new technology and we hope that our nanomaterial based printed circuit sensors will help push state-of-the-art additive manufacturing in agricultural technology

Advanced Radio Frequency Identification Design and Applications

Radio Frequency Identification (RFID) is a modern wireless data transmission and reception technique for applications including automatic identification, asset tracking and security surveillance. This book focuses on the advances in RFID tag antenna and ASIC design, novel chipless RFID tag design, security protocol enhancements along with some novel applications of RFID

RFID Tags Mountable on Metallic Surface

The Radio Frequency Identification (RFID) technology in the UHF band is a growing technology with a variety of applications in the market. The purpose of this technology is the identification of certain “object” at longer distances, cheap cost and durability. This is achieved by attaching a tag antenna to the “object”. Passive UHF tag antennas fulfil these requirements, mainly due to cheap fabrication and durability. Nevertheless, the identification distance is sensitive to the object material properties. If this “object” is a metal surface, the tag antenna radiation properties change due to reflections that propagating wave undergoes on metal surface. There is performance degradation in the tag antenna hence shorter identification range is achieved. In this thesis, some proposals to overcome the metal surface effects over tag antennas are mentioned. Moreover, a survey of different UHF patch tag antenna design is reviewed and finally the appropriate tag patch antenna is chosen for design and construction. It is one purpose of this thesis to introduce a new design of passive UHF patch tag antenna. The main design objective of this antenna is the immunity of operating frequency and radiation properties on metal surface. The dielectric constant, thickness, and dimensions of the proposed tag antenna are based on a compromise between bandwidth and radiation efficiency. This tag antenna is simulated in electromagnetic simulators: HFSS and CEMS; then it is measured in the anechoic chamber of RFID cabinet and by the read range technique in an open environment. The simulation results between HFSS and CEMS show good agreement. This enhances the reliability of the new tag antenna design. Some parameters of the proposed tag antenna are measured and compared with the simulation results. This tag antenna placed on metal surface of 200x200 mm2 achieves a maximum read range of 18m and realized gain of 6 dBi at 935 MHz. /Kir1