Architectures and Circuits Leveraging Injection-Locked Oscillators for Ultra-Low Voltage Clock Synthesis and Reference-less Receivers for Dense Chip-to-Chip Communications

High performance computing is critical for the needs of scientific discovery and economic competitiveness. An extreme-scale computing system at 1000x the performance of today’s petaflop machines will exhibit massive parallelism on multiple vertical fronts, from thousands of computational units on a single processor to thousands of processors in a single data center. To facilitate such a massively-parallel extreme-scale computing, a key challenge is power. The challenge is not power associated with base computation but rather the problem of transporting data from one chip to another at high enough rates. This thesis presents architectures and techniques to achieve low power and area footprint while achieving high data rates in a dense very-short reach (VSR) chip-to-chip (C2C) communication network. High-speed serial communication operating at ultra-low supplies improves the energy-efficiency and lowers the power envelop of a system doing an exaflop of loops. One focus area of this thesis is clock synthesis for such energy-efficient interconnect applications operating at high speeds and ultra-low supplies. A sub-integer clockfrequency synthesizer is presented that incorporates a multi-phase injection-locked ring-oscillator-based prescaler for operation at an ultra-low supply voltage of 0.5V, phase-switching based programmable division for sub-integer clock-frequency synthesis, and automatic calibration to ensure injection lock. A record speed of 9GHz has been demonstrated at 0.5V in 45nm SOI CMOS. It consumes 3.5mW of power at 9.12GHz and 0.052 of area, while showing an output phase noise of -100dBc/Hz at 1MHz offset and RMS jitter of 325fs; it achieves a net of -186.5 in a 45-nm SOI CMOS process. This thesis also describes a receiver with a reference-less clocking architecture for high-density VSR-C2C links. This architecture simplifies clock-tree planning in dense extreme-scaling computing environments and has high-bandwidth CDR to enable SSC for suppressing EMI and to mitigate TX jitter requirements. It features clock-less DFE and a high-bandwidth CDR based on master-slave ILOs for phase generation/rotation. The RX is implemented in 14nm CMOS and characterized at 19Gb/s. It is 1.5x faster that previous reference-less embedded-oscillator based designs with greater than 100MHz jitter tolerance bandwidth and recovers error-free data over VSR-C2C channels. It achieves a power-efficiency of 2.9pJ/b while recovering error-free data (BER 200MHz and the INL of the ILO-based phase-rotator (32- Steps/UI) is <1-LSB. Lastly, this thesis develops a time-domain delay-based modeling of injection locking to describe injection-locking phenomena in nonharmonic oscillators. The model is used to predict the locking bandwidth, and the locking dynamics of the locked oscillator. The model predictions are verified against simulations and measurements of a four-stage differential ring oscillator. The model is further used to predict the injection-locking behavior of a single-ended CMOS inverter based ring oscillator, the lock range of a multi-phase injection-locked ring-oscillator-based prescaler, as well as the dynamics of tracking injection phase perturbations in injection-locked masterslave oscillators; demonstrating its versatility in application to any nonharmonic oscillator

Photo-detectors integrated with resonant tunneling diodes

We report on photo-detectors consisting of an optical waveguide that incorporates a resonant tunneling diode (RTD). Operating at wavelengths around 1.55 μm in the optical communications C band we achieve maximum sensitivities of around 0.29 A/W which is dependent on the bias voltage. This is due to the nature of RTD nonlinear current-voltage characteristic that has a negative differential resistance (NDR) region. The resonant tunneling diode photo-detector (RTD-PD) can be operated in either non-oscillating or oscillating regimes depending on the bias voltage quiescent point. The oscillating regime is apparent when the RTD-PD is biased in the NDR region giving rise to electrical gain and microwave self-sustained oscillations Taking advantage of the RTD’s NDR distinctive characteristics, we demonstrate efficient detection of gigahertz (GHz) modulated optical carriers and optical control of a RTD GHz oscillator. RTD-PD based devices can have applications in generation and optical control of GHz low-phase noise oscillators, clock recovery systems, and fiber optic enabled radio frequency communication systems.info:eu-repo/semantics/publishedVersio

Photo-detectors integrated with resonant tunneling diodes

We report on photo-detectors consisting of an optical waveguide that incorporates a resonant tunneling diode (RTD). Operating at wavelengths around 1.55 m in the optical communications C band we achieve maximum sensitivities of around 0.29 A/W which is dependent on the bias voltage. This is due to the nature of RTD nonlinear current-voltage characteristic that has a negative differential resistance (NDR) region. The resonant tunneling diode photo-detector (RTD-PD) can be operated in either non-oscillating or oscillating regimes depending on the bias voltage quiescent point. The oscillating regime is apparent when the RTD-PD is biased in the NDR region giving rise to electrical gain and microwave self-sustained oscillations Taking advantage of the RTD's NDR distinctive characteristics, we demonstrate efficient detection of gigahertz (GHz) modulated optical carriers and optical control of a RTD GHz oscillator. RTD-PD based devices can have applications in generation and optical control of GHz low-phase noise oscillators, clock recovery systems, and fiber optic enabled radio frequency communication systems.FCT under the project WOWi [PTDC/EEA-TEL/100755/2008]; programme POCTI/FEDER [REEQ/1272/EEI/2005]; FCT Portugal [SFRH/BPD/84466/2012]info:eu-repo/semantics/publishedVersio

Precise multimodal optical control of neural ensemble activity.

Understanding brain function requires technologies that can control the activity of large populations of neurons with high fidelity in space and time. We developed a multiphoton holographic approach to activate or suppress the activity of ensembles of cortical neurons with cellular resolution and sub-millisecond precision. Since existing opsins were inadequate, we engineered new soma-targeted (ST) optogenetic tools, ST-ChroME and IRES-ST-eGtACR1, optimized for multiphoton activation and suppression. Employing a three-dimensional all-optical read-write interface, we demonstrate the ability to simultaneously photostimulate up to 50 neurons distributed in three dimensions in a 550 × 550 × 100-µm3 volume of brain tissue. This approach allows the synthesis and editing of complex neural activity patterns needed to gain insight into the principles of neural codes

A new TRNG based on coherent sampling with self-timed rings

Random numbers play a key role in applications such as industrial simulations, laboratory experimentation, computer games, and engineering problem solving. The design of new true random generators (TRNGs) has attracted the attention of the research community for many years. Designs with little hardware requirements and high throughput are demanded by new and powerful applications. In this paper, we introduce the design of a novel TRNG based on the coherent sampling (CS) phenomenon. Contrary to most designs based on this phenomenon, ours uses self-timed rings (STRs) instead of the commonly employed ring oscillators (ROs). Our design has two key advantages over existing proposals based on CS. It does not depend on the FPGA vendor used and does not need manual placement and routing in the manufacturing process, resulting in a highly portable generator. Our experiments show that the TRNG offers a very high throughput with a moderate cost in hardware. The results obtained with ENT, DIEHARD, and National Institute of Standards and Technology (NIST) statistical test suites evidence that the output bitstream behaves as a truly random variable.This work was supported in part by the Ministerio de Economia y Competitividad (MINECO), Security and Privacy in the Internet of You (SPINY), under Grant TIN2013-46469-R, and in part by the Comunidad de Madrid (CAM), Cybersecurity, Data, and Risks (CIBERDINE), underGrant S2013/ICE-3095

High Performance Local Oscillator Design for Next Generation Wireless Communication

Local Oscillator (LO) is an essential building block in modern wireless radios. In modern wireless radios, LO often serves as a reference of the carrier signal to modulate or demod- ulate the outgoing or incoming data. The LO signal should be a clean and stable source, such that the frequency or timing information of the carrier reference can be well-defined. However, as radio architecture evolves, the importance of LO path design has become much more important than before. Of late, many radio architecture innovations have exploited sophisticated LO generation schemes to meet the ever-increasing demands of wireless radio performances. The focus of this thesis is to address challenges in the LO path design for next-generation high performance wireless radios. These challenges include (1) Congested spectrum at low radio frequency (RF) below 5GHz (2) Continuing miniaturization of integrated wireless radio, and (3) Fiber-fast (>10Gb/s) mm-wave wireless communication. The thesis begins with a brief introduction of the aforementioned challenges followed by a discussion of the opportunities projected to overcome these challenges. To address the challenge of congested spectrum at frequency below 5GHz, novel ra- dio architectures such as cognitive radio, software-defined radio, and full-duplex radio have drawn significant research interest. Cognitive radio is a radio architecture that opportunisti- cally utilize the unused spectrum in an environment to maximize spectrum usage efficiency. Energy-efficient spectrum sensing is the key to implementing cognitive radio. To enable energy-efficient spectrum sensing, a fast-hopping frequency synthesizer is an essential build- ing block to swiftly sweep the carrier frequency of the radio across the available spectrum. Chapter 2 of this thesis further highlights the challenges and trade-offs of the current LO gen- eration scheme for possible use in sweeping LO-based spectrum analysis. It follows by intro- duction of the proposed fast-hopping LO architecture, its implementation and measurement results of the validated prototype. Chapter 3 proposes an embedded phase-shifting LO-path design for wideband RF self-interference cancellation for full-duplex radio. It demonstrates a synergistic design between the LO path and signal to perform self-interference cancellation. To address the challenge of continuing miniaturization of integrated wireless radio, ring oscillator-based frequency synthesizer is an attractive candidate due to its compactness. Chapter 4 discussed the difficulty associated with implementing a Phase-Locked Loop (PLL) with ultra-small form-factor. It further proposes the concept sub-sampling PLL with time- based loop filter to address these challenges. A 65nm CMOS prototype and its measurement result are presented for validation of the concept. In shifting from RF to mm-wave frequencies, the performance of wireless communication links is boosted by significant bandwidth and data-rate expansion. However, the demand for data-rate improvement is out-pacing the innovation of radio architectures. A >10Gb/s mm-wave wireless communication at 60GHz is required by emerging applications such as virtual-reality (VR) headsets, inter-rack data transmission at data center, and Ultra-High- Definition (UHD) TV home entertainment systems. Channel-bonding is considered to be a promising technique for achieving >10Gb/s wireless communication at 60GHz. Chapter 5 discusses the fundamental radio implementation challenges associated with channel-bonding for 60GHz wireless communication and the pros and cons of prior arts that attempted to address these challenges. It is followed by a discussion of the proposed 60GHz channel- bonding receiver, which utilizes only a single PLL and enables both contiguous and non- contiguous channel-bonding schemes. Finally, Chapter 6 presents the conclusion of this thesis

Microwave techniques and applications for semiconductor quantum dot mode-locked lasers

Semiconductor mode-locked lasers (MLLs) are important as compact and cost-effective sources of picosecond or sub-picosecond optical pulses with moderate peak powers. They have potential use in various fields including optical interconnects for clock distribution at an inter-chip/intra-chip level as well as high bit-rate optical time division multiplexing (OTDM), diverse waveform generation, and microwave signal generation. However, there are still several challenges to conquer for engineering applications. Semiconductor MLLs sources have generally not been able to match the noise performance and pulse quality of the best solid-state mode-locked lasers. For improving the characteristics of semiconductor mode-locked lasers, research on both the material/device design and stabilization mechanism is necessary. In this dissertation, by extending the net-gain modulation phasor approach based on a microwave photonics perspective, a convenient, yet powerful analytical model is derived and experimentally verified for the cavity design of semiconductor two-section passive MLLs. This model will also be useful in designing the next generation quantum dot (QD) MLL capable of stable operation from 20°C to 100°C for optical interconnects applications. The compact optical generation of microwave signals using a monolithic passive QD MLL is investigated. Relevant equations for the efficient conversion of electrical to optical to electrical (EOE) energy are derived and the device principles are described. In order to verify the function of a QD MLL as an RF signal generator, the integration with a rectangular patch antenna system is also studied. Furthermore, combined with the reconfigurable function, the multi-section QD MLL will be a promising candidate of the compact, efficient RF signal source in wireless, beam steering, and satellite communication applications. The noise performance is a key element for semiconductor MLLs in OTDM communications. The external stabilization methods to improve the timing stability in passive MLLs have been studied and an all-microwave measurement technique has also been developed to determine the pulse-to-pulse rms timing jitter. Compared to the conventional optical cross-correlation technique, the new method provides an alternative and simple approach to characterize the timing jitter in a passive MLL. The average pulse-to-pulse rms timing jitter is reduced to 32 fs/cycle under external optical feedback stabilization

Performance evaluation of currently available VLSI implementations satisfying U-interface requirements for an ISDN in South Africa.

A project report submitted to the Faculty of Engineering, University of the Witwatersrand, Johannesburg, in partial fulfilment of the requirements for the degree of Master of Science in Engineering.This project report examines the performance of three VLSI U-interface implementations satisfying the requirements of Basic Access on an ISDN. The systems evaluated are the Intel 89120,Siemens PEB2090 and STC DSP144, operating on 2BIQ, MMS4J and SU32 line codes respectively. Before evaluating the three abovementioned systems, a review of the underlying principles of U-interface technology is presented. Included in the review are aspects of transmission line theory, line coding, echo-cancellation, decision feedback equalisation, and pulse density modulation. The functional specifications of the three systems are then presented followed by a practical evaluation of each system. As an aid to testing the transmission systems, an evaluation board has been designed and built. The latter provides the necessary functionality to correctly activate each system, as well as the appropriate interfacing requirements for the error-rate tester. The U-interface transmission systems are evaluated on a number of test-loops, comprising sections of cable varying in length and gauge. Additionally, impairments are injected into data-carrying cables, in order to test the performance of each system in the presence of noise. The results of each test are recorded and analysed. Finally, a recommendation is made in favour of the 2BIQ U-interface. It is shown to offer superior transmission performance, at the expense of a slightly higher transmit-power level.Andrew Chakane 201

Development of a new trigger system for spin-filtering studies

Polarized antiprotons allow unique access to a number of fundamental physics observables. One example is the transversity distribution which is the last missing piece to complete the knowledge of the nucleon partonic structure at leading twist in the QCD-based parton model. The transversity is directly measurable via Drell-Yan production in double polarized antiproton-proton collisions. This and a multitude of other findings, which are accessible via ~p ~p scattering experiments, led the Polarized Antiproton eXperiments (PAX) Collaboration to propose such investigations at the High Energy Storage Ring (HESR) of the Facility for Antiproton and Ion Research (FAIR). Futhermore the production of intense polarized antiproton beams is still an unsolved problem, which is the core of the PAX proposal. In this frame, an intense work on the feasibility of this ambitious project is going on at COSY (COoler SYnchrotron of the Institut für KernPhysik –IKP– of the Forschungs Zentrum Jülich) (FZJ) where the work of this thesis has been performed. Presently, the only available method to polarize an antiproton beam is by means of the mechanism of spin-filtering exploiting the spin dependence of the (p p) interaction via the repeated interaction with a polarized hydrogen target. Since the total cross section is different for parallel and antiparallel orientation of the beam particle spins relative to the direction of the target polarization, one spin direction is depleted faster than the other, so that the circulating beam becomes increasingly polarized, while the intensity decreases with time. A spin-filtering experiment with protons has been prepared and finally realized in 2011 at the COSY ring in Jülich. Aims of the spin-filtering experiments at COSY performed by the PAX Collaboration were two. The first was to confirm the present understanding of the spin filtering processes in storage rings, and the second was the commissioning of the experimental setup, which will be used for the experiments with the antiprotons. The major part of my PhD work consisted in the development and commissioning of a new trigger board to be implemented in the Data Acquisition System (DAQ) of the experiment. The motivation for the project was the replacement of the existing old-fashioned trigger system based on NIM logic modules, with a modern system based on FPGA programmable chips. This, also in perspective of the more complex detection system that the Collaboration is planning to realize for the future experimental activity. The trigger board was designed and realized by the electronic workshop of the University of Ferrara and INFN of Ferrara. My first task was to write the control-software of the board. After that I performed a series of development and commissioning tests which successfully demonstrated the full efficiency of the board and gave green light for the implementation of the board in the experimental setup