423 research outputs found

    A contribution to the evaluation and optimization of networks reliability

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    L’évaluation de la fiabilitĂ© des rĂ©seaux est un problĂšme combinatoire trĂšs complexe qui nĂ©cessite des moyens de calcul trĂšs puissants. Plusieurs mĂ©thodes ont Ă©tĂ© proposĂ©es dans la littĂ©rature pour apporter des solutions. Certaines ont Ă©tĂ© programmĂ©es dont notamment les mĂ©thodes d’énumĂ©ration des ensembles minimaux et la factorisation, et d’autres sont restĂ©es Ă  l’état de simples thĂ©ories. Cette thĂšse traite le cas de l’évaluation et l’optimisation de la fiabilitĂ© des rĂ©seaux. Plusieurs problĂšmes ont Ă©tĂ© abordĂ©s dont notamment la mise au point d’une mĂ©thodologie pour la modĂ©lisation des rĂ©seaux en vue de l’évaluation de leur fiabilitĂ©s. Cette mĂ©thodologie a Ă©tĂ© validĂ©e dans le cadre d’un rĂ©seau de radio communication Ă©tendu implantĂ© rĂ©cemment pour couvrir les besoins de toute la province quĂ©bĂ©coise. Plusieurs algorithmes ont aussi Ă©tĂ© Ă©tablis pour gĂ©nĂ©rer les chemins et les coupes minimales pour un rĂ©seau donnĂ©. La gĂ©nĂ©ration des chemins et des coupes constitue une contribution importante dans le processus d’évaluation et d’optimisation de la fiabilitĂ©. Ces algorithmes ont permis de traiter de maniĂšre rapide et efficace plusieurs rĂ©seaux tests ainsi que le rĂ©seau de radio communication provincial. Ils ont Ă©tĂ© par la suite exploitĂ©s pour Ă©valuer la fiabilitĂ© grĂące Ă  une mĂ©thode basĂ©e sur les diagrammes de dĂ©cision binaire. Plusieurs contributions thĂ©oriques ont aussi permis de mettre en place une solution exacte de la fiabilitĂ© des rĂ©seaux stochastiques imparfaits dans le cadre des mĂ©thodes de factorisation. A partir de cette recherche plusieurs outils ont Ă©tĂ© programmĂ©s pour Ă©valuer et optimiser la fiabilitĂ© des rĂ©seaux. Les rĂ©sultats obtenus montrent clairement un gain significatif en temps d’exĂ©cution et en espace de mĂ©moire utilisĂ© par rapport Ă  beaucoup d’autres implĂ©mentations. Mots-clĂ©s: FiabilitĂ©, rĂ©seaux, optimisation, diagrammes de dĂ©cision binaire, ensembles des chemins et coupes minimales, algorithmes, indicateur de Birnbaum, systĂšmes de radio tĂ©lĂ©communication, programmes.Efficient computation of systems reliability is required in many sensitive networks. Despite the increased efficiency of computers and the proliferation of algorithms, the problem of finding good and quickly solutions in the case of large systems remains open. Recently, efficient computation techniques have been recognized as significant advances to solve the problem during a reasonable period of time. However, they are applicable to a special category of networks and more efforts still necessary to generalize a unified method giving exact solution. Assessing the reliability of networks is a very complex combinatorial problem which requires powerful computing resources. Several methods have been proposed in the literature. Some have been implemented including minimal sets enumeration and factoring methods, and others remained as simple theories. This thesis treats the case of networks reliability evaluation and optimization. Several issues were discussed including the development of a methodology for modeling networks and evaluating their reliabilities. This methodology was validated as part of a radio communication network project. In this work, some algorithms have been developed to generate minimal paths and cuts for a given network. The generation of paths and cuts is an important contribution in the process of networks reliability and optimization. These algorithms have been subsequently used to assess reliability by a method based on binary decision diagrams. Several theoretical contributions have been proposed and helped to establish an exact solution of the stochastic networks reliability in which edges and nodes are subject to failure using factoring decomposition theorem. From this research activity, several tools have been implemented and results clearly show a significant gain in time execution and memory space used by comparison to many other implementations. Key-words: Reliability, Networks, optimization, binary decision diagrams, minimal paths set and cuts set, algorithms, Birnbaum performance index, Networks, radio-telecommunication systems, programs

    Optimizing reliable network topology design using dynamic programming

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    This thesis addresses four reliable network topology design problems that consider reliability, cost, and/or bandwidth performance metrics. The optimization problems include one or two objectives and one constraint, each of which is known NP-hard. All problems consider all-terminal and/or two-terminal reliability measures. Four heuristic dynamic programming approaches are proposed, and 10 order criteria are used to improve their optimality and time efficiency. Simulations on hundreds of networks show the merits of the proposed methods

    Logic Synthesis as an Efficient Means of Minimal Model Discovery from Multivariable Medical Datasets

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    In this paper we review the application of logic synthesis methods for uncovering minimal structures in observational/medical datasets. Traditionally used in digital circuit design, logic synthesis has taken major strides in the past few decades and forms the foundation of some of the most powerful concepts in computer science and data mining. Here we provide a review of current state of research in application of logic synthesis methods for data analysis and provide a demonstrative example for systematic application and reasoning based on these methods

    A Comparison between Two All-Terminal Reliability Algorithms

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    Tools and Algorithms for the Construction and Analysis of Systems

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    This open access book constitutes the proceedings of the 28th International Conference on Tools and Algorithms for the Construction and Analysis of Systems, TACAS 2022, which was held during April 2-7, 2022, in Munich, Germany, as part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022. The 46 full papers and 4 short papers presented in this volume were carefully reviewed and selected from 159 submissions. The proceedings also contain 16 tool papers of the affiliated competition SV-Comp and 1 paper consisting of the competition report. TACAS is a forum for researchers, developers, and users interested in rigorously based tools and algorithms for the construction and analysis of systems. The conference aims to bridge the gaps between different communities with this common interest and to support them in their quest to improve the utility, reliability, exibility, and efficiency of tools and algorithms for building computer-controlled systems

    Automated system design optimisation

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    The focus of this thesis is to develop a generic approach for solving reliability design optimisation problems which could be applicable to a diverse range of real engineering systems. The basic problem in optimal reliability design of a system is to explore the means of improving the system reliability within the bounds of available resources. Improving the reliability reduces the likelihood of system failure. The consequences of system failure can vary from minor inconvenience and cost to significant economic loss and personal injury. However any improvements made to the system are subject to the availability of resources, which are very often limited. The objective of the design optimisation problem analysed in this thesis is to minimise system unavailability (or unreliability if an unrepairable system is analysed) through the manipulation and assessment of all possible design alterations available, which are subject to constraints on resources and/or system performance requirements. This thesis describes a genetic algorithm-based technique developed to solve the optimisation problem. Since an explicit mathematical form can not be formulated to evaluate the objective function, the system unavailability (unreliability) is assessed using the fault tree method. Central to the optimisation algorithm are newly developed fault tree modification patterns (FTMPs). They are employed here to construct one fault tree representing all possible designs investigated, from the initial system design specified along with the design choices. This is then altered to represent the individual designs in question during the optimisation process. Failure probabilities for specified design cases are quantified by employing Binary Decision Diagrams (BDDs). A computer programme has been developed to automate the application of the optimisation approach to standard engineering safety systems. Its practicality is demonstrated through the consideration of two systems of increasing complexity; first a High Integrity Protection System (HIPS) followed by a Fire Water Deluge System (FWDS). The technique is then further-developed and applied to solve problems of multi-phased mission systems. Two systems are considered; first an unmanned aerial vehicle (UAV) and secondly a military vessel. The final part of this thesis focuses on continuing the development process by adapting the method to solve design optimisation problems for multiple multi-phased mission systems. Its application is demonstrated by considering an advanced UAV system involving multiple multi-phased flight missions. The applications discussed prove that the technique progressively developed in this thesis enables design optimisation problems to be solved for systems with different levels of complexity. A key contribution of this thesis is the development of a novel generic optimisation technique, embedding newly developed FTMPs, which is capable of optimising the reliability design for potentially any engineering system. Another key and novel contribution of this work is the capability to analyse and provide optimal design solutions for multiple multi-phase mission systems. Keywords: optimisation, system design, multi-phased mission system, reliability, genetic algorithm, fault tree, binary decision diagra

    Energy-Efficient Digital Circuit Design using Threshold Logic Gates

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    abstract: Improving energy efficiency has always been the prime objective of the custom and automated digital circuit design techniques. As a result, a multitude of methods to reduce power without sacrificing performance have been proposed. However, as the field of design automation has matured over the last few decades, there have been no new automated design techniques, that can provide considerable improvements in circuit power, leakage and area. Although emerging nano-devices are expected to replace the existing MOSFET devices, they are far from being as mature as semiconductor devices and their full potential and promises are many years away from being practical. The research described in this dissertation consists of four main parts. First is a new circuit architecture of a differential threshold logic flipflop called PNAND. The PNAND gate is an edge-triggered multi-input sequential cell whose next state function is a threshold function of its inputs. Second a new approach, called hybridization, that replaces flipflops and parts of their logic cones with PNAND cells is described. The resulting \hybrid circuit, which consists of conventional logic cells and PNANDs, is shown to have significantly less power consumption, smaller area, less standby power and less power variation. Third, a new architecture of a field programmable array, called field programmable threshold logic array (FPTLA), in which the standard lookup table (LUT) is replaced by a PNAND is described. The FPTLA is shown to have as much as 50% lower energy-delay product compared to conventional FPGA using well known FPGA modeling tool called VPR. Fourth, a novel clock skewing technique that makes use of the completion detection feature of the differential mode flipflops is described. This clock skewing method improves the area and power of the ASIC circuits by increasing slack on timing paths. An additional advantage of this method is the elimination of hold time violation on given short paths. Several circuit design methodologies such as retiming and asynchronous circuit design can use the proposed threshold logic gate effectively. Therefore, the use of threshold logic flipflops in conventional design methodologies opens new avenues of research towards more energy-efficient circuits.Dissertation/ThesisDoctoral Dissertation Computer Science 201

    Synthesis for circuit reliability

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    textElectrical and Computer Engineerin

    Incremental Processing and Optimization of Update Streams

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    Over the recent years, we have seen an increasing number of applications in networking, sensor networks, cloud computing, and environmental monitoring, which monitor, plan, control, and make decisions over data streams from multiple sources. We are interested in extending traditional stream processing techniques to meet the new challenges of these applications. Generally, in order to support genuine continuous query optimization and processing over data streams, we need to systematically understand how to address incremental optimization and processing of update streams for a rich class of queries commonly used in the applications. Our general thesis is that efficient incremental processing and re-optimization of update streams can be achieved by various incremental view maintenance techniques if we cast the problems as incremental view maintenance problems over data streams. We focus on two incremental processing of update streams challenges currently not addressed in existing work on stream query processing: incremental processing of transitive closure queries over data streams, and incremental re-optimization of queries. In addition to addressing these specific challenges, we also develop a working prototype system Aspen, which serves as an end-to-end stream processing system that has been deployed as the foundation for a case study of our SmartCIS application. We validate our solutions both analytically and empirically on top of our prototype system Aspen, over a variety of benchmark workloads such as TPC-H and LinearRoad Benchmarks
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