825 research outputs found

    Signal Detection in MIMO Systems with Hardware Imperfections: Message Passing on Neural Networks

    Full text link
    In this paper, we investigate signal detection in multiple-input-multiple-output (MIMO) communication systems with hardware impairments, such as power amplifier nonlinearity and in-phase/quadrature imbalance. To deal with the complex combined effects of hardware imperfections, neural network (NN) techniques, in particular deep neural networks (DNNs), have been studied to directly compensate for the impact of hardware impairments. However, it is difficult to train a DNN with limited pilot signals, hindering its practical applications. In this work, we investigate how to achieve efficient Bayesian signal detection in MIMO systems with hardware imperfections. Characterizing combined hardware imperfections often leads to complicated signal models, making Bayesian signal detection challenging. To address this issue, we first train an NN to "model" the MIMO system with hardware imperfections and then perform Bayesian inference based on the trained NN. Modelling the MIMO system with NN enables the design of NN architectures based on the signal flow of the MIMO system, minimizing the number of NN layers and parameters, which is crucial to achieving efficient training with limited pilot signals. We then represent the trained NN with a factor graph, and design an efficient message passing based Bayesian signal detector, leveraging the unitary approximate message passing (UAMP) algorithm. The implementation of a turbo receiver with the proposed Bayesian detector is also investigated. Extensive simulation results demonstrate that the proposed technique delivers remarkably better performance than state-of-the-art methods

    Optimal Power Allocation by Imperfect Hardware Analysis in Untrusted Relaying Networks

    Get PDF
    By taking a variety of realistic hardware imperfections into consideration, we propose an optimal power allocation (OPA) strategy to maximize the instantaneous secrecy rate of a cooperative wireless network comprised of a source, a destination and an untrusted amplify-and-forward (AF) relay. We assume that either the source or the destination is equipped with a large-scale multiple antennas (LSMA) system, while the rest are equipped with a single antenna. To prevent the untrusted relay from intercepting the source message, the destination sends an intended jamming noise to the relay, which is referred to as destination-based cooperative jamming (DBCJ). Given this system model, novel closed-form expressions are presented in the high signal-to-noise ratio (SNR) regime for the ergodic secrecy rate (ESR) and the secrecy outage probability (SOP). We further improve the secrecy performance of the system by optimizing the associated hardware design. The results reveal that by beneficially distributing the tolerable hardware imperfections across the transmission and reception radio-frequency (RF) front ends of each node, the system's secrecy rate may be improved. The engineering insight is that equally sharing the total imperfections at the relay between the transmitter and the receiver provides the best secrecy performance. Numerical results illustrate that the proposed OPA together with the most appropriate hardware design significantly increases the secrecy rate.Comment: 29 pages, 7 figures, Submitted to IEEE Transactions on Wireless Communication

    Massive MIMO with Non-Ideal Arbitrary Arrays: Hardware Scaling Laws and Circuit-Aware Design

    Get PDF
    Massive multiple-input multiple-output (MIMO) systems are cellular networks where the base stations (BSs) are equipped with unconventionally many antennas, deployed on co-located or distributed arrays. Huge spatial degrees-of-freedom are achieved by coherent processing over these massive arrays, which provide strong signal gains, resilience to imperfect channel knowledge, and low interference. This comes at the price of more infrastructure; the hardware cost and circuit power consumption scale linearly/affinely with the number of BS antennas NN. Hence, the key to cost-efficient deployment of large arrays is low-cost antenna branches with low circuit power, in contrast to today's conventional expensive and power-hungry BS antenna branches. Such low-cost transceivers are prone to hardware imperfections, but it has been conjectured that the huge degrees-of-freedom would bring robustness to such imperfections. We prove this claim for a generalized uplink system with multiplicative phase-drifts, additive distortion noise, and noise amplification. Specifically, we derive closed-form expressions for the user rates and a scaling law that shows how fast the hardware imperfections can increase with NN while maintaining high rates. The connection between this scaling law and the power consumption of different transceiver circuits is rigorously exemplified. This reveals that one can make the circuit power increase as N\sqrt{N}, instead of linearly, by careful circuit-aware system design.Comment: Accepted for publication in IEEE Transactions on Wireless Communications, 16 pages, 8 figures. The results can be reproduced using the following Matlab code: https://github.com/emilbjornson/hardware-scaling-law

    Circuit-Aware Design of Energy-Efficient Massive MIMO Systems

    Get PDF
    Densification is a key to greater throughput in cellular networks. The full potential of coordinated multipoint (CoMP) can be realized by massive multiple-input multiple-output (MIMO) systems, where each base station (BS) has very many antennas. However, the improved throughput comes at the price of more infrastructure; hardware cost and circuit power consumption scale linearly/affinely with the number of antennas. In this paper, we show that one can make the circuit power increase with only the square root of the number of antennas by circuit-aware system design. To this end, we derive achievable user rates for a system model with hardware imperfections and show how the level of imperfections can be gradually increased while maintaining high throughput. The connection between this scaling law and the circuit power consumption is established for different circuits at the BS.Comment: Published at International Symposium on Communications, Control, and Signal Processing (ISCCSP 2014), 4 pages, 3 figures. This version corrects an error related to Lemma

    Massive MIMO Systems with Hardware Imperfections

    Get PDF
    Recent years have witnessed an unprecedented explosion in mobile data traffic, due to the expansion of numerous types of wireless devices. Moreover, each device needs a high throughput to support demanding applications such as real-time video, movie streaming and games. Thus, future wireless systems have to satisfy three main requirements: 1) having a high throughput; 2) simultaneously serving many users; and 3) less energy consumption. Massive multiple-input multiple-output (MIMO) systems meet the aforementioned requirements and is nowadays a well-established technology which forms the backbone of the fifth-generation (5G) cellular communication systems.\ua0However, massive MIMO systems, i.e. employing hundreds or even thousands of antennas, will be a viable solution in the future only if low-cost and energy-efficient hardware is deployed. Unfortunately, low-cost, low-quality hardware is prone to hardware impairments such as in-phase and quadrature imbalance (IQI) and phase noise.\ua0\ua0Moreover, one of the dominant sources of power consumption in massive MIMO systems are the data converters at the BS. The baseband signal at each radio-frequency (RF) chain is generated by a pair of analog-to-digital converters (ADCs). The power consumption of these ADCs increases exponentially with the resolution (in bits) and linearly with the bandwidth. In conventional multi-antenna systems, each RF port is connected to a pair of high-resolution ADCs (e.g., 10-bit or more). For massive MIMO systems this would lead to prohibitively high-power consumption due to the large number of required ADCs. Hence, the ADC resolution must be limited to keep the power budget within tolerable levels.In this thesis, we investigate the performance of massive MIMO systems in non-ideal hardware. We begin with by studying the impact of IQI on massive MIMO systems. Important insights are gained through the analysis of system performance indicators, such as channel estimation and achievable rates by deriving tractable approximations of the ergodic spectral efficiency.First, a novel pilot-based joint estimator of the uplink augmented MIMO channel matrix and receiver IQI coefficients is described and then, a low-complexity IQI compensation scheme is proposed which is based on the receiver IQI coefficients\u27 estimation and it is independent of the channel gain.\ua0Second, we investigate the impact of the transceiver IQI in massive MIMO considering a time division duplexing (TDD) system where we assume uplink/downlink channel reciprocity in the downlink precoding design. The uplink channel estimation accuracy and the achievable downlink rate of the regularized zero-forcing (RZF) and maximum ratio transmission (MRT) is studied when there is mismatch between the uplink and downlink channels.\ua0Finally, we analyze the quantization distortion in limited-precision ADCs in uplink massive MIMO systems whose channel state information (CSI) is not known a priori to transmitter and receiver. We show that even a small percentage of clipped samples at the receiver can downgrade considerably the systems performance and propose near-optimal low-complexity solutions to reconstruct the clipped signal

    DeepDeMod: BPSK Demodulation Using Deep Learning Over Software-Defined Radio

    Get PDF
    In wireless communication, signal demodulation under non-ideal conditions is one of the important research topic. In this paper, a novel non-coherent binary phase shift keying demodulator based on deep neural network, namely DeepDeMod, is proposed. The proposed scheme makes use of neural network to decode the symbols from the received sampled signal. The proposed scheme is developed to demodulate signal under fading channel with additive white Gaussian noise along with hardware imperfections, such as phase and frequency offset. The time varying nature of hardware imperfections and channel poses a additional challenge in signal demodulation. In order to address this issue, additionally we propose transfer learning based DeepDeMod scheme. Pilot symbols along with data is transmitted in a packet which is used to learn the time varying parameters from the pilot reception followed by data demodulation. Results show that compared with the conventional demodulators and other machine learning based demodulators, our proposed DeepDeMod provides significantly better performance in term of bit error rate. We also implement the proposed DeepDeMod on software defined radio and present the experimental results
    corecore