Depression at Workplaces: The Factors that Influencing and How to Overcome the Issues

Depression is a complex condition with a wide range of expressions of opinions, feelings, and attitudes that can directly strike anyone, and when we consider someone suffering from workplace depression, an amount of work and non-work-related aspects might be at work. Although depression is treatable, it is frequently a lifelong condition with periods of wellness punctuated with depressed illnesses. The objective of the study is to discuss the factors that influencing depression among workers and how to overcome these issues to improve their productivity. To emphasize, this study discussed a various common risks factor that led to depression at workplace in the first subtopic. In the discussion stated about toxic workplace environment, workplace sexual harassment, discrimination, abusive and bullying and excessive workload. Meanwhile employer is a main role to establishing supportive work environment to improve workers motivation at a workplace. In second subtopic discussed the several awareness that can be implemented by three categories which is employer, the authorities and by individuals to play their own role to overcome the depression issue such as providing programme that can increasing self-awareness among community. People may require a more comprehensive understanding of depression, as well as the significance of the work environment in impacting job incapacity due to depression. Thus, this paper will provide a better understanding about the issues for future direction

Χρήση μοντέλου παράλληλου προγραμματισμού για σύνθεση αρχιτεκτονικών

The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this Dissertation we introduce a methodology to automatically synthesize hardware accelerators from OpenCL applications. OpenCL is a recent industry supported standard for writing programs that execute on multicore platforms and accelerators such as GPUs. Our methodology maps OpenCL kernels into hardware accelerators based on architectural templates that explicitly decouple computation from memory communication whenever this is possible. The templates can be tuned to provide a wide repertoire of accelerators that meet user performance requirements and FPGA device characteristics. Furthermore a set of high- and low-level compiler optimizations is applied to generate optimized accelerators. Our experimental evaluation shows that the generated accelerators are tuned efficiently to match the applications memory access pattern and computational complexity and to achieve user performance requirements. An important objective of our tool is to expand the FPGA development user base to software engineers thereby expanding the scope of FPGAs beyond the realm of hardware design.To πρόβλημα της αυτόματης δημιουργίας μονάδων υλικό από παραστάσεις υψηλού επιπέδου εφαρμογής είναι στην πρώτη γραμμή της EDA έρευνας κατά τη διάρκεια των τελευταίων ετών. Σε αυτή την διατριβή παρουσιάζουμε μια μεθοδολογία για τη αυτόματη σύνθεση επιταχυντές υλικού από εφαρμογές OpenCL. OpenCL είναι ένα πρόσφατο πρότυπο για τη σύνταξη των προγραμμάτων που εκτελούνται σε πλατφόρμες πολλαπλών πυρήνων και επιταχυντές όπως GPUs. Η μεθοδολογία μας μετατρέπει προγράμματα OpenCL σε επιταχυντές υλικού με βάση αρχιτεκτονικά πρότυπα που ρητά αποσυνδέει τους υπολογισμούς από την μεταφορά δεδομένων από/προς την μνήμη όποτε αυτό είναι δυνατό. Τα πρότυπα μπορούν να συντονιστούν ώστε να παρέχουν ένα ευρύ ρεπερτόριο από επιταχυντές που πληρούν τις απαιτήσεις απόδοσης των χρηστών και τα χαρακτηριστικά της συσκευής FPGA. Επιπλέον ένα σύνολο υψηλής και χαμηλής στάθμης βελτιστοποιήσεις μεταγλωττιστή εφαρμόζεται για να παράγει βελτιστοποιημένα επιταχυντές. Η πειραματική αξιολόγηση δείχνει ότι οι επιταχυντές που δημιουργούνται αποτελεσματικά συντονισμένοι για να ταιριάζει με το μοτίβο πρόσβασης στην μνήμη κάθε εφαρμογής και την υπολογιστική πολυπλοκότητα και να επιτύχουν τις απαιτήσεις απόδοσης των χρηστών. Ένας σημαντικός στόχος του εργαλείου μας είναι η επέκταση της βάσης χρηστών πλατφόρμες FPGA για μηχανικούς λογισμικού ώστε να γίνει ανάπτυξη FPGA συστήματα από μηχανικούς λογισμικού χωρίς την ανάγκη για εμπειρία σχεδιασμού υλικού

Speech sound acquisition and phonological error patterns in child speakers of Syrian Arabic: a normative study

The lack of norms for speech sound acquisition and phonological error patterns in the Syrian variety of Arabic is one of the challenging aspects of diagnosing and treating speech disorders in speakers of this language. Although there are normative data which speech language therapists could use to assess the phonological skills of Syrian children, these are based on data standardized on children speaking other varieties of Arabic, such as Jordanian. This may lead to incorrect diagnosis and inappropriate treatment. In order to address this problem, a detailed study of Syrian Arabic was carried out for this thesis. This study was carried out to provide reliable normative data for speech sound acquisition and phonological error patterns in Syrian children between the ages of 2:6 and 6:5. One hundred and sixty typically developing Syrian children were recruited from Damascus to participate in this cross-sectional study. The results indicate that acquisition of the vowels in Syrian Arabic was almost complete by the age of 3. However, some errors persisted at this age and these mainly related to the production of diphthongs. The two diphthongs which were studied did not appear in the children’s speech samples until the age of 5:0-5:5, but they did not reach the acquisition criterion. For the consonants, the results suggest that there is a gradual development in their correct production: correct production started at 71.3% at the age of 2:6-3:0 and increased with age to 94.3% in children aged 6:0-6:5. All the consonants in Syrian Arabic were acquired by age 6:5, except for the affricate /ʒ/. The order of consonant acquisition in terms of sound class was: median approximants > nasals > plosives > the lateral approximant /l/ > all fricatives except/ʒ/ > the trill. The findings also showed that the order of speech sound acquisition in Syrian children is very similar to that in children from other language backgrounds. The results for consonant acquisition also indicated that 11 consonants are acquired between the ages of 2:6-4:0. These early-acquired consonants are / b, f, j, m, n, l, t, d, h, ʔ, w, h /. They include plosives, nasals, the lateral and a few fricatives. One of these fricatives has an anterior place of articulation while three are produced in the posterior portion of the oral cavity, i.e. /h, ʔ, ʕ/. Seven consonants were acquired between the ages of 4:0 and 5:0. These were /x, s, z , ʕ, tˁ, dˁ, k/. Most of which are fricatives and emphatics. The late-acquired consonants are /ʃ, r, sˁ, ɣ/ which are acquired between the ages of 5:0 and 6:5. There were clear differences in the percentage of correctly produced consonants indifferent word positions. In general, word-final consonants were produced correctly slightly more often than those in initial and medial positions. This was true for all agegroups. This difference was significant between initial and final position, and between medial and final positions; however, no significant difference was found between initial and medial positions. As far as the phonological error patterns (all phonological error patterns whatever their percentage big or small) are concerned this study identified a total of 11 phonological error patterns in Syrian children. These errors were: r-deviation, fronting, stridency deletion, de-emphasis, weak syllable deletion, stopping, backing, glottalization, devoicing and assimilation. There was also one dialectal error pattern called epenthesis, in which a vowel is inserted between consonants in order to simplify their pronunciation. Epenthesis is singled out from phonological error patterns that while it is considered a phonological error pattern in some languages, in Syria it is a dialectal error appears in normal speech and as such not consider phonological error pattern. Using a developmental criterion to define the phonological error patterns used by Syrian children, the study revealed that there are 9 typical phonological errors. These errors are: r-deviation, fronting, stridency deletion, de-emphasis, weak syllable deletion, consonant deletion, backing, glottalization, and devoicing. The results of this study showed that Syrian children no longer produce developmental errors by the age of 5:5

Χρήση μοντέλου παράλληλου προγραμματισμού για σύνθεση αρχιτεκτόνων

The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this Dissertation we introduce a methodology to automatically synthesize hardware accelerators from OpenCL applications. OpenCL is a recent industry supported standard for writing programs that execute on multicore platforms and accelerators such as GPUs. Our methodology maps OpenCL kernels into hardware accelerators based on architectural templates that explicitly decouple computation from memory communication whenever this is possible. The templates can be tuned to provide a wide repertoire of accelerators that meet user performance requirements and FPGA device characteristics. Furthermore a set of high- and low-level compiler optimizations is applied to generate optimized accelerators. Our experimental evaluation shows that the generated accelerators are tuned efficiently to match the applications memory access pattern and computational complexity and to achieve user performance requirements. An important objective of our tool is to expand the FPGA development user base to software engineers thereby expanding the scope of FPGAs beyond the realm of hardware design.To πρόβλημα της αυτόματης δημιουργίας μονάδων υλικό από παραστάσεις υψηλού επιπέδου εφαρμογής είναι στην πρώτη γραμμή της EDA έρευνας κατά τη διάρκεια των τελευταίων ετών. Σε αυτή την διατριβή παρουσιάζουμε μια μεθοδολογία για τη αυτόματη σύνθεση επιταχυντές υλικού από εφαρμογές OpenCL. OpenCL είναι ένα πρόσφατο πρότυπο για τη σύνταξη των προγραμμάτων που εκτελούνται σε πλατφόρμες πολλαπλών πυρήνων και επιταχυντές όπως GPUs. Η μεθοδολογία μας μετατρέπει προγράμματα OpenCL σε επιταχυντές υλικού με βάση αρχιτεκτονικά πρότυπα που ρητά αποσυνδέει τους υπολογισμούς από την μεταφορά δεδομένων από/προς την μνήμη όποτε αυτό είναι δυνατό. Τα πρότυπα μπορούν να συντονιστούν ώστε να παρέχουν ένα ευρύ ρεπερτόριο από επιταχυντές που πληρούν τις απαιτήσεις απόδοσης των χρηστών και τα χαρακτηριστικά της συσκευής FPGA. Επιπλέον ένα σύνολο υψηλής και χαμηλής στάθμης βελτιστοποιήσεις μεταγλωττιστή εφαρμόζεται για να παράγει βελτιστοποιημένα επιταχυντές. Η πειραματική αξιολόγηση δείχνει ότι οι επιταχυντές που δημιουργούνται αποτελεσματικά συντονισμένοι για να ταιριάζει με το μοτίβο πρόσβασης στην μνήμη κάθε εφαρμογής και την υπολογιστική πολυπλοκότητα και να επιτύχουν τις απαιτήσεις απόδοσης των χρηστών. Ένας σημαντικός στόχος του εργαλείου μας είναι η επέκταση της βάσης χρηστών πλατφόρμες FPGA για μηχανικούς λογισμικού ώστε να γίνει ανάπτυξη FPGA συστήματα από μηχανικούς λογισμικού χωρίς την ανάγκη για εμπειρία σχεδιασμού υλικού

Κανονική συνθήκη ορισμού, λίστα ορισμών, διεύθυνση, σχεδίαση και υλοποίηση αρχιτεκτονικής υψηλής απόδοσης για τους αλγόριθμους μετασχηματισμού και κβαντοποίησης του Η.264

Efficient digital video coding techniques are increasingly gaining importance due to the widespread of low bit rate video streaming applications (like videotelephony and videoconferencing). This raises the need for an industry standard for compressed video representation with substantially increased coding efficiency and enhanced robustness to network environments. In 2001, the Joint Video Team (JVT) was formed to represent the cooperation between the ITU-T Video Coding Expert Group (VCEG) and the ISO/IEC Moving Picture Expert Group (MPEG) aiming for the development of a new Standard. The JVT aim was to finalize the H.26L proposal and convert it into an international standard (H.264/MPEG-4 Part 10) published by both ISO/IEC and ITU-T. H.264 provides similar functionality to earlier standards such as H.263+and MPEG-4 Visual (Simple Profile) but with significantly better compression performance and improved support for reliable transmission. It does not use the traditional 8^8 DCT transform as the basic transform, instead it suggests 4x4 DCT-based transform that can be implemented only using integer addition and shift units and avoids use of multiplication. In this project, a hardware prototype is designed for the H.264 supported quantization and variant types of supported transforms (core transform, 2x2 and 4x4 hadmard transforms). Also the inverse transform and quantization path is considered. The architecture is prototyped and simulated using ModelSim 6.1®. It is synthesized using Synopsys Design Compiler®

Beyond Fertile Memories: Palestinian Cinematic Expressions of Generational Female Resistance to Patriarchal and Colonial Oppression

Under both occupation and a patriarchal society, Palestinian women of different generations take up varying roles in resistance, or lack thereof, and this is a trope often explored within the context of Palestinian cinema. To examine this, I will consider the role of women in Michel Khleifi’s Fertile Memory (1980) and Wedding in Galilee (1988), Annemarie Jacir’s When I Saw You (2012), and Elia Suleiman’s Divine Intervention (2005) from lenses of space occupied by the female characters, as well as their generational differences. In a Palestinian context, a dynamic often exists with regards to female resistance against the occupation and against the patriarchy.&nbsp

Single-Pass Covariance Matrix Calculation on a Hybrid FPGA/CPU Platform

Covariance matrices are used for a wide range of applications in particle physics, including Kálmán filter for tracking purposes or Primary Component Analysis for dimensionality reduction. Based on a novel decomposition of the covariance matrix, a design that requires only one pass of data for calculating the covariance matrix is presented. Two computation engines are used depending on parallelizability of the necessary computation steps. The design is implemented onto a hybrid FPGA/CPU system and yields speed-up of up to 5 orders of magnitude compared to previous FPGA implementation

A high performance and low power hardware architecture for the transform & quantization stages in H.264

In this work, we present a hardware architecture prototype for the various types of transforms and the accompanying quantization, supported in H.264 baseline profile video encoding standard. The proposed architecture achieves high performance and can satisfy Quad Full High Definition (QFHD) (3840x2160@150Hz) coding. The transforms are implemented using only add and shift operations, which reduces the computation overhead. A modification in the quantization equations representation is suggested to remove the absolute value and resign operation stages overhead. Additionally, a post-scale Hadamard transform computation is presented. The architecture can achieve a reduction of about 20% in power consumption, compared to existing implementations. ©2009 IEEE