RTD based logic circuits using generalized threshold gates

Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e. these circuits are built from threshold gates (TGs). The MOBILE realization of generalized threshold gates is being investigated. Multi-Threshold Threshold Gates (MTTGs) have been proposed which further increase the functionality of the original TGs. Recently, we have proposed a novel MOBILE circuit topology obtained by fundamental properties of threshold functions. This paper describes the design of n-bit adders using these novel MOBILE circuit topologies. A comparison with designs based on TGs and MTTGs is carried out showing advantages in terms of speed and power delay product and device counts.España, Gobierno TEC2007-67245Junta de Andalucía EXC/2007/TIC-296

Two-phase RTD-CMOS pipelined circuits

MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) allowing high through output. Resonant tunneling diode (RTD)-based MOBILE nanopipelined circuits have been reported using different clock schemes including a four-phase strategy and a single-phase clock scheme. In particular, significant power advantages of single-phase RTD-CMOS MOBILE circuits over pure CMOS have been shown. This letter compares the RTD-CMOS realizations using a single clock and a novel two-phase clock solution. Significant superior robustness and performance in terms of power and area are obtained for the two-phase implementations

Efficient state reduction methods for PLA-based sequential circuits

Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail. Results on machines from the literature and from the MCNC benchmark set are shown. The area of the PLA implementation of the combinational component and the design time are used as figures of merit. The comparison of such parameters, when the state reduction step is included in the design process and when it is not, suggests that fast state-reduction heuristics should be implemented within FSM automatic synthesis systems

Efficient realization of a threshold voter for self-purging redundancy

The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, the threshold voter. A very efficient implementation of this voter is presented which uses a decomposition technique to substantially reduce the circuit complexity and delay, as compared to alternative implementations.Comisión Interministerial de Ciencia y Tecnología TIC97-064

Sorting networks implemented as νMOS circuits

A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.Comisión Interministerial de Ciencia y Tecnología TIC95-0094, TIC97-064

A practical floating-gate Muller-C element using vMOS threshold gates

This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on threshold logic gates are used. Some practical problems in the vMOS implementation of threshold gates have been identified and solved. The feasibility and versatility of the proposed technique as well as its potential as a low-cost design technique for CMOS technologies have been shown by experimental results from a multiple-input Muller C-element. The proposed new realization exhibits better performance related to delay and area and power consumption than the traditional logic implementation

Early Miocene sloths (Xenarthra, Folivora) from the Río Santa Cruz valley (southern Patagonia, Argentina). Ameghino, 1887 revisited

La primera exploración geológica y paleontológica de la Formación Santa Cruz (Mioceno Temprano–Medio; Burdigaliense–Langhiense temprano) a lo largo del Río Santa Cruz fue llevada a cabo en 1887 por Carlos Ameghino, quien recuperó más de 2.000 restos fósiles. Ese mismo año, su hermano Florentino estudió y reportó estos restos fósiles; reconoció 122 taxones de los cuales 110 eran nuevas especies. De estas últimas, resultaron 14 nuevas especies de perezosos (Xenarthra, Folivora). En esta contribución se reportan y describen nuevos restos fósiles de perezosos recuperados en trabajos de campo recientes (entre 2013 y 2014) en la margen sur del Río Santa Cruz. Los nuevos especímenes provienen de dos localidades: Barrancas Blancas y Segundas Barrancas Blancas. Se analizó la riqueza taxonómica del grupo en comparación con otras localidades santacrucenses estudiadas recientemente, e.g., de la costa atlántica y de la región andina. Se incluye además un análisis de los taxones originales erigidos por Ameghino. Debido a que muchos de los especímenes originales sobre los que se han basado estos taxones ya no están disponibles, se analiza la importancia de las nuevas colecciones para resolver cuestiones sistemáticas y se consideran los especímenes sobre los que Ameghino erigió las primeras especies en 1887. Asimismo, se evalúa el grado en que las decisiones sistemáticas sobre perezosos santacrucenses realizadas por W.B. Scott, en 1903 y 1904, deben continuar siendo reconocidas.The first detailed geological and paleontological survey of the Santa Cruz Formation (Early–Middle Miocene; Burdigalian–early Langhian) along the Río Santa Cruz was carried out in 1887 by Carlos Ameghino, who recovered more than 2000 fossil remains. In that same year, his brother Florentino studied and reported these remains, recognizing 122 taxa, of which 110 were new species. Fourteen of these new species were of sloths (Xenarthra, Folivora). In this contribution we report and describe new fossil sloth remains recovered in recent expeditions (between 2013 and 2014) along the southern banks of the Río Santa Cruz. The new specimens were recovered from two localities: Barrancas Blancas and Segundas Barrancas Blancas. We review the taxonomic richness of fossil sloths, in comparison with other Santacrucian localities recently studied, e.g, from the Atlantic coast and from the Andean region. An analysis of the original taxa erected by Ameghino is also included. As several of the original fossils on which these taxa are based are no longer available, we explore the value of the new collection in helping resolve systematic issues, as well as considering the specimens that formed the basis for the species erected by Ameghino in 1887. Further, the degree to which W.B. Scott’s systematic decisions on the Santacrucian sloths, published in 1903 and 1904, should continue to be recognized is also assessed.Fil: Bargo, María Susana. Universidad Nacional de La Plata. Facultad de Ciencias Naturales y Museo. Departamento Científico de Paleontología de Vertebrados; Argentina. Provincia de Buenos Aires. Gobernación. Comisión de Investigaciones Científicas; ArgentinaFil: De Iullis, Gerardo. University of Toronto; CanadáFil: Toledo, Néstor. Universidad Nacional de La Plata. Facultad de Ciencias Naturales y Museo. Departamento Científico de Paleontología de Vertebrados; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

Simplified single-phase clock scheme for MOBILE networks

MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly chained, a four-phase clock scheme is required for this. A single-phase scheme is possible adding latches to the MOBILE gates. Proposed and experimentally validated is a new single-phase interconnection scheme that simplifies the inter-stage element, which translates in power, area and clock load advantages with respect to using latches.Ministerio de Ciencia e Innovación TEC2007-67245, TEC2010-18937Junta de Andalucía TIC-296

Improved nanopipelined RTD adder using generalized threshold gates

Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e. these circuits are built from thres hold gates (TGs). This paper describes the design of full adders (FAs) using TG based circuit topologies. Both the selection of different MOBILE TG networks and the use of gates that can be considered extensions of the MOBILE TG are addressed. The FAs are applied to the design of nanopipelined carry propagations adders which are evaluated and compared to a previously reported one, showing advantages in terms of speed, power and power delay product.Gobierno de España TEC2007-67245Gobierno de Andalucía EXC/2007/TIC-296

Redes MOBILE MOS-NDR operando con reloj de una fase

La existencia de dispositivos con una característica I-V que exhibe una resistencia diferencial negativa (Negative Differential Resistance, NDR) resulta atractiva desde el punto de vista del diseño de circuitos, como ha sido demostrado por los circuitos que usan diodos basados en el efecto túnel resonante (Resonant Tunneling Diodes, RTDs). Ideas procedentes de diseños con RTDs pueden exportarse a un entorno “todo CMOS” en el que la característica NDR se obtiene mediante transistores (MOS-NDR). En este artículo se proponen estructuras MOS-NDR para realizar puertas lógicas (Threshold Gates, TGs) que operan según el principio de operación MOBILE (MOnostable to BIstable Logic Element). Además, se demuestra que estas puertas pueden interconectarse para formar redes que operan en modo pipeline usando un esquema de reloj de una fase.España, Ministerio de Investigación y Ciencia TEC2007-67245España, Junta de Andalucía P07-TIC-0296