RTD based logic circuits using generalized threshold gates

Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e. these circuits are built from threshold gates (TGs). The MOBILE realization of generalized threshold gates is being investigated. Multi-Threshold Threshold Gates (MTTGs) have been proposed which further increase the functionality of the original TGs. Recently, we have proposed a novel MOBILE circuit topology obtained by fundamental properties of threshold functions. This paper describes the design of n-bit adders using these novel MOBILE circuit topologies. A comparison with designs based on TGs and MTTGs is carried out showing advantages in terms of speed and power delay product and device counts.España, Gobierno TEC2007-67245Junta de Andalucía EXC/2007/TIC-296

Two-phase RTD-CMOS pipelined circuits

MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) allowing high through output. Resonant tunneling diode (RTD)-based MOBILE nanopipelined circuits have been reported using different clock schemes including a four-phase strategy and a single-phase clock scheme. In particular, significant power advantages of single-phase RTD-CMOS MOBILE circuits over pure CMOS have been shown. This letter compares the RTD-CMOS realizations using a single clock and a novel two-phase clock solution. Significant superior robustness and performance in terms of power and area are obtained for the two-phase implementations

Efficient state reduction methods for PLA-based sequential circuits

Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail. Results on machines from the literature and from the MCNC benchmark set are shown. The area of the PLA implementation of the combinational component and the design time are used as figures of merit. The comparison of such parameters, when the state reduction step is included in the design process and when it is not, suggests that fast state-reduction heuristics should be implemented within FSM automatic synthesis systems

Efficient realization of a threshold voter for self-purging redundancy

The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, the threshold voter. A very efficient implementation of this voter is presented which uses a decomposition technique to substantially reduce the circuit complexity and delay, as compared to alternative implementations.Comisión Interministerial de Ciencia y Tecnología TIC97-064

Sorting networks implemented as νMOS circuits

A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.Comisión Interministerial de Ciencia y Tecnología TIC95-0094, TIC97-064

Machine Translation and Postediting: Impact of Training and Directionality on Quality and Productivity.

El objetivo de nuestro estudio piloto es doble: por un lado, explorar el impacto de la formación de los participantes tanto en la calidad como en la productividad de la posedición y, por otro, comparar la calidad y la velocidad al poseditar a la L1 frente a la calidad y velocidad al posteditar a la L2

Text Simplification In A Case Study With A Translation Student With Asperger’s Syndrome.

The aim of our paper is to present a case study carried out with a Translation and Interpreting student with Asperger’s Syndrome (AS) in the framework of the e-learning project “TRADICOR: Corpora Management System for the Teaching Innovation in Translation and Interpreting” (PIE13-054). Our hypothesis is the following: when students with AS translate texts, simplification at two levels (text simplification and instructions simplifications) represents an improvement on translation quality and entails a better understanding of instructions. To confirm this hypothesis, the following four goals have been established: 1) apply text implification to instructions in Spanish and to source texts in Spanish using Anula’s recommendations; 2) checking the readability of the Spanish simplified and non-simplified source texts and instructions using two Spanish formulae: the Flesch-Szigriszt Index and the Fernández Huerta Index; 3) assessing target texts using Toledo Báez’s analytic assessment template in order to check whether text simplification implies an improvement on translation quality; 4) test whether the participant has better understood simplified explicit instructions than non-simplified explicit instructions. As a summary of the results, it has been proven that instructions simplification does have a positive impact on the comprehension and the participant could accomplish the assignment. However, non-simplified instructions hinder comprehension as the participant was not able to accomplish the assignment. Regarding translation quality, the difference between simplified texts and non-simplified texts is not relevant and texts show similar errors

Contributing to VRPN with a new server for haptic devices (ext. version)

This article is an extended version of the poster paper: Cuevas-Rodriguez, M., Gonzalez-Toledo D., Molina-Tanco, L., Reyes-Lecuona A., 2015, November. “Contributing to VRPN with a new server for haptic devices”. In Proceedings of the ACM symposium on Virtual reality software and technology. ACM.http://dx.doi.org/10.1145/2821592.2821639VRPN is a middleware to access Virtual Reality peripherals. VRPN standard distribution supports Geomagic® (formerly Phantom) haptic devices through the now superseded GHOST library. This paper presents VRPN OpenHaptics Server, a contribution to VRPN library that fully reimplements VRPN support of Geomagic Haptic Devices. The implementation is based on the OpenHaptics v3.0 HLAPI layer, which supports all Geomagic Haptic Devices. We present the architecture of the contributed server, a detailed description of the offered API and an analysis of its performance in a set of example scenarios.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech