In situ UHVEM study of {113}-defect formation in Si nanowires

Results are presented of a study of {113}-defect formation in vertical Si nanowire n-type tunnel field effect transistors with nanowire diameters ranging from 40 to 500 nm. The nanowires are etched into an epitaxial moderately As doped n-type layer grown on a heavily As doped n(+) Si substrate. p(+) contacts on the nanowire are created by epitaxial growth of a heavily B doped layer. Using focused ion beam cutting, samples for irradiation are prepared with different thicknesses so that the nanowires are fully or partially embedded in the sample thickness. {113}-defects are created in situ by 2 MeV e-irradiation in an ultra-high voltage electron microscope between room temperature and 375 degrees C. The observations are discussed in the frame of intrinsic point defect properties, taking into account the role of dopants and capping layers. The important impact of the specimen thickness is elucidated

Correlation between surface reconstruction and polytypism in InAs nanowire selective area epitaxy

Themechanism of widely observed intermixing of wurtzite and zinc-blende crystal structures in InAs nanowire (NW) grown by selective area epitaxy (SAE) is studied. We demonstrate that the crystal structure in InAs NW grown by SAE can be controlled using basic growth parameters, and wurtzitelike InAs NWs are achieved.We link the polytypic InAs NWs SAE to the reconstruction of the growth front (111)B surface. Surface reconstruction study of InAs (111) substrate and the following homoepitaxy experiment suggest that (111) planar defect nucleation is related to the (1 × 1) reconstruction of InAs (111)B surface. In order to reveal it more clearly, a model is presented to correlate growth temperature and arsenic partial pressure with InAs NW crystal structure. This model considers the transition between (1 × 1) and (2 × 2) surface reconstructions in the frame of adatom atoms adsorption/desorption, and the polytypism is thus linked to reconstruction quantitatively. The experimental data fit well with the model, which highly suggests that surface reconstruction plays an important role in the polytypism phenomenon in InAs NWs SAE.https://doi.org/10.1103/PhysRevMaterials.1.074603Peer Reviewe

Temperature impact on the tunnel fet off-state current components

In this work, the temperature impact on the off-state current components is analyzed through numerical simulation and experimentally. First of all, the band-to-band tunneling is studied by varying the underlap in the channel/drain junction, leading to an analysis of the different off-state current components. For pTFET devices, the best behavior for off-state current was obtained for higher values of underlap (reduced BTBT) and at low temperatures (reduced SRH and TAT). At high temperature, an unexpected off-state current occurred due to the thermal leakage current through the drain/channel junction. Besides, these devices presented a good performance when considering the drain current as a function of the drain voltage, making them suitable for analog applications. (C) 2012 Elsevier Ltd. All rights reserved.CNPqFAPESPCNPq-FWO Brazil-Flander

Challenges in scaling of CMOS devices towards 65 nm node, Journal of Telecommunications and Information Technology, 2005, nr 1

The current trend in scaling transistor gate length below 60 nm is posing great challenges both related to process technology and circuit/system design. From the process technology point of view it is becoming increasingly difficult to continue scaling in traditional way due to fundamental limitations like resolution, quantum effects or random fluctuations. In turn, this has an important impact on electricaldevice specifications especially leakage current and the circuit power dissipation

SARS-CoV-2 susceptibility and COVID-19 disease severity are associated with genetic variants affecting gene expression in a variety of tissues

Variability in SARS-CoV-2 susceptibility and COVID-19 disease severity between individuals is partly due to genetic factors. Here, we identify 4 genomic loci with suggestive associations for SARS-CoV-2 susceptibility and 19 for COVID-19 disease severity. Four of these 23 loci likely have an ethnicity-specific component. Genome-wide association study (GWAS) signals in 11 loci colocalize with expression quantitative trait loci (eQTLs) associated with the expression of 20 genes in 62 tissues/cell types (range: 1:43 tissues/gene), including lung, brain, heart, muscle, and skin as well as the digestive system and immune system. We perform genetic fine mapping to compute 99% credible SNP sets, which identify 10 GWAS loci that have eight or fewer SNPs in the credible set, including three loci with one single likely causal SNP. Our study suggests that the diverse symptoms and disease severity of COVID-19 observed between individuals is associated with variants across the genome, affecting gene expression levels in a wide variety of tissue types

A first update on mapping the human genetic architecture of COVID-19

peer reviewe

Tunnel-FET Evolution and Applications for Analog Circuits

In this work different generations of field effect tunneling transistor (TFET) are evaluated through DC digital and analog figures of merits. For TFET devices the main digital figure of merit is the subthreshold slope (SS), while for analog application the intrinsic voltage gain (Av) is the most important one. For the early generations, that are based on silicon, the SS does not reach values smaller than 60mV/dec at room temperature, however, the Av reaches values up to 80 dB, showing to be promising for analog applications. As the TFETs were being optimized for digital applications and consequently presenting better switching performance, the intrinsic voltage gain moves in the opposite direction. This opposite trend is related to which transport mechanism is predominant for each type of device. While III-V TFETs are more dependent on Band to Band Tunneling (BTBT), silicon devices are more relying on Trap-Assisted Tunneling (TAT). While BTBT allows for faster switching, TAT is less dependent on the drain electric field, so the former favors SS while the latter favors Av. Based on the good analog behavior of silicon channel TFETs, a two-stage operational transconductance amplifier (OTA) was designed with different TFET technologies and the compared results were discussed

Analog performance of standard and strained triple-gate silicon-on-insulator nFinFETs

This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-K dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas the increase of the channel length degrades the early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. (C) 2008 Elsevier Ltd. All rights reserved.FAPESPCNP

CMOS-compatible dielectric constant engineering by embedding metallic particles in aluminum oxide

We report the fabrication of a composite dielectric with increased dielectric constant consisting of aluminum oxide deposited by ALD and aluminum nanoparticles. The fabrication process of the composite is CMOS compatible. For a metal fraction of 0.28 the composite's dielectric constant increases by up to 60% compared to simple Al2O3. The composite dielectric preserves high breakdown strength with a breakdown field larger than 2 MV/cm at the highest metal concentration. Additionally, the material exhibits a low leakage current density of ~10-8 A/cm2 at a field of at least 0.5 MV/cm. © 2012 The Electrochemical Society.status: publishe