255 research outputs found
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Low-Loss 800-V Lateral IGBT in Bulk Si Technology Using a Floating Electrode
An 800V rated lateral Insulated Gate Bipolar Transistor (LIGBT) for high frequency, low-cost applications is proposed. This LIGBT features a new method of adjusting the bipolar gain by using floating N+ and P+ regions connected by a floating electrode in front of the P+ collector. This floating structure lowers the injection efficiency at the collector side of the device, resulting in a very significant decrease in the turn-off time and substantially lower turn-off losses. The device was fabricated in a 0.5µm bulk silicon CMOS technology at a commercial foundry without additional processing steps or process optimisation. Tests on fabricated devices showed equivalent Rdson below 70m.cm2 at 125oC with switching times as low as 250ns at 125oC. The novel LIGBT device showed avalanche capability and low gate capacitance and was used for the first time, in an AC/DC converter operating at 200kHz allowing significant improvements in performance, compactness and reduced component count
Enterocutaneous fistula management - Our experience
Introduction: Enterocutaneous fistula (EF) is known to cause morbidity and mortality due to fluid, electrolyte and metabolic derangements, sepsis and malnutrition. The management of enterocutaneous fistula is a challenge in modern day practice of surgery. Objective:Our aim was to evaluate current management practice and final outcome of enterocutaneous fistula with newer therapies, in our unit. Methodology:Four patients were managed and followed up prospectively (age range: 16- 56yrs, Mean age: 37yrs, M: 2 F: 2) from March 2012 to October 2012 in a tertiary referral centre. All patients had EF following repeated laparotomy and 3 patients who had non malignant conditions were referred from peripheral hospitals. Results:The origin of the fistula was the small bowel (n=03) and colon (n=01). The etiology was repeated operations (n=4). All had a high output fistula (greater than 200 mL/day). Initial treatment was non-operative except for patients with an abscess who needed drainage, with radiological guidance. None of the patients received, octreotide. Vacuum Assisted Closure (VAC) was used in one patient who had an open abdominal wound and one needed operative repair of the fistula. Total parenteral nutrition was used initially in all patients followed by supplemental enteral nutrition. Conclusion: Therapeutic approach in EF management necessitates aggressive management of fistula output, infection, initial total parenteral nutrition, prolonged immobilization related complications and psychological support. These results of this ongoing study indicate that downsloping postoperative calcium levels based on the three early calcium measurements is highly predictive of eventual symptomatic hypocalcaemia. Those patients with either a plateau or upsloping levels could be safely discharged home after 48 hours without calcium supplements.
Chip-on-board assembly of 800V Si LIGBTs for high performance ultra-compact LED drivers
This paper presents a novel chip on board assembly design for an integrated power switch, based on high power density 800V silicon lateral insulated gate bipolar transistor (Si LIGBT) technology. LIGBTs offer much higher current densities (5-10X), significantly lower leakage currents, lower parasitic device capacitances and gate charge compared to conventional vertical MOSFETs commonly used in LED drivers. The higher voltage ratings offered (up to 1kV), the development of high voltage interconnection between parallel IGBTs, self-isolated nature and absence of termination region unlike in a vertical MOSFET makes these devices ideal for ultra-compact, low bill of materials (BOM) count LED drives. Chip on board LIGBTs also offer significant advantages over MOSFETs due to high temperatures seen on most of the LED lamp enclosures as the LIGBT's on-state losses increase only marginally with temperature. the design is based on a built-in reliability approach which focuses on a compact LED driver as a case study of a cost sensitive large volume production item
Mechanical modelling of high power lateral IGBT for LED driver applications
An assembly exercise was proposed to replace the vertical MOSFET by lateral IGBTs (LIGBT) for LED driver systems which can provide significant advantages in terms of size reduction (LIGBTs are ten times smaller than vertical MOSFETs) and lower component count. A 6 circle, 5V gate, 800 V LIGBT device with dimension of 818μm x 672μm with deposited solder balls that has a radius of around 75μm was selected in this assembly exercise. The driver system uses chip on board (COB) technique to create a compact driver system which can fit into a GU10 bulb housing. The challenging aspect of the LIGBT package in high voltage application is underfill dielectric breakdown and solder fatigue failure. In order to predict the extreme electric field values of the underfill, an electrostatic finite element analysis was undertaken on the LIGBT package structure for various underfill permittivity values. From the electro static finite element analysis, the maximum electric field in the underfill was estimated as 38 V/μm. Five commercial underfills were selected for investigating the trade-off in materials properties that mitigate underfill electrical breakdown and solder joint fatigue failure. These selected underfills have dielectric breakdown higher than the predicted value from electrostatic analysis. The thermo-mechanical finite element analysis were undertaken for solder bump reliability for all the underfill materials. The underfill which can enhance the solder reliability was chosen as prime candidate
Impact of underfill and other physical dimensions on Silicon Lateral IGBT package reliability using computer model with discrete and continuous design variables
An effort to design and build a prototype LED driver system which is energy efficient, highly compact and with few component count was initiated by a consortium UK universities. The prototype system will be based on Silicon Lateral IGBT (LIGBT) device combined with chip on board technology. Part of this effort, finite element modelling and analysis were undertaken in order to mitigate the underfill dielectric breakdown failure and solder interconnect fatigue failure of the LIGBT package structure. Electro-static analysis was undertaken to predict the extreme electric field distribution in the underfill. Based on electro-static analysis, five commercial underfill were selected for thermo-mechanical finite element analysis on solder joint fatigue failure prediction under cyclic loading. A design optimisation analysis was endeavoured to maximise the solder interconnect reliability by utilising a computer model with continuous variable (physical dimensions) and discrete variables underfill type) and a stochastic optimiser such as multi-objective mixed discrete particle swarm optimisation. From the optimisation analysis best trade off solution are obtained
Design and fabrication of silicon-on-silicon-carbide substrates and power devices for space applications
A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si) wafer bonded to silicon carbide (SiC). This novel silicon-on-silicon-carbide (Si/SiC) substrate solution promises to combine the benefits of silicon-on-insulator (SOI) technology (i.e device confinement, radiation tolerance, high and low temperature performance) with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance). Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions
Application of phasor measurement units for monitoring power system dynamic performance
This Working Group is a sequel to a previous working group on Wide Area Monitoring and Control for Transmission Capability Enhancement, which published the Technical Brochure 330 in 2007. Since then the synchrophasor technology has advanced rapidly and many utilities around the world have installed hundreds of PMUs in their networks. In this Technical Brochure, we look at the current state of the technology and the extent to which it has been used in the industry. As the technology has matured, it is also important to understand the communication protocols used in synchrophasor networks and their relevant cyber-security issues. These concerns are briefly discussed in the brochure. The applications of Phasor Measurement Units (PMU) measurements reported here are divided into three categories: (a) applications already installed in utility networks, (b) applications that are well-tested, but not yet installed, and (c) applications that are beneficial to the industry, but not fully developed yet. The most common and mature applications are wide area monitoring, state estimation, and model validation. Out of these three applications, wide area monitoring is well established in the industry. The protection and control applications are emerging as evident from the reported examples. The experience of using remote synchrophasor measurements as feedback control signals is not widely reported by the industry. In parallel to this Working Group, Study Committee B5 had a Working Group on “Wide area protection and control technologies.” The Technical Brochure 664 published by this Working Group in September 2016 reviews synchrophasor technology and discusses the industry experience with wide area protection and control. The North American synchrophasor Initiative (NASPI) is another technical group that has gathered and reported a wide range of PMU experiences of industry and researchers. In summary, the field-tested applications presented in this Technical Brochure are a testimony to the confidence of utilities in the synchrophasor technology. The progress in state estimation techniques indicates that synchrophasor measurements will become a standard part of energy management and security assessment systems in the near future
Idiopathic pancreatitis is a consequence of an altering spectrum of bile nucleation time
<p>Abstract</p> <p>Background</p> <p>The pathogenesis of idiopathic pancreatitis (IP) remains poorly understood. Our hypothesis is that IP is a sequel of micro-crystallization of hepatic bile.</p> <p>Methods</p> <p>A prospective case control study compared 55 patients; symptomatic cholelithiasis - 30 (14 male, median age 36 years; mean BMI - 25.1 kg/m<sup>2</sup>), gallstone pancreatitis - 9 (3 male, median age 35 years; mean BMI - 24.86 kg/m<sup>2 </sup>) and IP - 16 (9 male, median age 34 years; mean BMI -23.34 kg/m<sup>2</sup>) with 30 controls (15 male, median age 38 years; mean BMI = 24.5 kg/m<sup>2</sup>) undergoing laparotomy for conditions not related to the gall bladder and bile duct. Ultrafiltered bile from the common hepatic duct in patients and controls was incubated in anaerobic conditions and examined by polarized light microscopy to assess bile nucleation time (NT). In the analysis, the mean NT of patients with gallstones and gallstone pancreatitis was taken as a cumulative mean NT for those with established gallstone disease (EGD).</p> <p>Results</p> <p>Patients were similar to controls. Mean NT in all groups of patients was significantly shorter than controls (EGD cumulative mean NT, 1.73 +/- 0.2 days vs. controls, 12.74 +/- 0.4 days, P = 0.001 and IP patients mean NT, 3.1 +/- 0.24 days vs. controls, 12.74 +/- 0.4 days, P = 0.001). However, NT in those with IP was longer compared with those with EGD (mean NT in IP, 3.1 +/- 0.24 days vs. cumulative mean in EGD: 1.73 +/- 0.2 days, P = 0.002).</p> <p>Conclusion</p> <p>Nucleation time of bile in patients with IP is abnormal and is intermediate to nucleation time of lithogenic bile at one end of the spectrum of lithogenicity and non-lithogenic bile, at the other end.</p
Why a clearer ‘green industrial policy’ matters for India: Reconciling growth, climate change and inequality
© 2016, © The Author(s) 2016. To ensure a healthy growth of the economy particularly in the manufacturing sector, the Indian Government is more than ever focussed on promoting the use of sustainable and affordable energy resources. Recent initiatives such as the Solar Cities Development Programme are a good example. However, in order for these initiatives to gain legitimacy as part of a new ‘green industrial policy’, the Indian Government needs to do more, especially by bringing on board strategies for combating poverty within the gamut of this emerging ‘green industrial policy’ as well as to re-think India’s position on global conventions on climate change
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