159 research outputs found
Self-assembly of electroactive systems: from dimers to supramolecular polymers
Supramolecular aggregates and polymers are macromolecular entities that grow up by the non-covalent interaction of suitable monomeric units. In the search for new materials for optoelectronic applications through self-assembly, the control over the assembly process is one of the most sought-after characteristics. This control is usually achieved by a proper design of the monomeric structure and of the self-assembling motifs (H-bonds, π-stacking, dispersion forces or electrostatic interactions).
The self-assembly of donor-acceptor supramolecular dimers formed by fullerene fragments (buckybowls) and tetrathiafulvalene (TTF)-based electron donors is first described in this presentation. The study relies on theoretical density functional theory (DFT) calculations and illustrates the difficulties in theoretically describing non-covalent interactions. In a following step, the polymerization mechanism and the structural properties of the supramolecular aggregates formed by monomeric units incorporating electroactive fragments are discussed on the basis of theoretical calculations. The discussion includes two types of monomeric units: 1) a bisurea macrocycle bearing electron-donor DMTTF moieties that leads to supramolecular polymers whose self-assembly can be electrochemically controlled, and 2) C3-symmetry conjugated systems decorated with peripheral amide groups endowed with paraffinic side chains that form helical π-stacked supramolecular polymers with defined chirality.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech
Improved Accuracy and Parallelism for MRRR-based Eigensolvers -- A Mixed Precision Approach
The real symmetric tridiagonal eigenproblem is of outstanding importance in
numerical computations; it arises frequently as part of eigensolvers for
standard and generalized dense Hermitian eigenproblems that are based on a
reduction to tridiagonal form. For its solution, the algorithm of Multiple
Relatively Robust Representations (MRRR) is among the fastest methods. Although
fast, the solvers based on MRRR do not deliver the same accuracy as competing
methods like Divide & Conquer or the QR algorithm. In this paper, we
demonstrate that the use of mixed precisions leads to improved accuracy of
MRRR-based eigensolvers with limited or no performance penalty. As a result, we
obtain eigensolvers that are not only equally or more accurate than the best
available methods, but also -in most circumstances- faster and more scalable
than the competition
Evaluating Asymmetric Multicore Systems-on-Chip using Iso-Metrics
The end of Dennard scaling has pushed power consumption into a first order
concern for current systems, on par with performance. As a result,
near-threshold voltage computing (NTVC) has been proposed as a potential means
to tackle the limited cooling capacity of CMOS technology. Hardware operating
in NTV consumes significantly less power, at the cost of lower frequency, and
thus reduced performance, as well as increased error rates. In this paper, we
investigate if a low-power systems-on-chip, consisting of ARM's asymmetric
big.LITTLE technology, can be an alternative to conventional high performance
multicore processors in terms of power/energy in an unreliable scenario. For
our study, we use the Conjugate Gradient solver, an algorithm representative of
the computations performed by a large range of scientific and engineering
codes.Comment: Presented at HiPEAC EEHCO '15, 6 page
Modeling power consumption of 3D MPDATA and the CG method on ARM and Intel multicore architectures
We propose an approach to estimate the power consumption of algorithms, as a function of the frequency and number of cores, using only a very reduced set of real power measures. In addition, we also provide the formulation of a method to select the voltage–frequency scaling–concurrency throttling configurations that should be tested in order to obtain accurate estimations of the power dissipation. The power models and selection methodology are verified using two real scientific application: the stencil-based 3D MPDATA algorithm and the conjugate gradient (CG) method for sparse linear systems. MPDATA is a crucial component of the EULAG model, which is widely used in weather forecast simulations. The CG algorithm is the keystone for iterative solution of sparse symmetric positive definite linear systems via Krylov subspace methods. The reliability of the method is confirmed for a variety of ARM and Intel architectures, where the estimated results correspond to the real measured values with the average error being slightly below 5% in all cases
Caso aspirina: una marca no vulgarizada en el Ecuador
Existen bienes intangibles que superan el valor del resto de activos que poseen las
empresas.
Estos activos se conocen como marcas, las mismas que poseen un proceso de registro y
protección vigente en la legislación ecuatoriana y comunitaria.
Cuando una marca por su amplia difusión, reconocimiento y su valor comercial, logra
convertirse en un signo notoriamente conocido (alto renombre), adquiere una protección
mayor debido al valor que esta representa para la empresa, es ese momento en el cual la
marca puede enmarcarse en la esfera de la vulgarización marcaria.
El tratadista Marco Matías Alemán define acertadamente este acontecimiento conocido
como vulgarización:
“Se conoce por denominación vulgar, corriente o de uso común, aquella que si bien no era en
sus inicios el nombre original del producto, ha quedado por virtud de su uso, y con el paso del
tiempo, consagrado como apelativo obligado de los productos o servicios identificados. Este
fenómeno de la vulgarización de la marca provoca la pérdida de los derechos que el titular
pueda tener sobre un signo que ha dejado de tener capacidad distintiva.” (Alemán, 1995)
La vulgarización de las marcas notoriamente conocidas (alto renombre), es para muchos
autores la definición contenida por el Art. 169 de la Decisión 486 de la Comunidad Andina de
Naciones sobre la cancelación por vulgarización de signos distintivos, y esto es cuando un
signo distintivo se convierte por la actividad o inactividad de su titular, en la denominación
usual del producto o servicio para el que fue registrado.
Art. 169.- La oficina nacional competente, decretará de oficio o a solicitud de cualquier
persona, la cancelación del registro de una marca o la limitación de su alcance cuando su
titular hubiese provocado o tolerado que ella se convierta en un signo común o genérico para
identificar o designar uno o varios de los productos o servicios para los cuales estuviese
registrada. (COMISIÓN DE LA COMUNIDAD ANDINA, 2000)
Con este antecedente se establece la Acción de Cancelación por Vulgarización que se pude
interponer en contra del registro de un signo distintivo notoriamente conocido (alto
renombre). Distintos estudios hablan de la vulgarización de las marcas “notoriamente
conocidas”, como el hecho fáctico en virtud del cual el signo distintivo se ha convertido, ya
sea por la actividad o inactividad de su titular, en la denominación usual del producto o
servicio que protege, sin establecer nada sobre el hecho normativo que hace referencia a la
acción de cancelación de dichas marcas por su vulgarización.
El presente estudio pretende analizar todos los ámbitos que engloban el aspecto de la
vulgarización de las marcas “notoriamente conocidas”, pretendiendo de esta manera brindar
un enfoque jurídico, casuístico, conceptual y comercial de lo que sucede con este hecho y con
la acción de cancelación por vulgarización como medio efectivo procedimental ante este
acontecimiento marcario
Using graphics processors to accelerate the computation of the matrix inverse
We study the use of massively parallel architectures for computing a matrix
inverse. Two different algorithms are reviewed, the traditional approach based on
Gaussian elimination and the Gauss-Jordan elimination alternative, and several high
performance implementations are presented and evaluated. The target architecture is a
current general-purpose multi-core processor (CPU) connected to a graphics processor
(GPU). Numerical experiments show the efficiency attained by the proposed implementations
and how the computation of large-scale inverses, which only a few years
ago would have required a distributed-memory cluster, take only a few minutes on a
hybrid architecture formed by a multi-core CPU and a GPU
Fast Truncated SVD of Sparse and Dense Matrices on Graphics Processors
We investigate the solution of low-rank matrix approximation problems using
the truncated SVD. For this purpose, we develop and optimize GPU
implementations for the randomized SVD and a blocked variant of the Lanczos
approach. Our work takes advantage of the fact that the two methods are
composed of very similar linear algebra building blocks, which can be assembled
using numerical kernels from existing high-performance linear algebra
libraries. Furthermore, the experiments with several sparse matrices arising in
representative real-world applications and synthetic dense test matrices reveal
a performance advantage of the block Lanczos algorithm when targeting the same
approximation accuracy.Comment: 16 pages, 4 figure
Toward a modular precision ecosystem for high performance computing
[EN] With the memory bandwidth of current computer architectures being significantly slower than the (floating point) arithmetic performance, many scientific computations only leverage a fraction of the computational power in today's high-performance architectures. At the same time, memory operations are the primary energy consumer of modern architectures, heavily impacting the resource cost of large-scale applications and the battery life of mobile devices. This article tackles this mismatch between floating point arithmetic throughput and memory bandwidth by advocating a disruptive paradigm change with respect to how data are stored and processed in scientific applications. Concretely, the goal is to radically decouple the data storage format from the processing format and, ultimately, design a "modular precision ecosystem" that allows for more flexibility in terms of customized data access. For memory-bounded scientific applications, dynamically adapting the memory precision to the numerical requirements allows for attractive resource savings. In this article, we demonstrate the potential of employing a modular precision ecosystem for the block-Jacobi preconditioner and the PageRank algorithm-two applications that are popular in the communities and at the same characteristic representatives for the field of numerical linear algebra and data analytics, respectively.The author(s) disclosed receipt of the following financial support for the research, authorship, and/or publication of this article: This work was supported by the Impuls und Vernetzungsfond of the Helmholtz Association under grant VH-NG-1241. G Flegar and ES Quintana-Ortí were supported by project TIN2017-82972-R of the MINECO and FEDER and the H2020 EU FETHPC Project 732631 OPRECOMP .Anzt, H.; Flegar, G.; Gruetzmacher, T.; Quintana-Orti, ES. (2019). Toward a modular precision ecosystem for high performance computing. International Journal of High Performance Computing Applications. 33(6):1069-1078. https://doi.org/10.1177/109434201984654710691078336Anzt, H., Dongarra, J., & Quintana-Ortí, E. S. (2015). Adaptive precision solvers for sparse linear systems. Proceedings of the 3rd International Workshop on Energy Efficient Supercomputing - E2SC ’15. doi:10.1145/2834800.2834802Baboulin, M., Buttari, A., Dongarra, J., Kurzak, J., Langou, J., Langou, J., … Tomov, S. (2009). Accelerating scientific computations with mixed precision algorithms. Computer Physics Communications, 180(12), 2526-2533. doi:10.1016/j.cpc.2008.11.005Buttari, A., Dongarra, J., Langou, J., Langou, J., Luszczek, P., & Kurzak, J. (2007). Mixed Precision Iterative Refinement Techniques for the Solution of Dense Linear Systems. The International Journal of High Performance Computing Applications, 21(4), 457-466. doi:10.1177/1094342007084026Carson, E., & Higham, N. J. (2017). A New Analysis of Iterative Refinement and Its Application to Accurate Solution of Ill-Conditioned Sparse Linear Systems. SIAM Journal on Scientific Computing, 39(6), A2834-A2856. doi:10.1137/17m1122918Carson, E., & Higham, N. J. (2018). Accelerating the Solution of Linear Systems by Iterative Refinement in Three Precisions. SIAM Journal on Scientific Computing, 40(2), A817-A847. doi:10.1137/17m1140819Göddeke, D., Strzodka, R., & Turek, S. (2007). Performance and accuracy of hardware-oriented native-, emulated- and mixed-precision solvers in FEM simulations. International Journal of Parallel, Emergent and Distributed Systems, 22(4), 221-256. doi:10.1080/17445760601122076Grützmacher, T., & Anzt, H. (2018). A Modular Precision Format for Decoupling Arithmetic Format and Storage Format. Euro-Par 2018: Parallel Processing Workshops, 434-443. doi:10.1007/978-3-030-10549-5_34Grutzmacher, T., Anzt, H., Scheidegger, F., & Quintana-Orti, E. S. (2018). High-Performance GPU Implementation of PageRank with Reduced Precision Based on Mantissa Segmentation. 2018 IEEE/ACM 8th Workshop on Irregular Applications: Architectures and Algorithms (IA3). doi:10.1109/ia3.2018.00015Hegland, M., & Saylor, P. E. (1992). Block jacobi preconditioning of the conjugate gradient method on a vector processor. International Journal of Computer Mathematics, 44(1-4), 71-89. doi:10.1080/00207169208804096Horowitz, M. (2014). 1.1 Computing’s energy problem (and what we can do about it). 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC). doi:10.1109/isscc.2014.6757323Saad, Y. (2003). Iterative Methods for Sparse Linear Systems. doi:10.1137/1.9780898718003Strzodka, R., & Goddeke, D. (2006). Pipelined Mixed Precision Algorithms on FPGAs for Fast and Accurate PDE Solvers from Low Precision Components. 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. doi:10.1109/fccm.2006.57Tadano, H., & Sakurai, T. (2008). On Single Precision Preconditioners for Krylov Subspace Iterative Methods. Lecture Notes in Computer Science, 721-728. doi:10.1007/978-3-540-78827-0_83Wulf, W. A., & McKee, S. A. (1995). Hitting the memory wall. ACM SIGARCH Computer Architecture News, 23(1), 20-24. doi:10.1145/216585.21658
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