Characterization and benchmarking of a phase-sensitive two-qubit gate using direct digital synthesis

We implement an iSWAP gate with two transmon qubits using a flux-tunable coupler. Precise control of the relative phase of the qubit-control pulses and the parametric-coupler drive is achieved with a multi-channel instrument called Presto using direct digital synthesis (DDS), a promising technique for scaling up quantum systems. We describe the process of tuning and benchmarking the iSWAP gate, where the relative phase of the pulses is controlled via software. We perform the iSWAP gate in 290 ns, validate it with quantum-state tomography, and measure 2\% error with interleaved randomized benchmarking

Mitigation of interfacial dielectric loss in aluminum-on-silicon superconducting qubits

We demonstrate aluminum-on-silicon planar transmon qubits with time-averaged ${T_1}$ energy relaxation times of up to ${270\,\mu s}$, corresponding to Q = 5 million, and a highest observed value of ${501\,\mu s}$. We use materials analysis techniques and numerical simulations to investigate the dominant sources of energy loss, and devise and demonstrate a strategy towards mitigating them. The mitigation of loss is achieved by reducing the presence of oxide, a known host of defects, near the substrate-metal interface, by growing aluminum films thicker than 300 nm. A loss analysis of coplanar-waveguide resonators shows that the improvement is owing to a reduction of dielectric loss due to two-level system defects. We perform time-of-flight secondary ion mass spectrometry and observe a reduced presence of oxygen at the substrate-metal interface for the thicker films. The correlation between the enhanced performance and the film thickness is due to the tendency of aluminum to grow in columnar structures of parallel grain boundaries, where the size of the grain depends on the film thickness: transmission electron microscopy imaging shows that the thicker film has larger grains and consequently fewer grain boundaries containing oxide near this interface. These conclusions are supported by numerical simulations of the different loss contributions in the device.Comment: 13 pages, 11 figures, 2 table

Signal crosstalk in a flip-chip quantum processor

Quantum processors require a signal-delivery architecture with high addressability (low crosstalk) to ensure high performance already at the scale of dozens of qubits. Signal crosstalk causes inadvertent driving of quantum gates, which will adversely affect quantum-gate fidelities in scaled-up devices. Here, we demonstrate packaged flip-chip superconducting quantum processors with signal-crosstalk performance competitive with those reported in other platforms. For capacitively coupled qubit-drive lines, we find on-resonant crosstalk better than -27 dB (average -37 dB). For inductively coupled magnetic-flux-drive lines, we find less than 0.13 % direct-current flux crosstalk (average 0.05 %). These observed crosstalk levels are adequately small and indicate a decreasing trend with increasing distance, which is promising for further scaling up to larger numbers of qubits. We discuss the implication of our results for the design of a low-crosstalk, on-chip signal delivery architecture, including the influence of a shielding tunnel structure, potential sources of crosstalk, and estimation of crosstalk-induced qubit-gate error in scaled-up quantum processors.Comment: 16 pages, 12 figures, includes appendice

Characterization and benchmarking of a phase-sensitive two-qubit gate using direct digital synthesis

We implement an iSWAP gate with two transmon qubits using a flux-tunable coupler. Precise control of the relative phase of the qubit-control pulses and the parametric-coupler drive is achieved with a multi-channel instrument called Presto using direct digital synthesis (DDS), a promising technique for scaling up quantum systems. We describe the process of tuning and benchmarking the iSWAP gate, where the relative phase of the pulses is controlled via software. We perform the iSWAP gate in 290 ns, validate it with quantum-state tomography, and measure 2% error with interleaved randomized benchmarking.QC 20231219</p

Characterization and benchmarking of a phase-sensitive two-qubit gate using direct digital synthesis

We implement an iSWAP gate with two transmon qubits using a flux-tunable coupler. Precise control of the relative phase of the qubit-control pulses and the parametric-coupler drive is achieved with a multi-channel instrument called Presto using direct digital synthesis (DDS), a promising technique for scaling up quantum systems. We describe the process of tuning and benchmarking the iSWAP gate, where the relative phase of the pulses is controlled via software. We perform the iSWAP gate in 290 ns, validate it with quantum-state tomography, and measure 2% error with interleaved randomized benchmarking.QC 20231219</p

Extensive characterization of a family of efficient three-qubit gates at the coherence limit

While all quantum algorithms can be expressed in terms of single-qubit and two-qubit gates, more expressive gate sets can help reduce the algorithmic depth. This is important in the presence of gate errors, especially those due to decoherence. Using superconducting qubits, we have implemented a three-qubit gate by simultaneously applying two-qubit operations, thereby realizing a three-body interaction. This method straightforwardly extends to other quantum hardware architectures, requires only a "firmware" upgrade to implement, and is faster than its constituent two-qubit gates. The three-qubit gate represents an entire family of operations, creating flexibility in quantum-circuit compilation. We demonstrate a gate fidelity of $97.90\%$, which is near the coherence limit of our device. We then generate two classes of entangled states, the GHZ and W states, by applying the new gate only once; in comparison, decompositions into the standard gate set would have a two-qubit gate depth of two and three, respectively. Finally, we combine characterization methods and analyze the experimental and statistical errors on the fidelity of the gates and of the target states.Comment: 19 pages, 10 figure

Transmon qubit readout fidelity at the threshold for quantum error correction without a quantum-limited amplifier

High-fidelity and rapid readout of a qubit state is key to quantum computing and communication, and it is a prerequisite for quantum error correction. We present a readout scheme for superconducting qubits that combines two microwave techniques: applying a shelving technique to the qubit that effectively increases the energy-relaxation time, and a two-tone excitation of the readout resonator to distinguish among qubit populations in higher energy levels. Using a machine-learning algorithm to post-process the two-tone measurement results further improves the qubit-state assignment fidelity. We perform single-shot frequency-multiplexed qubit readout, with a 140ns readout time, and demonstrate 99.5% assignment fidelity for two-state readout and 96.9% for three-state readout - without using a quantum-limited amplifier

Roadmap toward the 10 ps time-of-flight PET challenge

International audienceSince the seventies, positron emission tomography (PET) has become an invaluable medical molecular imaging modality with an unprecedented sensitivity at the picomolar level, especially for cancer diagnosis and the monitoring of its response to therapy. More recently, its combination with x-ray computed tomography (CT) or magnetic resonance (MR) has added high precision anatomic information in fused PET/CT and PET/MR images, thus compensating for the modest intrinsic spatial resolution of PET. Nevertheless, a number of medical challenges call for further improvements in PET sensitivity. These concern in particular new treatment opportunities in the context personalized (also called precision) medicine, such as the need to dynamically track a small number of cells in cancer immunotherapy or stem cells for tissue repair procedures. A better signal-to-noise ratio (SNR) in the image would allow detecting smaller size tumours together with a better staging of the patients, thus increasing the chances of putting cancer in complete remission. Moreover, there is an increasing demand for reducing the radioactive doses injected to the patients without impairing image quality. There are three ways to improve PET scanner sensitivity: improving detector efficiency, increasing geometrical acceptance of the imaging device and pushing the timing performance of the detectors. Currently, some pre-localization of the electron-positron annihilation along a line-of-response (LOR) given by the detection of a pair of annihilation photons is provided by the detection of the time difference between the two photons, also known as the time-of-flight (TOF) difference of the photons, whose accuracy is given by the coincidence time resolution (CTR). A CTR of about 10 picoseconds FWHM will ultimately allow to obtain a direct 3D volume representation of the activity distribution of a positron emitting radiopharmaceutical, at the millimetre level, thus introducing a quantum leap in PET imaging and quantification and fostering more frequent use of 11C radiopharmaceuticals. The present roadmap article toward the advent of 10 ps TOF-PET addresses the status and current/future challenges along the development of TOF-PET with the objective to reach this mythic 10 ps frontier that will open the door to real-time volume imaging virtually without tomographic inversion. The medical impact and prospects to achieve this technological revolution from the detection and image reconstruction point-of-views, together with a few perspectives beyond the TOF-PET application are discussed

Building blocks of a flip-chip integrated superconducting quantum processor

We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips -- one quantum chip and one control chip -- that are bump-bonded together. We demonstrate time-averaged coherence times exceeding $90\,\mu s$, single-qubit gate fidelities exceeding $99.9\%$, and two-qubit gate fidelities above $98.6\%$. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.Comment: 33 pages, 12 figures, includes supplementary materials, updated with further calculations on participation ratio and Purcell limi