1,301 research outputs found

    Fast, low power, analogue multiplexer for readout of multichannel electronics

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    A dedicated analogue multiplexer chip (AMUX) for the readout of silicon strip detectors was designed and manufactured in 1.2µm n-well CMOS AMS technology

    Wafer screening of the front-end ASICs for ATLAS SCT

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    An integrated DC-DC step-up charge pump and step-down converter in 130 nm technology

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    After the LHC luminosity upgrade the number of readout channels in the ATLAS Inner Detector will be increased by one order of magnitude and delivering the power to the front-end electronics as well as cooling will become a critical system issue. Therefore a new solution for powering the readout electronics has to be worked out. Two main approaches for the power distribution are under development, the serial powering of a chain of modules and the parallel powering with a DCDC conversion stage on the detector. In both cases switchedcapacitor converters in the CMOS front-end chips will be used. In the paper we present the design study of a step-up charge pump and a step-down converter. In optimized designs power efficiency of 85 % for the step-up converter and 92 % for the step-down converter has been achieved

    High-rate GPS positioning for tracing anthropogenic seismic activity. The 29 January 2019 mining tremor in Legnica- Głogów Copper District, Poland

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    High-rate GNSS observations are usually studied in relation to earthquake analysis and structural monitoring. Most of the previous research on short-term dynamic deformations has been limited to natural earthquakes with magnitudes exceeding 5 and amplitudes equal to several dozen centimetres. High-frequency position monitoring via GNSS stations is particularly important in mining areas due to the need to monitor mining damages. On 29 January 2019 (12:53:44 UTC), an M3.7 event occurred in the area of Legnica-Głogów Copper District. This study presents GPS-derived displacement analysis in relation to seismological data. Station position time series were determined by double differencing and Precise Point Positioning. The peak ground displacement was 2–14 mm. The correlation coefficients between GPS and seismological displacement time series reached 0.92. A statistical evaluation of GPS displacement time series was carried out to detect an event using only GPS observations

    Population parameter estimates for performance and reproductive traits in Polish Large White nucleus herds

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    Performance test records from on-farm tests of young Polish Large White boars and reproductive records of Polish Large White sows from 94 nucleus farms during 1978 to 1987 were used to estimate population parameters for the measured traits. The number of boar performance records after editing was 114,347 from 3,932 sues, 21,543 dams, 44,493 litters and 1,075 herd-year-seasons. Reproductive performance records of sows involved 41,080 litters from 2,348 sires, 18,683 dams and 1,520 herd-year-seasons. Both data sets were analyzed by using restricted maximum-likelihood programs. The model used for the pedormance records included fixed herd-year-seasons, random sires, dams and error effects, and covariances for the year of birth of sire and year of birth of dam. The model used for the reproduction data set was the same as the performance data with parity as an additional fiied effect. Estimated heritabilities were .27, .29, .26, .07, .06, .06 for average daily gain standardized to 180 d (ADG), backfat thickness standardized to 110 kg BW (BF), days to 110 kg (DAYS), litter size at birth born alive (NBA), litter size at 21 d (N21) and litter weight at 21 d (W21). respectively. Estimated common environmental effects for the same traits were .09, .lo, .09, .06, .07 and .OS, respectively. Genetic correlations were .68 (NBA and W21) and .80 (N21 and W21). The respective phenotypic correlations were .23, -.99, -.20, .88, .75, .86. These population parameters for Polish Large White pigs are similar to those for breeds in other countries

    VFAT2: A front-end system on chip providing fast trigger information, digitized data storage and formatting for the charge sensitive readout of multi-channel silicon and gas particle detectors

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    The architecture, key design parameters and results for a highly integrated front-end readout system fabricated as a single ASIC are presented. The chip (VFAT2) comprises complex analog and digital functions traditionally designed as separate components. VFAT2 contains very low noise 128 channel front-end amplification with programmable internal calibration, intelligent “fast OR” trigger building outputs, digital data tagging and storage, data formatting and data packet transmission with error protection. VFAT2 is designed to work in the demanding radiation environments posed by modern H.E.P. experiments and in particular the TOTEM experiment of the LHC. Measured results are presented demonstrating full functionality and excellent analog performance despite intensive digital activity on the same piece of silicon

    Підготовка адвокатом позовної заяви до суду

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    Аналізуються питання, пов’язані із підготовкою адвокатом позовної заяви до суду.Анализируется вопросы связаны с подготовкой адвокатом искового заявления в суд.The question connected with preparation of the point of claim to the court by the lawyer is analysed
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