747 research outputs found

    SYSML BASED CUBESAT MODEL DESIGN AND INTEGRATION WITH THE HORIZON SIMULATION FRAMEWORK

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    This thesis examines the feasibility of substituting the system input script of Cal Poly’s Horizon Simulation Framework (HSF) with a Model Based Systems Engineering (MBSE) model designed with the Systems Modeling Language (SysML). A concurrent student project, SysML Output Interface Creation for the Horizon Simulation Framework, focused on design of the HSF Translator Plugin which converts SysML models to an HSF specific XML format. A SysML model of the HSF test case, Aeolus, was designed. The original Aeolus HSF input script and the translated SysML input script retained the format and dependency structure required by HSF. Both input scripts returned identical results and thus validated the feasibility of linking SysML with HSF through the HSF Translator Plugin. A second SysML model of the Cal Poly CubeSat mission, ExoCube, was also designed and converted into an HSF input script. The ExoCube input script also retained the format and dependency structure required by HSF. This demonstrated that future SysML models can be used in conjunction with the HSF Translator Plugin to create a functional HSF system input script

    Development of an Object-Oriented High-Level Language and Construction of an Associated Object-Oriented Compiler

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    Computerized automation has long past been in practice, and engineers are developing ways and means of improving strategies to achieve better performance. Related search is concentrated on developing methords to diversify the application of computing technologies by bringing software and its field of application close together. The idea is to eventually create a software configuration that makes itself transparent to the user by mapping reality onto the computer's monitor. This paper is a report on a portion of and interdisciplinary project that attempts to apply state-of-the-art software techniques in the design of an integrated programming environment for manufacturing purposes. The portion of the project described in this paper is concerned with two aspects: designing a special purpose object-oriented high-level language for programming a classroom research laboratory for manufacturing students and faculty, and designing and implementing an object-oriented compiler to allow students to write programs using this language. The purpose of the project is to integrate manufacturing devices and cells with the existing computer network to provide a flexible manufacturing system

    MODELA DBT: Model-driven elaboration language applied to dynamic binary translation

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    Industrial solutions design is a highly complex topic due to the challenge of integrating multiple technologies into a single solution, the inherent complexity of the problems to be solved and also because the proposed solutions often require a great level of interoperability among their components and also the outside world. Dynamic Binary Translation has been used as a tool to deal with such interoperability issues, e.g., legacy support, virtualization and secure execution, among others. However its integration in the industry as an end-product is hampered by the intricate variability management required in this subject. To address these issues and in an attempt to power DBT utilization as an interoperability-providing tool, we propose a model-driven DSL modeling language for DBT architectures. The developed DSL proved to be efficient to model an in-house DBT engine, and MODELA DBT, a framework for ready-to-use DBT solutions was obtained. MODELA DBT provides design validation, easy configuration of customizable DBT parameters and components, as well as code generation features.This work has been supported by COMPETE: POCI-Ol-0145-FEDER-007043 and FCT - Fundação para a Ciência e figuration granularity, code generation efficiency and design verification. Tecnologia within the Project Scope: UID/CEC/00319/2013. F. Salgado is supported by FCT (grant SFRH/BD/81681/2011)

    Conception d'un traducteur intelligent de RTF vers XML

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    Les fichiers de textes formatés (.doc ) produits par l'outil Microsoft Word sont omniprésents dans la très grande majorité des ordinateurs. Ils constituent des documents digitaux dont certains sont de nature publique et leurs propriétaires aimeraient bien les publier facilement sur l'Internet. Une solution consiste à traduire, par exemple, ces fichiers en des fichiers dans le format HTML. Ce mémoire présente un nouveau système informatique qui permet de convertir un fichier dans le format RTF, un format proche du format .doc mais universel et lisible par un humain, en un fichier dans un format XML. Dans ce mémoire, le format XML est considéré comme un format intermédiaire puisqu'un fichier dans ce format est à son tour utilisé pour générer un fichier dans un format cible comme HTML, JSP, TeX ou D2E. En plus de présenter l'architecture et des éléments de conception de ce système, ce mémoire porte une attention particulière sur des règles de traduction, des règles de simplification et des règles de préférence mises en oeuvre grâce à des techniques empruntées au domaine de la construction des compilateurs

    MELT - a Translated Domain Specific Language Embedded in the GCC Compiler

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    The GCC free compiler is a very large software, compiling source in several languages for many targets on various systems. It can be extended by plugins, which may take advantage of its power to provide extra specific functionality (warnings, optimizations, source refactoring or navigation) by processing various GCC internal representations (Gimple, Tree, ...). Writing plugins in C is a complex and time-consuming task, but customizing GCC by using an existing scripting language inside is impractical. We describe MELT, a specific Lisp-like DSL which fits well into existing GCC technology and offers high-level features (functional, object or reflexive programming, pattern matching). MELT is translated to C fitted for GCC internals and provides various features to facilitate this. This work shows that even huge, legacy, software can be a posteriori extended by specifically tailored and translated high-level DSLs.Comment: In Proceedings DSL 2011, arXiv:1109.032

    An Architecture for Multi-User Software Development Environments

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    We present an architecture for multi-user software development environments, covering general, process-centered and rule-based MUSDEs. Our architecture is founded on componentization, with particular concern for the capability to replace the synchronization component - to allow experimentation with novel concurrency control mechanisms - with minimal effects on other components while still supporting integration. The architecture has been implemented in the MARVEL SD

    Total Haskell is Reasonable Coq

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    We would like to use the Coq proof assistant to mechanically verify properties of Haskell programs. To that end, we present a tool, named hs-to-coq, that translates total Haskell programs into Coq programs via a shallow embedding. We apply our tool in three case studies -- a lawful Monad instance, "Hutton's razor", and an existing data structure library -- and prove their correctness. These examples show that this approach is viable: both that hs-to-coq applies to existing Haskell code, and that the output it produces is amenable to verification.Comment: 13 pages plus references. Published at CPP'18, In Proceedings of 7th ACM SIGPLAN International Conference on Certified Programs and Proofs (CPP'18). ACM, New York, NY, USA, 201

    Cycle Accurate Simulation Model Generation for SoC Prototyping

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    RR 2004-18, ENS-Lyon, 24 pagesWe present new results concerning the integration of high level designed ips into a complete System on Chip. We first introduce a new compu- tation model that can be used for cycle accurate simulation of register transfer level synthesized hardware. Then we provide simulation of a SoC integrating a data-flow ip synthesized with MMAlpha and the So- cLib cycle accurate simulation environment. This integration also vali- dates an efficient generic interface mechanism for data-flow ips
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