Transient Performance Analysis of Serial Production Lines

TRANSIENT PERFORMANCE ANALYSIS OF SERIAL PRODUCTION LINES by Yang Sun The University of Wisconsin-Milwaukee, 2015 Under the Supervision of Professor Liang Zhang Production lines with unreliable machines and finite buffers are characterized by both steady-state performance and transient behavior. The steady-state performance has been analyzed extensively for over 50 years. Transient behavior, however, is rarely studied and remains less explored. In practice, a lot of the real production systems are running partially or entirely in transient periods. Therefore, transient analysis is of significant practical importance. Most of the past research on production systems focuses on discrete materials flow which utilities Markov chain analysis. This dissertation is devoted to investigate the effects of system parameters on performance measures for transient serial production line with other machine reliability models. The reliability models investigated in this dissertation are exponential and no-exponential (Weibull, Gamma, Log-normal). In a real production line system, machine reliability models are much more difficult to identify. Strictly speaking, it requires the identifications of the histograms of up- and downtime, which requires a very large number of measurements during a long period of time. The result may be that the machines\u27 real reliability model on the factory floor are, practically, never known. Therefore, it is of significant practical importance to investigate the general effects of system parameters on performance measures for transient serial production line with different reliability models. The system parameters include machine efficiency e, ratio of N and Tdown (K), machines\u27 average downtime Tdown, and coefficient of variation CV. The performance measures include settling time of production rate (t_sPR), settling time of work-in-process (t_sWIP), total production (TP), production loss (PL). The relationship between the performance measures and system parameters reveals the fundamental principles that characterize the behavior of such systems and can be used as a guideline for product lines\u27 management and improvement. Most previous research studies are limited to two or three machine system due to the technical complexity. Furthermore, presently there are no analytical tools to address the problems with multiple machines and buffers during transient periods. This dissertation addresses this problem by using simulations with C++ programming to evaluate the multiple machines (up to 10) and buffers and demonstrate the transient performance at different conditions. The simulation method does not only provide quantified transient performance results for a given production line, but also provides a valuable tool to investigate the system parameter effects and how to manage and improve the existing production line

A microcontroller system for investigating the catch effect: Functional electrical stimulation of the common peroneal nerve

Correction of drop foot in hemiplegic gait is achieved by electrical stimulation of the common peroneal nerve with a series of pulses at a fixed frequency. However, during normal gait, the electromyographic signals from the tibialis anterior muscle indicate that muscle force is not constant but varies during the swing phase. The application of double pulses for the correction of drop foot may enhance the gait by generating greater torque at the ankle and thereby increase the efficiency of the stimulation with reduced fatigue. A flexible controller has been designed around the Odstock Drop Foot Stimulator to deliver different profiles of pulses implementing doublets and optimum series. A peripheral interface controller (PIC) microcontroller with some external circuits has been designed and tested to accommodate six profiles. Preliminary results of the measurements from a normal subject seated in a multi-moment chair (an isometric torque measurement device) indicate that profiles containing doublets and optimum spaced pulses look favourable for clinical use

Experimental analysis of computer system dependability

This paper reviews an area which has evolved over the past 15 years: experimental analysis of computer system dependability. Methodologies and advances are discussed for three basic approaches used in the area: simulated fault injection, physical fault injection, and measurement-based analysis. The three approaches are suited, respectively, to dependability evaluation in the three phases of a system's life: design phase, prototype phase, and operational phase. Before the discussion of these phases, several statistical techniques used in the area are introduced. For each phase, a classification of research methods or study topics is outlined, followed by discussion of these methods or topics as well as representative studies. The statistical techniques introduced include the estimation of parameters and confidence intervals, probability distribution characterization, and several multivariate analysis methods. Importance sampling, a statistical technique used to accelerate Monte Carlo simulation, is also introduced. The discussion of simulated fault injection covers electrical-level, logic-level, and function-level fault injection methods as well as representative simulation environments such as FOCUS and DEPEND. The discussion of physical fault injection covers hardware, software, and radiation fault injection methods as well as several software and hybrid tools including FIAT, FERARI, HYBRID, and FINE. The discussion of measurement-based analysis covers measurement and data processing techniques, basic error characterization, dependency analysis, Markov reward modeling, software-dependability, and fault diagnosis. The discussion involves several important issues studies in the area, including fault models, fast simulation techniques, workload/failure dependency, correlated failures, and software fault tolerance

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed

Power quality and electromagnetic compatibility: special report, session 2

The scope of Session 2 (S2) has been defined as follows by the Session Advisory Group and the Technical Committee: Power Quality (PQ), with the more general concept of electromagnetic compatibility (EMC) and with some related safety problems in electricity distribution systems. Special focus is put on voltage continuity (supply reliability, problem of outages) and voltage quality (voltage level, flicker, unbalance, harmonics). This session will also look at electromagnetic compatibility (mains frequency to 150 kHz), electromagnetic interferences and electric and magnetic fields issues. Also addressed in this session are electrical safety and immunity concerns (lightning issues, step, touch and transferred voltages). The aim of this special report is to present a synthesis of the present concerns in PQ&EMC, based on all selected papers of session 2 and related papers from other sessions, (152 papers in total). The report is divided in the following 4 blocks: Block 1: Electric and Magnetic Fields, EMC, Earthing systems Block 2: Harmonics Block 3: Voltage Variation Block 4: Power Quality Monitoring Two Round Tables will be organised: - Power quality and EMC in the Future Grid (CIGRE/CIRED WG C4.24, RT 13) - Reliability Benchmarking - why we should do it? What should be done in future? (RT 15

On the nature and effect of power distribution noise in CMOS digital integrated circuits

The thesis reports on the development of a novel simulation method aimed at modelling power distribution noise generated in digital CMOS integrated circuits. The simulation method has resulted in new information concerning: 1. The magnitude and nature of the power distribution noise and its dependence on the performance and electrical characteristics of the packaged integrated circuit. Emphasis is laid on the effects of resistive, capacitative and inductive elements associated with the packaged circuit. 2. Power distribution noise associated with a generic systolic array circuit comprising 1,020,000 transistors, of which 510,000 are synchronously active. The circuit is configured as a linear array which, if fabricated using two-micron bulk CMOS technology, would be over eight centimetres long and three millimetres wide. In principle, the array will perform 1.5 x 10 to the power of 11 operations per second. 3. Power distribution noise associated with a non-array-based signal processor which, if fabricated in 2-micron bulk CMOS technology, would occupy 6.7 sq. cm. The circuit contains about 900,000 transistors, of which 600,000 are functional and about 300,000 are used for yield enhancement. The processor uses the RADIX-2 algorithm and is designed to achieve 2 x 10 to the power of 8 floating point operations per second. 4. The extent to which power distribution noise limits the level of integration and/ or performance of such circuits using standard and non-standard fabrication and packaging technology. 5. The extent to which the predicted power distribution noise levels affect circuit susceptibility to transient latch-up and electromigration. It concludes the nature of CMOS digital integrated circuit power distribution noise and recommends ways in which it may be minimised. It outlines an approach aimed at mechanising the developed simulation methodology so that the performance of power distribution networks may more routinely be assessed. Finally. it questions the long term suitability of mainly digital techniques for signal processing

Report of the SSME assessment team

In response to a request from the House of Representatives Committee on Science, Space, and Technology in its Report No. 102-500 of April 22, 1992, the Aerospace Safety Advisory Panel (ASAP) created an ad hoc task force to conduct a thorough assessment of the Space Shuttle Main Engine (SSME). The membership was drawn mostly from organizations other than ASAP, and this report represents the views of that task force. Its task was to assess the risk that the SSME poses to the safe operation of the Space Shuttle, to identify and evaluate improvements to the engine that would reduce the risk, and to recommend a set of priorities for the implementation of these improvements. The SSME Assessment Team, as it opted to call itself, convened in mid-1992 and, subsequently, met with and gathered information from all the principal organizations involved in the SSME program. These included the Rocketdyne Division of Rockwell International, the Marshall Space Flight Center of NASA, and the Pratt & Whitney Division of United Technologies Corporation. The information in this report reflects the program status as of October 1992. From the information received, the Team formed its conclusions and recommendations. Changes in the program status have, of course, occurred since that time; however, they did not affect the Team's conclusions and recommendations

The monitoring of induction motor starting transients with a view to early fault detection.

The aim of this work is to investigate the possibility of detecting faults in a 3 phase Induction motor by monitoring and analysing the transient line current waveform during the starting period. This is a particularly onerous time for the machine and the inter-relationships between parameters such as current, torque, speed and time are very complex. As a result two parallel paths of investigation have been followed, by methods of experimentation and computer simulation. Transient line current signals have been obtained from purpose built test rigs and these signals have been analysed in both the time and frequency domains. In order to assist with the comprehension of this data a sophisticated computer simulation of the induction motor during the starting period has also been developed. Computer simulation of the induction motor has been developed initially using the two and then three phase induction motor voltage equations which are solved by numerical integration. Using these techniques it has been possible to detect small degrees of fault level for both wound and cage rotor machines by analysing the line current waveform during the starting period. Good agreement has been found between the real and simulated data. A range of Digital Signal Processing techniques have been utilised to extract the components indicative of rotor faults. These techniques were at first wideband and highly numerically intensive, some originating from Speech Processing. The final processing techniques were far simpler and selected by analysis of the results from experimental data, both real and simulated