High-frequency response and thermal effects in GaN diodes and transistors: modeling and experimental characterization

Se han analizado diodos autoconmutantes (SSDs) y transitores de alta movilidad de electrones (HEMTs) de GaN, tanto en el régimen DC como en AC, tanto desde el punto de vista experimental como de simulaciones. Las no linealidades presentes en las curvas corriente-voltaje permiten su operación como detectores de microondas a polarización nula. A pesar de las buenas propiedades del GaN, existen problemas tecnológicos relacionados con defectos, trampas y calentamiento que deben ser investigados para perfeccionar la electrónica de potencia en el futuro. Medidas pulsadas y de transitorios de corriente realizadas sobre el SSD han revelado la influencia de trampas volúmicas y superficiales, observándose anomalías en las características DC e impedancia AC. Los efectos superficiales son relevantes en canales estrechos puesto que la relación superficie-volumen del dispositivo aumenta, mientras que en los dispositivos más anchos prevalece la influencia de las trampas de tipo volúmico. Las medidas muestran un incremento anómalo de la detección a bajas temperaturas, mientras que a altas frecuencias el voltaje detectado muestra una caída que atribuimos a la presencia de trampas de tipo superficial y volúmico. Se ha observado una fuerte dispersión a baja frecuencia tanto de la transconductanciacomo de la conductancia de salida en HEMTs de AlGaN/AlN/GaN en el rango de microondas, que atribuimos a la presencia de trampas y defectos tanto en el volumen de canal de GaN como en los contactos de fuente y drenador. Estos efectos han sido modelados mediante un circuito equivalente (SSEC) modificado, obteniéndose un acuerdo excelente con los parámetros S medidos. La geometría del dispositivo afecta a los valores de los elementos del circuito equivalente y con ello a las frecuencias de corte, siendo la longitud de puerta el parámetro más influyente. Para LG = 75 nm, ft y fmax son 72 y 89 GHz, respectivamente, en los HEMTs estudiados. En los SSDs caracterizados, se ha observado una potencia equivalente del ruido (NEP) de 100 - 500 pW/Hz1=2 y una responsividad de decenas de V/W con una fuente de 50 ohmios. Se ha demostrado una frecuencia de corte de unos 200 GHz junto a una respuesta cuadrática hasta 20 dBm de potencia de entrada. A bajas frecuencias, las medidas RF muestran una responsividad que reproduce bien los cálculos realizados mediante un modelo cuasiestático (QS) basado en la pendiente y la curvatura de las curvas corriente-voltaje. Polarizar los dispositivos aumenta el voltaje detectado a costa del consumo de potencia y la aparición de ruido 1/f. El modelo QS predice que la reducción de la anchura del canal mejora la responsividad, hecho que ha sido confirmado experimentalmente. El aumento del número de diodos en paralelo reduce la impedancia; cuando coincide con el triple de la impedancia de la linea de transmisión o la antena, la NEP alcanza su valor mínimo. Los diodos con puerta (G-SSDs) muestran, en espacio libre a 300 GHz, una responsividad en torno a 600 V/W y una NEP en torno a 50 pW/Hz1=2 cerca del voltaje umbral. De nuevo, se obtiene un buen acuerdo entre los resultados del modelo QS, las medidas a 900 MHz y las medidas en espacio libre a 300 GHz, todo ello por encima de la zona subumbral. La NEP mejora al aumentar el número de canales en paralelo. Se han comparado los resultados de la detección inyectando la señal por el drenador (DCS) y la puerta (GCS) de los HEMTs hasta 40 GHz. Para DCS, se han obtenido una responsividad en torno a 400 V/W y una NEP de 30 pW/Hz1/2, en un HEMT con LG = 150 nm a temperatura ambiente bajo condiciones de polarización nula y puerta polarizada cerca del umbral. Por otro lado, la responsividad se incrementa en GCS hasta 1.4 kV/W, con la desventaja de polarizar con una corriente de drenador de ID = 1.2 mA. Ambas configuraciones muestran una frecuencia de corte, con -3 dB de caída, en torno a 40 GHz. Resulta interesante que en GCS y a unafrecuencia suficientemente alta para cortocircuitar la rama puerta-drenador con la de la no linealidad, se consigue detectar una responsividad no nula. El estudio del autocalentamiento se vuelve relevante cuando los dispositivos trabajan en condiciones de alta potencia. Las simulaciones se han realizado con una herramienta Monte Carlo (MC) desarrollada por el grupo y acoplada con dos modelos térmicos: (i) modelo de resistencia térmica (TRM) y (ii) un modelo electrotérmico avanzado y que se basa en la resolución autoconsistente de la ecuación del calor independiente del tiempo. A temperatura ambiente la herramienta MC se calibró comparando con resultados experimentales de TLMs (transfer length measurement ), lográndose reproducir la densidad supercial de portadores y la movilidad. Incluyendo la resistencia de contactos, la barrera Schottky y la barrera térmica, nuestros resultados se han validado con medidas experimentales de un HEMT de dimensiones LDS = 1.5 micras y LG = 150 nm, encontrándose un acuerdo razonable. El TRM da unos resultados similares al ETM con valores de la resistencia térmica (RTH) bien calibradas. La principal ventaja del ETM es la posibilidad de obtener mapas de temperatura dentro del canal e identificar la localización de los puntos calientes. También se discute el impacto de la polarización en el SSEC y las discrepancias entre los modelos ETM y TRM. Se utilizan medidas pulsadas hasta 500 K para estimar la temperatura del canal y el valor de la RTH. Para T 250 K.Nanoelectrónica de gap ancho y estrecho para la mejora de la eficiencia en aplicaciones de RF y THz (TEC2013-41640-R). Ministerio de Economía y Competitividad (MINECO). Estudio de efectos térmicos en dispositivos de RF. Modelado y caracterización experimental (SA052U13). Consejería de Educación de la Junta de Castilla y León. Emisores y detectores de terahercios basados en nanodiodos semiconductores para comunicaciones e imagen médica y de seguridad (SA022U16). Consejería de Educación de la Junta de Castilla y León. Tecnologías de diodos de GaN para generación y detección en la banda de subterahercios (TEC2017-83910-R). Ministerio de Economía y Competitividad (MINECO). Simulación y caracterización de efectos electrotérmicos en dispositivos de subterahercios para comunicaciones de alta velocidad (SA254P18). Consejería de Educación de la Junta de Castilla y León

High-frequency response and thermal effects in GaN diodes and transistors: modeling and experimental characterization

[ES] Se han analizado diodos autoconmutantes (SSDs) y transitores de alta movilidad de electrones (HEMTs) de GaN, tanto en el régimen DC como en AC, tanto desde el punto de vista experimental como de simulaciones. Las no linealidades presentes en las curvas corriente-voltaje permiten su operación como detectores de microondas a polarización nula. A pesar de las buenas propiedades del GaN, existen problemas tecnológicos relacionados con defectos, trampas y calentamiento que deben ser investigados para perfeccionar la electrónica de potencia en el futuro. Medidas pulsadas y de transitorios de corriente realizadas sobre el SSD han revelado la influencia de trampas volúmicas y superficiales, observándose anomalías en las características DC e impedancia AC. Los efectos superficiales son relevantes en canales estrechos puesto que la relación superficie-volumen del dispositivo aumenta, mientras que en los dispositivos más anchos prevalece la influencia de las trampas de tipo volúmico. Las medidas muestran un incremento anómalo de la detección a bajas temperaturas, mientras que a altas frecuencias el voltaje detectado muestra una caída que atribuimos a la presencia de trampas de tipo superficial y volúmico. Se ha observado una fuerte dispersión a baja frecuencia tanto de la transconductanciacomo de la conductancia de salida en HEMTs de AlGaN/AlN/GaN en el rango de microondas, que atribuimos a la presencia de trampas y defectos tanto en el volumen de canal de GaN como en los contactos de fuente y drenador. Estos efectos han sido modelados mediante un circuito equivalente (SSEC) modificado, obteniéndose un acuerdo excelente con los parámetros S medidos. La geometría del dispositivo afecta a los valores de los elementos del circuito equivalente y con ello a las frecuencias de corte, siendo la longitud de puerta el parámetro más influyente. Para LG = 75 nm, ft y fmax son 72 y 89 GHz, respectivamente, en los HEMTs estudiados. En los SSDs caracterizados, se ha observado una potencia equivalente del ruido (NEP) de 100 - 500 pW/Hz1=2 y una responsividad de decenas de V/W con una fuente de 50 ohmios. Se ha demostrado una frecuencia de corte de unos 200 GHz junto a una respuesta cuadrática hasta 20 dBm de potencia de entrada. A bajas frecuencias, las medidas RF muestran una responsividad que reproduce bien los cálculos realizados mediante un modelo cuasiestático (QS) basado en la pendiente y la curvatura de las curvas corriente-voltaje. Polarizar los dispositivos aumenta el voltaje detectado a costa del consumo de potencia y la aparición de ruido 1/f. El modelo QS predice que la reducción de la anchura del canal mejora la responsividad, hecho que ha sido confirmado experimentalmente. El aumento del número de diodos en paralelo reduce la impedancia; cuando coincide con el triple de la impedancia de la linea de transmisión o la antena, la NEP alcanza su valor mínimo. Los diodos con puerta (G-SSDs) muestran, en espacio libre a 300 GHz, una responsividad en torno a 600 V/W y una NEP en torno a 50 pW/Hz1=2 cerca del voltaje umbral. De nuevo, se obtiene un buen acuerdo entre los resultados del modelo QS, las medidas a 900 MHz y las medidas en espacio libre a 300 GHz, todo ello por encima de la zona subumbral. La NEP mejora al aumentar el número de canales en paralelo. Se han comparado los resultados de la detección inyectando la señal por el drenador (DCS) y la puerta (GCS) de los HEMTs hasta 40 GHz. Para DCS, se han obtenido una responsividad en torno a 400 V/W y una NEP de 30 pW/Hz1/2, en un HEMT con LG = 150 nm a temperatura ambiente bajo condiciones de polarización nula y puerta polarizada cerca del umbral. Por otro lado, la responsividad se incrementa en GCS hasta 1.4 kV/W, con la desventaja de polarizar con una corriente de drenador de ID = 1.2 mA. Ambas configuraciones muestran una frecuencia de corte, con -3 dB de caída, en torno a 40 GHz. Resulta interesante que en GCS y a unafrecuencia suficientemente alta para cortocircuitar la rama puerta-drenador con la de la no linealidad, se consigue detectar una responsividad no nula. El estudio del autocalentamiento se vuelve relevante cuando los dispositivos trabajan en condiciones de alta potencia. Las simulaciones se han realizado con una herramienta Monte Carlo (MC) desarrollada por el grupo y acoplada con dos modelos térmicos: (i) modelo de resistencia térmica (TRM) y (ii) un modelo electrotérmico avanzado y que se basa en la resolución autoconsistente de la ecuación del calor independiente del tiempo. A temperatura ambiente la herramienta MC se calibró comparando con resultados experimentales de TLMs (transfer length measurement ), lográndose reproducir la densidad super cial de portadores y la movilidad. Incluyendo la resistencia de contactos, la barrera Schottky y la barrera térmica, nuestros resultados se han validado con medidas experimentales de un HEMT de dimensiones LDS = 1.5 micras y LG = 150 nm, encontrándose un acuerdo razonable. El TRM da unos resultados similares al ETM con valores de la resistencia térmica (RTH) bien calibradas. La principal ventaja del ETM es la posibilidad de obtener mapas de temperatura dentro del canal e identificar la localización de los puntos calientes. También se discute el impacto de la polarización en el SSEC y las discrepancias entre los modelos ETM y TRM. Se utilizan medidas pulsadas hasta 500 K para estimar la temperatura del canal y el valor de la RTH. Para T 250 K

Physics Based Virtual Source Compact Model of Gallium-Nitride High Electron Mobility Transistors

Gallium Nitride (GaN) based high electron mobility transistors (HEMTs) outperform Gallium Arsenide (GaAs) and silicon based transistors for radio frequency (RF) applications in terms of output power and efficiency due to its large bandgap (~3.4 eV@300 K) and high carrier mobility property (1500 – 2300 cm^2/(V⋅s)). These advantages have made GaN technology a promising candidate for future high-power microwave and potential millimeter-wave applications. Current GaN HEMT models used by the industry, such as Angelov Model, EEHEMT Model and DynaFET (Dynamic FET) model, are empirical or semi-empirical. Lacking the physical description of the device operations, these empirical models are not directly scalable. Circuit design that uses the models requires multiple iterations between the device and circuit levels, becoming a lengthy and expensive process. Conversely existing physics based models, such as surface potential model, are computationally intensive and thus impractical for full scale circuit simulation and optimization. To enable efficient GaN-based RF circuit design, computationally efficient physics based compact models are required. In this thesis, a physics based Virtual Source (VS) compact model is developed for GaN HEMTs targeting RF applications. While the intrinsic current and charge model are developed based on the Virtual Source model originally proposed by MIT researchers, the gate current model and parasitic element network are proposed based on our applications with a new efficient parameter extraction flow. Both direct current (DC) of drain and gate currents and RF measurements are conducted for model parameter extractions. The new flow first extracts device parasitic resistive values based on the DC measurement of gate current. Then parameters related with the intrinsic region are determined based on the transport characteristics in the subthreshold and above threshold regimes. Finally, the parasitic resistance, capacitance and inductance values are optimized based on the S-parameter measurement. This new extraction flow provides reliable and accurate extraction for parasitic element values while achieving reasonable resolutions holistically with both DC and RF characteristics. The model is validated against measurement data in terms of drain current, gate current and scattering parameter (S-parameter). This model provides simple yet clear physical description for GaN HEMTs with only a short list of model parameters compared with other empirical or physics based models. It can be easily integrated in circuit simulators for RF circuit design

Analytical modeling of drain-current characteristics of AIGaN/GaN HFETs with incorporation of the impacts of virtual-gate and transferred-electron effect

GaN-based heterostructure field effect transistors (HFETs) have gained considerable attention in high-power microwave applications. So far, unsurpassed current levels and high output power at microwave frequencies have been achieved. However, the dominant factors limiting the reliability of these devices under high-power operation are still unsettled. Drain current collapse is one of the major encumbrances in the development of reliable high-power devices in this technology. In this thesis, an accurate and versatile analytical model based on the concept of virtual gate formation due to the existence of acceptor type surface states is developed to model the current-collapse phenomenon. The implementation of this simple and at the same time precise analytical model demonstrates superb agreement with the experimental observations of permanent/semi-permanent current collapse in AlGaN/GaN HFETs. An analytical model, with incorporation of transferred-electron effect, for drain-current characteristics of AlGaN/GaN HFETs is also presented. Oftentimes, the transferred electron effect is neglected in modeling the drain-current characteristics of III-V HFETs. The broader steady-state electron drift-velocity overshoot of GaN in comparison to other direct semiconductors such as GaAs and InP, in addition to the larger difference between the peak and saturation drift-velocity, and the wider bandgap of this semiconductor predict the importance of the incorporation of transferred-electron effect (Le. steady-state drift-velocity overshoot) in modeling the drain-current of these devices. Simulation results are compared with the results of the adoption of Ridley's mobility model which does not take into account the transferred-electron effect. Solving the Poisson's equation through a simple iterative method and considering the diffusion component of current are at the core of this model. The iterative nature of this approach has considerably relieved the outcome of the implementation from the choice of fitting parameters

Boundary layer flow and heat transfer over a permeable shrinking sheet with partial slip

The steady, laminar flow of an incompressible viscous fluid over a shrinking permeable sheet is investigated. The governing partial differential equations are transformed into ordinary differential equations using similarity transformation, before being solved numerically by the shooting method. The features of the flow and heat transfer characteristics for different values of the slip parameter and Prandtl number are analyzed and discussed. The results indicate that both the skin friction coefficient and the heat transfer rate at the surface increase as the slip parameter increases

Design, Modeling and Analysis of Non-classical Field Effect Transistors

Transistor scaling following per Moore\u27s Law slows down its pace when entering into nanometer regime where short channel effects (SCEs), including threshold voltage fluctuation, increased leakage current and mobility degradation, become pronounced in the traditional planar silicon MOSFET. In addition, as the demand of diversified functionalities rises, conventional silicon technologies cannot satisfy all non-digital applications requirements because of restrictions that stem from the fundamental material properties. Therefore, novel device materials and structures are desirable to fuel further evolution of semiconductor technologies. In this dissertation, I have proposed innovative device structures and addressed design considerations of those non-classical field effect transistors for digital, analog/RF and power applications with projected benefits. Considering device process difficulties and the dramatic fabrication cost, application-oriented device design and optimization are performed through device physics analysis and TCAD modeling methodology to develop design guidelines utilizing transistor\u27s improved characteristics toward application-specific circuit performance enhancement. Results support proposed device design methodologies that will allow development of novel transistors capable of overcoming limitation of planar nanoscale MOSFETs. In this work, both silicon and III-V compound devices are designed, optimized and characterized for digital and non-digital applications through calibrated 2-D and 3-D TCAD simulation. For digital functionalities, silicon and InGaAs MOSFETs have been investigated. Optimized 3-D silicon-on-insulator (SOI) and body-on-insulator (BOI) FinFETs are simulated to demonstrate their impact on the performance of volatile memory SRAM module with consideration of self-heating effects. Comprehensive simulation results suggest that the current drivability degradation due to increased device temperature is modest for both devices and corresponding digital circuits. However, SOI FinFET is recommended for the design of low voltage operation digital modules because of its faster AC response and better SCEs management than the BOI structure. The FinFET concept is also applied to the non-volatile memory cell at 22 nm technology node for low voltage operation with suppressed SCEs. In addition to the silicon technology, our TCAD estimation based on upper projections show that the InGaAs FinFET, with superior mobility and improved interface conditions, achieve tremendous drive current boost and aggressively suppressed SCEs and thereby a strong contender for low-power high-performance applications over the silicon counterpart. For non-digital functionalities, multi-fin FETs and GaN HEMT have been studied. Mixed-mode simulations along with developed optimization guidelines establish the realistic application potential of underlap design of silicon multi-Fin FETs for analog/RF operation. The device with underlap design shows compromised current drivability but improve analog intrinsic gain and high frequency performance. To investigate the potential of the novel N-polar GaN material, for the first time, I have provided calibrated TCAD modeling of E-mode N-polar GaN single-channel HEMT. In this work, I have also proposed a novel E-mode dual-channel hybrid MIS-HEMT showing greatly enhanced current carrying capability. The impact of GaN layer scaling has been investigated through extensive TCAD simulations and demonstrated techniques for device optimization

Simulations of electron transport in GaN devices

This thesis deals with the development and application of Monte Carlo simulations to study electron transport in bulk GaN in the wurtzite crystal structure and the properties of field effect transistors made from the material. There is a particular emphasis on transport in the high electric field regime and transistors operating at high voltages. The simulation model includes five sets of non-parabolic conduction band valleys which can be occupied by electrons during high field transport. The effects on electron transport of impurities and the relevant phonon scattering mechanisms have been considered. Results for electron transport at both low and high electric field are presented and compared with the properties of GaN in the zincblende structure, of other group-III nitride semiconductors, and of GaAs. The dependence of the transport properties on the material parameters is discussed and also with regard to the temperature, donor concentration and electric field magnitude and direction. The transport properties of electrons in wurtzite GaN n+-i(n)-n+ diodes are also explored, including the effect of the upper valleys and the temperature on hot electron transport. Simulations have also been carried out to model the steady-state and transient properties of GaN MESFETs that have recently been the subject of experimental study. It has been suggested that traps have a substantial effect on the performance of GaN field effect transistors and we have developed a model of a device with traps to investigate this suggestion. The model includes the simulation of the capture and release of electrons by traps whose charge has a direct effect on the current flowing through the transistor terminals. The influence of temperature and light on the occupancy of the traps and the /- V characteristics are considered. It is concluded that traps are likely to play a substantial role in the behaviour of GaN field effect transistors. Further simulations were performed to model electron transport in AlGaN/GaN hetero-junction FETs. So called HFET structures with a 78 nm Alo.2Gao.8N pseudomorphically strained layer have been simulated, with the inclusion of spontaneous and piezoelectric polarization effects in the strained layer. The polarization effects are shown to not only increase the current density, but also improve the electron transport by inducing a higher electron density close to the positive charge sheet that occurs in the channel

Theoretical assessment of the influence of mesa size and shape on the two-dimensional electron gas properties of AlGaN/GaN heterojunctions

AlGaN/GaN heterostructure field-effect transistors (HFETs) are strong candidates for high-power and high-frequency applications. Even in the absence of doping, thanks to high polarization fields, often a two-dimensional electron gas (2DEG) of unprecedented concentrations forms at these heterojunctions. Control over this carrier induction process is crucial in achieving normally-off field-effect transistors (i.e., transistors of zero standby power consumption). One way to achieve this is through polarization engineering. Mesa-isolation geometry seemingly offers interesting avenues to reduce the piezoelectric polarization at the heterointerface, and as a result means for polarization engineering. Using a Poisson-Schrödinger self-consistent solver, the effect of strain on the sheet charge density is investigated in the context of one-, two- and three-dimensional simulations of AlGaN/GaN heterostructures. Properties of the two-dimensional electron gas are detailed and the influences of Aluminum mole fraction, AlGaN barrier thickness, GaN cap layer inclusion are investigated. The carrier confinement in the 2DEG is explored in the case of two-dimensional version of the simulations. Through these studies, the effect of shrinking the size of the mesa on lowering the 2DEG concentration is confirmed. Through performing three-dimensional simulations, the effects of cross-sectional geometry on the average sheet charge density and the threshold voltage are presented. It is shown that as the perimeter-to-area ratio is increased, the carrier concentration decreases, and the threshold voltage becomes less negative. Via these studies, the degree of effectiveness of geometry as means for polarization engineering is, for the first time, theoretically quantified

Study of High-k Dielectrics and their Interfaces on Semiconductors for Device Applications

This thesis has focused on two emerging applications of high-k dielectrics in Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and in Metal-InsulatorSemiconductor High Electron Mobility Transistors (MIS-HEMTs). The key aim has been to propose the best routes for passivation of semiconductor/high-k oxide interfaces by investigating the band alignments and interface properties of several oxides, such as Tm2O3, Ta2O5, ZrO2, Al2O3 and MgO, deposited on different semiconductors: Si, Ge, GaN, InGaAs and InGaSb. The electrical characterisation of fabricated MIS capacitor and (MIS)-HEMT devices have also been performed. Thulium silicate (TmSiO) has been identified as a promising candidate for integration as interfacial layer (IL) in HfO2/TiN MOSFETs. The physical properties of Tm2O3/IL/Si interface have been elucidated, where IL (TmSiO) has been formed using different post-deposition annealing (PDA) temperatures, from 550 to 750 °C. It has been found that the best-scaled stack (sub-nm IL) is formed at 550 °C PDA with a graded interface layer and a strong SiOx (Si 3+) component. A large valence band offset (VBO) of 2.8 eV and a large conduction band offset (CBO) of 1.9 eV have been derived for Tm2O3/Si by X-ray photoelectron spectroscopy (XPS) and variable angle spectroscopic ellipsometry. Further increase of device performance can be achieved by replacing Si with GaN for high frequency, high power and high-temperature operation. In this thesis, several GaN cleaning procedures have been considered: 30% NH4OH, 20% (NH4)2S, and 37% HCl. It has been found that the HCl treatment shows the lowest oxygen contamination and Garich surface, and hence has been used prior sputtering of Ta2O5, Al2O3, ZrO2 and MgO on GaN. The large VBOs of 1.1 eV and 1.2 eV have been derived for Al2O3 and MgO on GaN respectively, using XPS and Kraut’s method; the corresponding CBOs are 2.0 eV and 2.8 eV respectively, taking into account the band gaps of Al2O3 (6.5 eV) and MgO (7.4 eV) determined from XPS O 1s electron energy spectra. The lowest leakage currents were obtained for devices with Al2O3 and MgO, i.e. 5.3 ×10-6 A/cm2 and 3.2 ×10-6 A/cm2 at 1 V, respectively in agreement with high band offsets (> 1 eV). Furthermore, the effect of different surface treatments (HCl, O2 plasma and 1-Octadecanethiol (ODT)) prior to atomic layer deposition of Al2O3 on the GaN/AlGaN/GaN heterostructure has been investigated. The MIS-HEMTs fabricated using the low-cost ODT GaN surface treatment have been found to exhibit superior performance for power switching applications such as a low threshold voltage, VT of -12.3 V, hysteresis of 0.12 V, a small subthreshold voltage slope (SS) of 73 mV/dec, and a low density of interface states, Dit of 3.0 x10^12 cm-2eV-1. A comprehensive novel study of HfO2/InGaAs and Al2O3/InGaSb interfaces have also been conducted for use in III-V based MOSFETs. The addition of the plasma H2/TMA/H2 pre-cleaning has been found to be very effective in recovering etch damage on InGaAs, especially for (110) orientation, and led to the improvement of electrical characteristics. Furthermore, the combination of H2 plasma exposure and forming gas anneal yielded significantly improved metrics for Al2O3/InGaSb over the control HCltreated sample, with the 150 W plasma treatment giving both the highest capacitance and the lowest stretch out