44 research outputs found
Reachability in pushdown register automata
We investigate reachability in pushdown automata over infinite alphabets. We show that, in terms of reachability/emptiness,
these machines can be faithfully represented using only 3r elements of the alphabet, where r is the number of registers. We settle the complexity of associated reachability/emptiness problems. In contrast to register automata, the emptiness problem for pushdown register automata is EXPTIME-complete, independent of the register
storage policy used. We also solve the global reachability problem by representing pushdown configurations with a special register automaton. Finally, we examine extensions of pushdown storage to higher orders and show that reachability is undecidable at order 2
Determinisability of register and timed automata
The deterministic membership problem for timed automata asks whether the
timed language given by a nondeterministic timed automaton can be recognised by
a deterministic timed automaton. An analogous problem can be stated in the
setting of register automata. We draw the complete decidability/complexity
landscape of the deterministic membership problem, in the setting of both
register and timed automata. For register automata, we prove that the
deterministic membership problem is decidable when the input automaton is a
nondeterministic one-register automaton (possibly with epsilon transitions) and
the number of registers of the output deterministic register automaton is
fixed. This is optimal: We show that in all the other cases the problem is
undecidable, i.e., when either 1) the input nondeterministic automaton has two
registers or more (even without epsilon transitions), or 2) it uses guessing,
or 3) the number of registers of the output deterministic automaton is not
fixed. The landscape for timed automata follows a similar pattern. We show that
the problem is decidable when the input automaton is a one-clock
nondeterministic timed automaton without epsilon transitions and the number of
clocks of the output deterministic timed automaton is fixed. Again, this is
optimal: We show that the problem in all the other cases is undecidable, i.e.,
when either 1) the input nondeterministic timed automaton has two clocks or
more, or 2) it uses epsilon transitions, or 3) the number of clocks of the
output deterministic automaton is not fixed.Comment: journal version of a CONCUR'20 paper. arXiv admin note: substantial
text overlap with arXiv:2007.0934
Nominal Context-Free Behaviour
This thesis investigates and proposes models for programming and verifying adaptive software at different abstraction levels.
First, we design the kernel of a programming language, endowed with primitives for programming the adaptation to different working environments.
We provide the language with a type and effect system that allows us to statically prove properties of the behaviour of the program when plugged in different execution environments.
Then we extend our language to program the use of the resources currently available in the environment.
In this case, the identity and the number of resources is unknown a-priori.
The previous analysis technique needs to be extended to capture the behaviour of these programs.
We exploit nominal techniques in the literature to propose novel automata models that represent the behaviour and the properties of programs that use an unbounded number of unknown resources as (regular and context-free) set of traces.
The theoretical properties of these automata are investigated and related with static program verification.
We prove that we are able to check regular properties of the usage patterns of the resources when resource reuse is inhibited
A Robust Class of Data Languages and an Application to Learning
We introduce session automata, an automata model to process data words, i.e.,
words over an infinite alphabet. Session automata support the notion of fresh
data values, which are well suited for modeling protocols in which sessions
using fresh values are of major interest, like in security protocols or ad-hoc
networks. Session automata have an expressiveness partly extending, partly
reducing that of classical register automata. We show that, unlike register
automata and their various extensions, session automata are robust: They (i)
are closed under intersection, union, and (resource-sensitive) complementation,
(ii) admit a symbolic regular representation, (iii) have a decidable inclusion
problem (unlike register automata), and (iv) enjoy logical characterizations.
Using these results, we establish a learning algorithm to infer session
automata through membership and equivalence queries
Automata and Logics for Concurrent Systems: Realizability and Verification
Automata are a popular tool to make computer systems accessible to formal methods. While classical finite automata are suitable to model sequential boolean programs, models of concurrent systems involve several interacting processes and extend finite-state machines in various respects. This habilitation thesis surveys several such extensions, including pushdown automata with multiple stacks, communicating automata with fixed, parameterized, or dynamic communication topology, and automata running on words over infinite alphabets. We focus on two major questions of classical automata theory, namely realizability (asking whether a specification has an automata counterpart) and model checking (asking whether a given automaton satisfies its specification)
Determinisability of register and timed automata
The deterministic membership problem for timed automata asks whether the
timed language given by a nondeterministic timed automaton can be recognised by
a deterministic timed automaton. An analogous problem can be stated in the
setting of register automata. We draw the complete decidability/complexity
landscape of the deterministic membership problem, in the setting of both
register and timed automata. For register automata, we prove that the
deterministic membership problem is decidable when the input automaton is a
nondeterministic one-register automaton (possibly with epsilon transitions) and
the number of registers of the output deterministic register automaton is
fixed. This is optimal: We show that in all the other cases the problem is
undecidable, i.e., when either (1) the input nondeterministic automaton has two
registers or more (even without epsilon transitions), or (2) it uses guessing,
or (3) the number of registers of the output deterministic automaton is not
fixed. The landscape for timed automata follows a similar pattern. We show that
the problem is decidable when the input automaton is a one-clock
nondeterministic timed automaton without epsilon transitions and the number of
clocks of the output deterministic timed automaton is fixed. Again, this is
optimal: We show that the problem in all the other cases is undecidable, i.e.,
when either (1) the input nondeterministic timed automaton has two clocks or
more, or (2) it uses epsilon transitions, or (3) the number of clocks of the
output deterministic automaton is not fixed