45 research outputs found

    Record and play: a structural fixed point iteration for sequential circuit verification

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    Abstract This paper propose

    Record and play: a structural fixed point iteration for sequential circuit verification

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    Abstract This paper propose

    Custom Integrated Circuits

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    Contains reports on ten research projects.Analog Devices, Inc.IBM CorporationNational Science Foundation/Defense Advanced Research Projects Agency Grant MIP 88-14612Analog Devices Career Development Assistant ProfessorshipU.S. Navy - Office of Naval Research Contract N0014-87-K-0825AT&TDigital Equipment CorporationNational Science Foundation Grant MIP 88-5876

    Verification and synthesis of asynchronous control circuits using petri net unfoldings

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    PhD ThesisDesign of asynchronous control circuits has traditionally been associated with application of formal methods. Event-based models, such as Petri nets, provide a compact and easy to understand way of specifying asynchronous behaviour. However, analysis of their behavioural properties is often hindered by the problem of exponential growth of reachable state space. This work proposes a new method for analysis of asynchronous circuit models based on Petri nets. The new approach is called PN-unfolding segment. It extends and improves existing Petri nets unfolding approaches. In addition, this thesis proposes a new analysis technique for Signal Transition Graphs along with an efficient verification technique which is also based on the Petri net unfolding. The former is called Full State Graph, the latter - STG-unfolding segment. The boolean logic synthesis is an integral part of the asynchronous circuit design process. In many cases, even if the verification of an asynchronous circuit specification has been performed successfully, it is impossible to obtain its implementation using existing methods because they are based on the reachability analysis. A new approach is proposed here for automated synthesis of speed-independent circuits based on the STG-unfolding segment constructed during the verification of the circuit's specification. Finally, this work presents experimental results showing the need for the new Petri net unfolding techniques and confirming the advantages of application of partial order approach to analysis, verification and synthesis of asynchronous circuits.The Research Committee, Newcastle University: Overseas Research Studentship Award

    Logics for digital circuit verification : theory, algorithms, and applications

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    Applications of Formal Methods to Specification and Safety of Avionics Software

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    This report treats several topics in applications of formal methods to avionics software development. Most of these topics concern decision tables, an orderly, easy-to-understand format for formally specifying complex choices among alternative courses of action. The topics relating to decision tables include: generalizations fo decision tables that are more concise and support the use of decision tables in a refinement-based formal software development process; a formalism for systems of decision tables with behaviors; an exposition of Parnas tables for users of decision tables; and test coverage criteria and decision tables. We outline features of a revised version of ORA's decision table tool, Tablewise, which will support many of the new ideas described in this report. We also survey formal safety analysis of specifications and software

    Complexity Results for Reachability in Cooperating Systems and Approximated Reachability by Abstract Over-Approximations

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    This work deals with theoretic aspects of cooperating systems, i.e., systems that consists of cooperating subsystems. Our main focus lies on the complexity theoretic classification of deciding the reachability problem and on efficiently establishing deadlock-freedom in models of cooperating systems. The formal verification of system properties is an active field of research, first attempts of which go back to the late 60's. The behavior of cooperating systems suffers from the state space explosion problem and can become very large. This is, techniques that are based on an analysis of the reachable state space have a runtime exponential in the number of subsystems. The consequence is that even modern techniques that decide whether or not a system property holds in a system can become unfeasible. We use interaction systems, introduced by Sifakis et al. in 2003, as a formalism to model cooperating systems. The reachability problem and deciding deadlock-freedom in interaction systems was proved to be PSPACE-complete. An approach to deal with this issue is to investigate subclasses of systems in which these problems can be treated efficiently. We show here that the reachability problem remains PSPACE-complete in subclasses of interaction systems with a restricted communication structure. We consider structures that from trees, stars and linear arrangements of subsystems. Our result motivates the research of techniques that treat the reachability problem in these subclasses based on sufficient conditions which exploit characteristics of the structural restrictions. In a second part of this work we investigate an approach to efficiently establish the reachability of states and deadlock-freedom in general interaction systems. We introduce abstract over-approximations -- a concept of compact representations of over-approximations of the reachable behavior of interaction systems. Families of abstract over-approximations are the basis for our approach to establish deadlock-freedom in interaction systems in polynomial time in the size of the underlying interaction system. We introduce an operator called Edge-Match for refining abstract over-approximations. The strength of our approach is illustrated on various parametrized instances of interaction systems. Furthermore, we establish a link between our refinement approach and the field of relational database theory and use this link in order to make a preciseness statement about our refinement approach

    Software test and evaluation study phase I and II : survey and analysis

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    Issued as Final report, Project no. G-36-661 (continues G-36-636; includes A-2568
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