Power-compute co-design for robust pervasive IoT applications

PhD ThesisThe modern development of internet of things (IoT) requires the IoT devices to be more compact and energy autonomous. Many of them require to be able to operate with unstable and low power supplies that come from various energy sources such as energy harvesters. This creates a challenge for building IoT devices that need to be robust to energy variations. In this research we propose methods for improving energy characteristics of IoT devices from the perspective of two main challenges: (i) improving the efficiency and stability of power regulators, and (ii) enhancing the energy robustness of the IoT devices. The existing design methods do not consider these two aspects holistically. One important feature of our approach is holistic use of event-based, temporal representation of data, which involves using asynchronous techniques and duty-cycle-based encoding. For power regulation we use switched-capacitor converters (SCC) because they offer compactness and ease of on-chip implementation. In this research we adapt the existing methods and develop new techniques for SCC design based on asynchronous circuits. This allows us to improve their performance and stability. We also investigate the methods of parasitic charge redistribution, and apply them to self-oscillating SCC, improving their performance. The key contribution within (i) is development of the methods of SCC design with improved characteristics. The majority of novel IoT systems are shifting towards the “AI at the edge” vision, for example, involving neural networks (NN). We consider a perceptron-based neural network as a typical IoT computing device. In our research we propose a novel NN design approach using the principle of pulse-width modulation (PWM). PWMencoded signals represent information with their duty cycle values which may be made independent of the voltages and frequencies of the carrier signals. As a result, the device is more robust to voltage variations, and, thus, the power regulation can be simplified. This is the second major contribution addressing challenge (ii). The advantages of the proposed methods are validated with simulations in the Cadence environment. The simulations demonstrate the operation of the designed power regulators, and the improvements of their efficiency. The simulations also demonstrate the principle of operation of the PWM-based perceptron and prove its power and frequency elasticity. The thesis gives future research directions into a deeper study of the holistic co-design of a variation-robust power-compute paradigm and its impact on developing future IoT applications

Power Management Techniques for Supercapacitor Based IoT Applications

University of Minnesota Ph.D. dissertation. January 2018. Major: Electrical Engineering. Advisor: Ramesh Harjani. 1 computer file (PDF); xi, 89 pages.The emerging internet of things (IoT) technology will connect many untethered devices, e.g. sensors, RFIDs and wearable devices, to improve health lifestyle, automotive, smart buildings, etc. This thesis proposes one typical application of IoT: RFID for blood temperature monitoring. Once the blood is donated and sealed in a blood bag, it is required to be stored in a certain temperature range (+2~+6°C for red cell component) before distribution. The proposed RFID tag is intended to be attached to the blood bag and continuously monitor the environmental temperature during transportation and storage. When a reader approaches, the temperature data is read out and the tag is fully recharged wirelessly within 2 minutes. Once the blood is distributed, the tag can be reset and reused again. Such a biomedical application has a strong aversion to toxic chemicals, so a batteryless design is required for the RFID tag. A passive RFID tag, however, cannot meet the longevity requirement for the monitoring system (at least 1 week). The solution of this thesis is using a supercapacitor (supercap) instead of a battery as the power supply, which not only lacks toxic heavy metals, but also has quicker charge time (~1000x over batteries), larger operating temperature range (-40~+65°C), and nearly infinite shelf life. Although nearly perfect for this RFID application, a supercap has its own disadvantages: lower energy density (~30x smaller than batteries) and unstable output voltage. To solve the quick charging and long lasting requirements of the RFID system, and to overcome the intrinsic disadvantages of supercaps, an overall power management solution is proposed in this thesis. A reconfigurable switched-capacitor DC-DC converter is proposed to convert the unstable supercap's voltage (3.5V~0.5V) to a stable 1V output voltage efficiently to power the subsequent circuits. With the help of the 6 conversion ratios (3 step-ups, 3 step-downs), voltage protection techniques, and low power designs, the converter can extract 98% of the stored energy from the supercap, and increase initial energy by 96%. Another switched-inductor buck-boost converter is designed to harvest the ambient RF energy to charge the supercap quickly. Because of the variation of the reader distance and incident wave angle, the input power level also has large fluctuation (5uW~5mW). The harvester handles this large power range by a power estimator enhanced MPPT controller with an adaptive integration capacitor array. Also, the contradiction between low power and high tracking speed is improved by adaptive MPPT frequency

Integrated high-voltage switched-capacitor DC-DC converters

The focus of this work is on the integrated circuit (IC) level integration of high-voltage switched-capacitor (SC) converters with the goal of fully integrated power management solutions for system-on-chip (SoC) and system-in-pagage (SiP) applications. The full integration of SC converters provides a low cost and compact power supply solution for modern electronics. Currently, there are almost no fully integrated SC converters with input voltages above 5 V. The purpose of this work is to provide solutions for higher input voltages. The increasing challenges of a compact and efficient power supply on the chip are addressed. High-voltage rated components and the increased losses caused by parasitics not only reduce power density but also efficiency. Loss mechanisms in high-voltage SC converters are investigated resulting in an optimized model for high-voltage SC converters. The model developed allows an appropriate comparison of different semiconductor technologies and converter topologies. Methods and design proposals for loss reduction are presented. Control of power switches with their supporting circuits is a further challenge for high-voltage SC converters. The aim of this work is to develop fully integrated SC converters with a wide input voltage range. Different topologies and concepts are investigated. The implemented fully integrated SC converter has an input voltage range of 2 V to 13 V. This is twice the range of existing converters. This is achieved by an implemented buck and boost mode as well as 17 conversion ratios. Experimental results show a peak efficiency of 81.5%. This is the highest published peak efficiency for fully integrated SC converters with an input voltage > 5V. With the help of the model developed in this work, a three-phase SC converter topology for input voltages up to 60 V is derived and then investigated and discussed. Another focus of this work is on the power supply of sensor nodes and smart home applications with low-power consumption. Highly integrated micro power supplies that operate directly from mains voltage are particularly suitable for these applications. The micro power supply proposed in this work utilizes the high-voltage SC converter developed. The output power is 14 times higher and the power density eleven times higher than prior work. Since plenty of power switches are built into modern multi-ratio SC converters, the switch control circuits must be optimized with regard to low-power consumption and area requirements. In this work, different level shifter concepts are investigated and a low-power high-voltage level shifter for 50 V applications based on a capacitive level shifter is introduced. The level shifter developed exceeds the state of the art by a factor of more than eleven with a power consumption of 2.1pJ per transition. A propagation delay of 1.45 ns is achieved. The presented high-voltage level shifter is the first level shifter for 50 V applications with a propagation delay below 2 ns and power consumption below 20pJ per transition. Compared to the state of the art, the figure of merit is significantly improved by a factor of two. Furthermore, various charge pump concepts are investigated and evaluated within the context of this work. The charge pump, optimized in this work, improves the state of the art by a factor of 1.6 in terms of efficiency. Bidirectional switches must be implemented at certain locations within the power stage to prevent reverse conduction. The topology of a bidirectional switch developed in this work reduces the dynamic switching losses by 70% and the area consumption including the required charge pumps by up to 65% compared to the state of the art. These improvements make it possible to control the power switches in a fast and efficient way. Index terms — integrated power management, high input voltage, multi-ratio SC converter, level shifter, bidirectional switch, micro power supplyDer Schwerpunkt dieser Arbeit liegt auf der Erforschung von Switched-Capacitor (SC) Spannungswandler für höhere Eingangsspannungen. Ziel der Arbeit ist es Lösungen für ein voll auf dem Halbleiterchip integriertes Power Management anzubieten um System on Chip (SoC) und System in Package (SiP) zu ermöglichen. Die vollständige Integration von SC Spannungswandlern bietet eine kostengünstige und kompakte Spannungsversorgungslösung für moderne Elektronik. Der kontinuierliche Trend hin zu immer kompakterer Elektronik und hin zu höheren Versorgungsspannungen wird in dieser Arbeit adressiert. Aktuell gibt es sehr wenige voll integrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Die mit steigender Spannung zunehmenden Herausforderungen an eine kompakte und effiziente Spannungsversorgung auf dem Chip werden in dieser Arbeit untersucht. Die höhere Spannungsfestigkeit der verwendeten Komponenten korreliert mit erhöhten Verlusten und erhöhtem Flächenverbrauch, welche sich negativ auf den Wirkungsgrad und die Leistungsdichte von SC Spannungswandlern auswirkt. Bestandteil dieser Arbeit ist die Untersuchung dieser Verlustmechanismen und die Entwicklung eines Modells, welches speziell für höhere Spannungen optimiert wurde. Das vorgestellte Modell ermöglicht zum einen die optimale Dimensionierung der Spannungswandler und zum anderen faire Vergleichsmöglichkeiten zwischen verschiedenen SC Spannungswandler Architekturen und Halbleitertechnologien. Demnach haben sowohl die gewählte Architektur und Halbleitertechnologie als auch die Kombination aus gewählter Architektur und Technologie erheblichen Einfluss auf die Leistungsfähigkeit der Spannungswandler. Ziel dieser Arbeit ist die Vollintegration eines SC Spannungswandlers mit einem weiten und hohen Eingangsspannungsbereich zu entwickeln. Dazu wurden verschiedene Schaltungsarchitekturen und Konzepte untersucht. Der vorgestellte vollintegrierte SC Spannungswandler weist einen Eingangsspannungsbereich von 2 V bis 13 V auf. Dies ist eine Verdopplung im Vergleich zum Stand der Technik. Dies wird durch einen implementierten Auf- und Abwärtswandler-Betriebsmodus sowie 17 Übersetzungsverhältnisse erreicht. Experimentelle Ergebnisse zeigen einen Spitzenwirkungsgrad von 81.5%. Dies ist der höchste veröffentlichte Spitzenwirkungsgrad für vollintegrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Mit Hilfe des in dieser Arbeit entwickelten Modells wird eine dreiphasige SC Spannungswandler Architektur für Eingangsspannungen bis zu 60 V entwickelt und anschließend analysiert und diskutiert. Ein weiterer Schwerpunkt dieser Arbeit adressiert die kompakte Spannungsversorgung von Sensorknoten mit geringem Stromverbrauch, für Anwendungen wie Smart Home und Internet der Dinge (IoT). Für diese Anwendungen eignen sich besonders gut hochintegrierte Mikro-Netzteile, welche direkt mit dem 230VRMS-Hausnetz (bzw. 110VRMS) betrieben werden können. Das in dieser Arbeit vorgestellte Mikro-Netzteil nutzt einen in dieser Arbeit entwickelten SC Spannungswandler für hohe Eingangsspannungen. Die damit erzielte Ausgangsleistung ist 14-mal größer im Vergleich zum Stand der Technik. In SC Spannungswandlern für hohe Spannungen werden viele Leistungsschalter benötigt, deshalb muss bei der Schalteransteuerung besonders auf einen geringen Leistungsverbrauch und Flächenbedarf der benötigten Schaltungsblöcke geachtet werden. Gegenstand dieser Arbeit ist sowohl die Analyse verschiedener Konzepte für Pegelumsetzer, als auch die Entwicklung eines stromsparenden Pegelumsetzers für 50 V-Anwendungen. Mit einer Leistungsaufnahme von 2.1pJ pro Signalübergang reduziert der entwickelte Pegelumsetzer mit kapazitiver Kopplung um mehr als elfmal die Leistungsaufnahme im Vergleich zum Stand der Technik. Die erreichte Laufzeitverzögerung beträgt 1.45 ns. Damit erzielt der vorgestellte Hochspannungs-Pegelumsetzer als erster Pegelumsetzer für 50 V-Anwendungen eine Laufzeitverzögerung unter 2 ns und eine Leistungsaufnahme unter 20pJ pro Signalwechsel. Im Vergleich zum Stand der Technik wird die Leistungskennzahl um den Faktor zwei deutlich verbessert. Darüber hinaus werden im Rahmen dieser Arbeiten verschiedene Ladungspumpenkonzepte untersucht und bewertet. Die in dieser Arbeit optimierte Ladungspumpe verbessert den Stand der Technik um den Faktor 1.6 in Bezug auf den Wirkungsgrad. Die in dieser Arbeit entwickelte Schaltungsarchitektur eines bidirektionalen Schalters reduziert die dynamischen Schaltverluste um 70% und den benötigten Flächenbedarf inklusive der benötigten Ladungspumpe um bis zu 65% gegenüber dem Stand der Technik. Diese Verbesserungen ermöglichen es, die Leistungsschalter schnell und effizient anzusteuern. Schlagworte — Integriertes Powermanagement, hohe Eingangsspannung, Multi-Ratio SC Spannungswan- dler, Pegelumsetzer, bidirektionaler Schalter, Mikro-Netztei

Development of a Step Down DC-DC Converter for Power Grid Energy Harvesting

This work contains an analysis of multiple topologies of DC-DC voltage buck con verters. The main goal of this Thesis is to study and design a functioning Step Down converter for capacitive coupling devices used for energy harvesting from the power AC grid. In order to achieve this goal, multiple topologies and circuits of this type of converter are studied and analysed, so that the requirements for the intended application are met. Since the input is obtained from the AC power grid and the output is connected to a supercapacitor, this results in a large input voltage (over 150V) and a low output voltage (between 1V to 3V), therefore the converter requires a step down voltage conversion ratio of around 130. The DC-DC converter should also have a large input impedance (around 50Mohm) to maximize the energy transferred from the power grid. This mode of operation is not common for regular inductance based DC-DC converters, making this a challenging problem. Moreover, since the amount of energy available from the capacitive coupling is very small, it is also necessary to develop a controller circuit that is capable of created a clock with a very low duty cycle while dissipating less than 50uW.Este trabalho visa analisar várias tipologias de conversores de tensão DC-DC deno minados conversores Buck. O principal objectivo desta Tese é estudar e projectar um conversor DC-DC abaixador de tensão para sistemas de acopelamento electromagnético capacitivo utilizada em aplicações de Energy Harvesting a partir da rede AC. De forma a cumprir este objectivo, várias tipologias são estudadas ao longo deste trabalho, de forma a cumprir as especificações exigidas. Uma vez que o sinal de entrada é obtido a partir da rede AC, e que o output está ligado a um supercondensador, isto faz com que a tensão de entrada seja elevado (Acima dos 150V) e a tensão de saída seja baixa (entre 1V e 3V), como tal o conversor precisa de um rácio de abaixamento bastante elevado de cerca de 130 vezes. O conversor DC-DC deve também ter uma impedância de entrada elevada (cerca de 50MOhm) por forma a maximizar a energia transferida da rede de energia. Estas condições de funcionamento não são habituais para conversores DC-DC indutivos, o que torna este um problema muito desafiante. Adicionalmente, uma vez que a energia disponivel devido ao acopelamento capacitivo é muito reduzida, é necessário desenvolver um circuito controlador capaz gerar um sinal de relógio com um duty cycle reduzido enquanto dissipa menos de 50uW de potência

縦型ボディチャネルMOS Field-Effect Transistorを用いたマイクロプロセッサ向け高効率・高集積DC-DCコンバータとそのパワーマネジメントに関する研究

Tohoku University遠藤哲郎課

Design of a Multi-sensor and Re-configurable Smart Node for the IoT

The rapid deployment of the Internet of Things (IoT) is much dependent on the capacity of the IoT node to be able to self-adapt to the target application. With the increase of sensor networks and diversity of sensors available and with the increasing integration of multiple sensors in a sensor node, it is necessary to develop systems capable of handling all of these sensors with high level of flexibility. These may have different characteristics that provide quite distinct interface requirements, thus giving rise to the need for systems with re-configurable properties. With the implementation of sensor networks in places where energy supply is limited or non-existent, and in situations where technician intervention is expensive, there is a need to exchange conventional energy sources by methods of storage and harvesting of the energy present in the environment, where the sensor node is used (autonomous and renewable energy sources). This thesis will focus on the study and implementation of a family of re-configurable and multi-sensor IoT nodes with special emphasis on the energy storage and power management. It will also focus on the develop of a CAD tool in order to help in the design of CMOS circuits, for the purpose of integrating all the strategies here presented

Investigations into design and control of power electronic systems for future microprocessor power supplies

Ph.DDOCTOR OF PHILOSOPH

Platform Independent, Illumination aware Reconfigurable Switch Capacitor based 3.3 Volt Energy Harvester IC

This dissertation presents a platform independent illumination aware fully on chip microscale energy harvester for powering 3.3V sensor nodes and smart IOT devices. The programmable switched capacitor DC-DC converter for fully on chip applications is discussed and implemented