Power Semiconductor Devices and Packages: Solder Mechanical Characterization and Lifetime Prediction

Solder reliability is a key aspect for the packaging of low voltage power semiconductor device. The interconnections among package components, e.g. the silicon chip and copper leadframe, and between package itself and the external printed control board (PCB) should be properly designed to ensure the automotive durability requirements. In this framework, the proposed paper introduces an experimental-numeric characterization flow with the purpose to analyze solder visco-plasticity and fatigue during passive temperature cycle. The presented methodology has included solder mechanical characterization aimed to determine the parameters of Anand model which reproduces the solder visco-plastic behavior and the mechanical properties' temperature dependency. Finite element model has been employed to calculate the inelastic work which solder dissipates during each temperature cycle. Simulation results serve as input to predict solder lifetime according to an energetic method. Moreover, failure analyses have been performed to assess the failure mechanism and to check model correlation in terms of number of cycles to failure forecast

Thermo-mechanical Durability Assessment and Microstructural Characterization of 95.5Pb2Sn2.5Ag High Temperature Solder

There is an increasing need in the avionics, military, oil exploration and automotive industries for high temperature solders that perform reliably in ever-higher temperature applications. In these applications, solders are often used as large area die attaches and due to the high power involved, they need to dissipate large amounts of heat that can further increase the thermal load on the devices. The mechanical, electrical and thermal behavior of the solder must be understood to ensure devices and package reliability. There is an especially urgent need for characterizing constitutive properties and thermo-mechanical durability of high temperature solders. A partitioned constitutive model consisting of elastic, plastic and creep models was obtained for the 95.5Pb2Sn2.5Ag solder by implementing the direct local measurement technique. The validity of the assumptions used to generate these models have been demonstrated using microstructural characterization. The thermo-mechanical durability of the 95.5Pb2Sn2.5Ag solder is investigated using thermal cycling tests and finite element modeling. A high reliability package manufacturing technique has been followed. The extensive detailed two-dimensional viscoplastic FE stress and damage analysis is conducted for five different thermal cycling tests of 95.5Pb2Sn2.5Ag solders. The energy-partitioning durability model of the solder is obtained. It is found that 95.5Pb2Sn2.5Ag solder is creep dominant at high temperatures. The microstructure characterization study on 95.5Pb2Sn2.5Ag solder reveals that it remains primarily a single phase in the range of temperature under study with very few Ag3Sn intermetallics. Fatigue cracks due to thermal cycling have been observed

Harsh-Environment Packaging for Downhole Gas and Oil Exploration

This research into new packaging materials and methods for elevated temperatures and harsh environment electronics focused on gaining a basic understanding of current state-of-the-art in electronics packaging used in industry today, formulating the thermal-mechanical models of the material interactions and developing test structures to confirm these models. Discussions were initiated with the major General Electric (GE) businesses that currently sell into markets requiring high temperature electronics and packaging. They related the major modes of failure they encounter routinely and the hurdles needed to be overcome in order to improve the temperature specifications of these products. We consulted with our GE business partners about the reliability specifications and investigated specifications and guidelines that from IPC and the SAE body that is currently developing guidelines for electronics package reliability. Following this, a risk analysis was conducted for the program to identify the critical risks which need to be mitigated in order to demonstrate a flex-based packaging approach under these conditions. This process identified metal/polyimide adhesion, via reliability for flex substrates and high temperature interconnect as important technical areas for reliability improvement

Evaluation of the Magnetic Field Signature as a Potential Parameter for Power Semiconductor Degradation Detection

This work investigates the viability of using the spatial magnetic flux density distribution caused by a semiconductors load current as a parameter to detect degradation of its bond wires and solder joinings. Utilizing a 3D FEM model of a singular IGBT on DCB, simulations of the B-field distribution for samples with intact and partially interrupted solder layer are conducted. The simulation results show that the partial interruption affects the B-field above the bond wires due to a redistribution of the load current. This is confirmed by measurements of the magnetic flux density distribution conducted on samples with identical structure to the model. Utilizing power cycling tests, 40 additional IGBT samples were artificially aged. The observed degradation mechanisms are bond wire lift-off with varying severity as well as strong vertical solder crack propagation emanating from the chips centre area. Measurements conducted for all aged samples show that the observed type of solder crack pattern has no significant influence on the B-field distribution above the semiconductor. Therefore a detectability using the proposed method can be ruled out. Regarding bond wire lift-offs it is shown that, besides the detection, a localisation as well as an identification is possible. Finally, a method for the determination of the bond wire current distribution is investigated. For this, an analytical model of the spatial magnetic flux density distribution, caused by the current flow in multiple bond wire loops, is derived. Utilizing said model in combination with discrete B-Field measurements, an optimisation approach is presented for the identification and localisation of bond wire lift-offs based on deviations in the estimated current distribution. A first viability analysis shows that the approach is capable to identify and localize bond wire lift-offs within the artificially aged samples

Evaluation de la durée de vie de composants électroniques de puissance commerciaux soumis à plusieurs tests de vieillissement et détermination des mécanismes de défaillance

Actuellement, dans les plateformes aérospatiales, le nombre et le besoin d’intégration des équipements électriques et électroniques sont grandissant du fait que leurs fonctions nécessitent de plus en plus de puissance. L’objectif de minimisation des coûts et surtout la disponibilité des dispositifs électroniques forcent les concepteurs et les fabricants de ces plateformes à s’orienter vers des produits commerciaux (dits grand public). La fiabilité des boîtiers des composants de puissance doit être évaluée dans les environnements sévères des applications aérospatiales. Une dizaine de composants électroniques de puissance a été sélectionnée en fonction de leur disponibilité et l’adéquation de leurs performances électriques et thermiques aux exigences des applications aérospatiales. Ces composants intègrent différents types de semi-conducteurs tels que le silicium, le carbure de silicium et le nitrure de gallium. Tout d’abord, une étude a été menée sur les potentiels modes et mécanismes de défaillance de ces composants électroniques de puissance dans ces environnements. Elle a permis de mettre en place plusieurs procédures de vieillissement accéléré ainsi que le développement de deux bancs de tests pour suivre électriquement le vieillissement de ces composants. Ces tests ont été menés sur deux diodes Schottky SiC, commercialisées par deux fabricants, regroupant les technologies des boîtiers des composants électroniques de puissance. Les analyses de défaillance ont tout d’abord mis en évidence une immaturité de la technologie de la jonction Schottky des puces SiC de l’une des deux diodes soumis à une tension inverse. Ces défaillances sont attribuées à la destruction partielle de la structure Schottky et indique une reproductibilité non maitrisée de la fabrication des puces de ce composant. Ensuite, ces analyses ont mis en évidence plusieurs mécanismes de vieillissement lors de tests simulant des régimes « On-Off » des applications (cycles thermiques de puissance). Celui considéré comme la cause de la défaillance est la fissuration de la soudure des fils d’interconnexion avec la puce. Une loi pouvant décrire la fissuration des interconnexions a été identifiée à la suite des évolutions des cycles thermiques de puissance à l’approche de la défaillance. L’étude de ces évolutions a permis de démarrer l’élaboration d’un modèle physique de défaillance adapté aux interconnexions de la puce en vue d’estimer la durée de vie des composants commerciaux