127 research outputs found

    A 10-Gb/s two-dimensional eye-opening monitor in 0.13-ÎĽm standard CMOS

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    An eye-opening monitor (EOM) architecture that can capture a two-dimensional (2-D) map of the eye diagram of a high-speed data signal has been developed. Two single-quadrant phase rotators and one digital-to-analog converter (DAC) are used to generate rectangular masks with variable sizes and aspect ratios. Each mask is overlapped with the received eye diagram and the number of signal transitions inside the mask is recorded as error. The combination of rectangular masks with the same error creates error contours that overall provide a 2-D map of the eye. The authors have implemented a prototype circuit in 0.13-ÎĽm standard CMOS technology that operates up to 12.5 Gb/s at 1.2-V supply. The EOM maps the input eye to a 2-D error diagram with up to 68-dB mask error dynamic range. The left and right halves of the eyes are monitored separately to capture horizontally asymmetric eyes. The chip consumes 330 mW and operates reliably with supply voltages as low as 1 V at 10 Gb/s. The authors also present a detailed analysis that verifies if the measurements are in good agreement with the expected results

    Low phase noise 2 GHz Fractional-N CMOS synthesizer IC

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    Low noise low division 2 GHz RF synthesizer integrated circuits (ICs) are conventionally implemented in some form of HBT process such as SiGe or GaAs. The research in this dissertation differs from convention, with the aim of implementing a synthesizer IC in a more convenient, low-cost Si-based CMOS process. A collection of techniques to push towards the noise and frequency limits of CMOS processes, and possibly other IC processes, is then one of the research outcomes. In a synthesizer low N-divider ratios are important, as high division ratios would amplify in-band phase noise. The design methods deployed as part of this research achieve low division ratios (4 ≤ N ≤ 33) and a high phase comparison frequency (>100 MHz). The synthesizer IC employs a first-order fractional-N topology to achieve increased frequency tuning resolution. The primary N-divider was implemented utilising current mode logic (CML) and the fractional accumulator utilising conventional CMOS. Both a conventional CMOS phase frequency detector (PFD) and a CML PFD were implemented for benchmarking purposes. A custom-built 4.4 GHz synthesizer circuit employing the IC was used to validate the research. In the 4.4 GHz synthesizer circuit, the prototype IC achieved a measured in-band phase noise plateau of L( f ) = -113 dBc/Hz at a 100 kHz frequency offset, which equates to a figure of merit (FOM) of -225 dBc/Hz. The FOM compares well with existing, but expensive, SiGe and GaAs HBT processes. Total IC power dissipation was 710 mW, which is considerably less than commercially available GaAs designs. The complete synthesizer IC was implemented in Austriamicrosystems‟ (AMS) 0.35 μm CMOS process and occupies an area of 3.15 x 2.18 mm2.Dissertation (MEng)--University of Pretoria, 2010.Electrical, Electronic and Computer Engineeringunrestricte

    A high speed serializer/deserializer design

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    A Serializer/Deserializer (SerDes) is a circuit that converts parallel data into a serial stream and vice versa. It helps solve clock/data skew problems, simplifies data transmission, lowers the power consumption and reduces the chip cost. The goal of this project was to solve the challenges in high speed SerDes design, which included the low jitter design, wide bandwidth design and low power design. A quarter-rate multiplexer/demultiplexer (MUX/DEMUX) was implemented. This quarter-rate structure decreases the required clock frequency from one half to one quarter of the data rate. It is shown that this significantly relaxes the design of the VCO at high speed and achieves lower power consumption. A novel multi-phase LC-ring oscillator was developed to supply a low noise clock to the SerDes. This proposed VCO combined an LC-tank with a ring structure to achieve both wide tuning range (11%) and low phase noise (-110dBc/Hz at 1MHz offset). With this structure, a data rate of 36 Gb/s was realized with a measured peak-to-peak jitter of 10ps using 0.18microm SiGe BiCMOS technology. The power consumption is 3.6W with 3.4V power supply voltage. At a 60 Gb/s data rate the simulated peak-to-peak jitter was 4.8ps using 65nm CMOS technology. The power consumption is 92mW with 2V power supply voltage. A time-to-digital (TDC) calibration circuit was designed to compensate for the phase mismatches among the multiple phases of the PLL clock using a three dimensional fully depleted silicon on insulator (3D FDSOI) CMOS process. The 3D process separated the analog PLL portion from the digital calibration portion into different tiers. This eliminated the noise coupling through the common substrate in the 2D process. Mismatches caused by the vertical tier-to-tier interconnections and the temperature influence in the 3D process were attenuated by the proposed calibration circuit. The design strategy and circuits developed from this dissertation provide significant benefit to both wired and wireless applications

    Circuit Design Techniques For Wideband Phased Arrays

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    University of Minnesota Ph.D. dissertation.June 2015. Major: Electrical Engineering. Advisor: Ramesh Harjani. 1 computer file (PDF); xii, 143 pages.This dissertation focuses on beam steering in wideband phased arrays and phase noise modeling in injection locked oscillators. Two different solutions, one in frequency and one in time, have been proposed to minimize beam squinting in phased arrays. Additionally, a differential current reuse frequency doubler for area and power savings has been proposed. Silicon measurement results are provided for the frequency domain solution (IBM 65nm RF CMOS), injection locked oscillator model verification (IBM 130nm RF-CMOS) and frequency doubler (IBM 65nm RF CMOS), while post extraction simulation results are provided for the time domain phased array solution (the chip is currently under fabrication, TSMC 65nm RF CMOS). In the frequency domain solution, a 4-point passive analog FFT based frequency tunable filter is used to channelize an incoming wideband signal into multiple narrowband signals, which are then processed through independent phase shifters. A two channel prototype has been developed at 8GHz RF frequency. Three discrete phase shifts (0 & +/- 90 degrees) are implemented through differential I-Q swapping with appropriate polarity. A minimum null-depth of 19dB while a maximum null-depth of 27dB is measured. In the time domain solution, a discrete time approach is undertaken with signals getting sampled in order of their arrival times. A two-channel prototype for a 2GHz instantaneous RF bandwidth (7GHz-9GHz) has been designed. A QVCO generates quadrature LO signals at 8GHz which are phase shifted through a 5-bit (2 extra bits from differential I-Q swapping with appropriate polarity) cartesian combiner. Baseband sampling clocks are generated from phase shifted LOs through a CMOS divide by 4 with independent resets. The design achieves an average time delay of 4.53ps with 31.5mW of power consumption (per channel, buffers excluded). An injection locked oscillator has been analyzed in s-domain using Paciorek's time domain transient equations. The simplified analysis leads to a phase noise model identical to that of a type-I PLL. The model is equally applicable to injection locked dividers and multipliers and has been extended to cover all injection locking scenarios. The model has been verified against a discrete 57MHz Colpitt's ILO, a 6.5GHz ILFD and a 24GHz ILFM with excellent matching between the model and measurements. Additionally, a differential current reuse frequency doubler, for frequency outputs between 7GHz to 14GHz, design has been developed to reduce passive area and dc power dissipation. A 3-bit capacitive tuning along with a tail current source is used to better conversion efficiency. The doubler shows FOMT_{T} values between 191dBc/Hz to 209dBc/Hz when driven by a 0.7GHz to 5.8GHz wide tuning VCO with a phase noise that ranges from -114dBc/Hz to -112dBc/Hz over the same bandwidth

    Configurable pseudo noise radar imaging system enabling synchronous MIMO channel extension

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    In this article, we propose an evolved system design approach to ultra-wideband (UWB) radar based on pseudo-random noise (PRN) sequences, the key features of which are its user-adaptability to meet the demands provided by desired microwave imaging applications and its multichannel scalability. In light of providing a fully synchronized multichannel radar imaging system for short-range imaging as mine detection, non-destructive testing (NDT) or medical imaging, the advanced system architecture is presented with a special focus put on the implemented synchronization mechanism and clocking scheme. The core of the targeted adaptivity is provided by means of hardware, such as variable clock generators and dividers as well as programmable PRN generators. In addition to adaptive hardware, the customization of signal processing is feasible within an extensive open-source framework using the Red Pitaya ® data acquisition platform. A system benchmark in terms of signal-to-noise ratio (SNR), jitter, and synchronization stability is conducted to determine the achievable performance of the prototype system put into practice. Furthermore, an outlook on the planned future development and performance improvement is provided

    Non-Contact Human Motion Sensing Using Radar Techniques

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    Human motion analysis has recently gained a lot of interest in the research community due to its widespread applications. A full understanding of normal motion from human limb joint trajectory tracking could be essential to develop and establish a scientific basis for correcting any abnormalities. Technology to analyze human motion has significantly advanced in the last few years. However, there is a need to develop a non-invasive, cost effective gait analysis system that can be functional indoors or outdoors 24/7 without hindering the normal daily activities for the subjects being monitored or invading their privacy. Out of the various methods for human gait analysis, radar technique is a non-invasive method, and can be carried out remotely. For one subject monitoring, single tone radars can be utilized for motion capturing of a single target, while ultra-wideband radars can be used for multi-subject tracking. But there are still some challenges that need to be overcome for utilizing radars for motion analysis, such as sophisticated signal processing requirements, sensitivity to noise, and hardware imperfections. The goal of this research is to overcome these challenges and realize a non-contact gait analysis system capable of extracting different organ trajectories (like the torso, hands and legs) from a complex human motion such as walking. The implemented system can be hugely beneficial for applications such as treating patients with joint problems, athlete performance analysis, motion classification, and so on

    Concepts for Short Range Millimeter-wave Miniaturized Radar Systems with Built-in Self-Test

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    This work explores short-range millimeter wave radar systems, with emphasis on miniaturization and overall system cost reduction. The designing and implementation processes, starting from the system level design considerations and characterization of the individual components to final implementation of the proposed architecture are described briefly. Several D-band radar systems are developed and their functionality and performances are demonstrated

    Transmission of OFDM wired-wireless quintuple-play services along WDM LR-PONs using centralized broadband impairment compensation

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    This paper was published in OPTICS EXPRESS and is made available as an electronic reprint with the permission of OSA. The paper can be found at the following URL on the OSA website: http://dx.doi.org/10.1364/OE.20.013748 . Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under law[EN] The simultaneous transmission of four orthogonal frequencydivision multiplexing (OFDM)-based signals used to provide quintuple-play services along wavelength division multiplexing (WDM) long-reach passive optical networks (LR-PONs) is demonstrated experimentally. Particularly, the transmission performance of custom signal bearing Gigabit Ethernet data, Worldwide Interoperability for Microwave Access, Long Term Evolution and Ultra Wideband (sub-bands 2 and 3) signals is evaluated for different LR-PONs reaches, considering single-wavelength andWDMtransmission, and using a centralized impairment compensation technique at the central office that is transparent to the services provided. It is shown that error vector magnitude-compliant levels are obtained for all the OFDM-based signals in WDM LR-PONs reaching 100 km and that negligible inter-channel crosstalk is obtained for a channel spacing of 100 GHz regardless the OFDM-based signal considered. The successful multi-format OFDM transmission along the 100 km-long WDM LR-PON is achieved in the absence of optical dispersion compensation or single sideband modulation, and it is enabled by the performance improvement provided by the centralized impairment compensation realized. © 2012 Optical Society of America.M. Morant's work was supported by FPU-MEC grant AP2007-01413. This work was also supported in part by the European FIVER-FP7-ICT-2009-4-249142 project and by Fundacao para a Ciencia e a Tecnologia from Portugal under the TURBO-PTDC/EEA-TEL/104358/2008 project.Alves, T.; Morant Pérez, M.; Cartaxo, A.; Llorente Sáez, R. (2012). Transmission of OFDM wired-wireless quintuple-play services along WDM LR-PONs using centralized broadband impairment compensation. Optics Express. 20(13):13748-13761. https://doi.org/10.1364/OE.20.013748S13748137612013Jia, Z., Yu, J., Ellinas, G., & Chang, G.-K. (2007). Key Enabling Technologies for Optical–Wireless Networks: Optical Millimeter-Wave Generation, Wavelength Reuse, and Architecture. Journal of Lightwave Technology, 25(11), 3452-3471. doi:10.1109/jlt.2007.909201Armstrong, J. (2009). OFDM for Optical Communications. Journal of Lightwave Technology, 27(3), 189-204. doi:10.1109/jlt.2008.2010061Cvijetic, N. (2012). OFDM for Next-Generation Optical Access Networks. Journal of Lightwave Technology, 30(4), 384-398. doi:10.1109/jlt.2011.2166375Shieh, W., & Athaudage, C. (2006). Coherent optical orthogonal frequency division multiplexing. Electronics Letters, 42(10), 587. doi:10.1049/el:20060561Alves, T., Morant, M., Cartaxo, A., & Llorente, R. (2011). Performance Comparison of OFDM-UWB Radio Signals Distribution in Long-Reach PONs Using Mach-Zehnder and Linearized Modulators. IEEE Journal on Selected Areas in Communications, 29(6), 1311-1320. doi:10.1109/jsac.2011.110618Llorente, R., Alves, T., Morant, M., Beltran, M., Perez, J., Cartaxo, A., & Marti, J. (2008). Ultra-Wideband Radio Signals Distribution in FTTH Networks. IEEE Photonics Technology Letters, 20(11), 945-947. doi:10.1109/lpt.2008.922329Alves, T., & Cartaxo, A. (2011). Distribution of Double-Sideband OFDM-UWB Radio Signals in Dispersion Compensated Long-Reach PONs. Journal of Lightwave Technology, 29(16), 2467-2474. doi:10.1109/jlt.2011.2160616Chow, C.-W., Yeh, C.-H., Wang, C.-H., Shih, F.-Y., Pan, C.-L., & Chi, S. (2008). WDM extended reach passive optical networks using OFDM-QAM. Optics Express, 16(16), 12096. doi:10.1364/oe.16.012096Tang, J. M., Lane, P. M., & Shore, K. A. (2006). Transmission performance of adaptively modulated optical OFDM signals in multimode fiber links. IEEE Photonics Technology Letters, 18(1), 205-207. doi:10.1109/lpt.2005.861631Duong, T.-N., Genay, N., Ouzzif, M., Le Masson, J., Charbonnier, B., Chanclou, P., & Simon, J. C. (2009). Adaptive Loading Algorithm Implemented in AMOOFDM for NG-PON System Integrating Cost-Effective and Low-Bandwidth Optical Devices. IEEE Photonics Technology Letters, 21(12), 790-792. doi:10.1109/lpt.2009.2016978Alves, T., & Cartaxo, A. (2009). Performance Degradation Due to OFDM-UWB Radio Signal Transmission Along Dispersive Single-Mode Fiber. IEEE Photonics Technology Letters, 21(3), 158-160. doi:10.1109/lpt.2008.200923
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