Modulation strategy for new asymmetrical multilevel inverter topology using nearest dc level modulation technique

Multilevel inverters (MLI) have an important portion in power processing in power systems. These inverters have some inherent advantages such as ability to operate with high power and voltage, improved output waveform quality, and flexibility, which make them attractive and more popular. In recent years, research on multilevel inverters with reduction of components is gaining interest. The reduction offers plenty of advantages namely, the reliability, volume and control simplicity. In this project, Nearest DC Level Control (NLC) modulation technique will be studied and designed for a newly developed multilevel inverter with reduction in components. The proposed NLC modulation is a fundamental frequency switching technique that may have some advantages when applied to multilevel inverters as compared to conventional carrier based PWM modulation. For the study, new topology of nine-level asymmetrical multilevel inverter model will be developed using MATLAB. A proposed NLC techniques will be also developed. The inverter model will be simulated using the same resistor load value. The discussion will be on the shape of the harmonics profile and Total Harmonic Distortion (THD) value

A Review of the Power Converter Interfaces for Switched Reluctance Machines

The use of power electronic converters is essential for the operation of Switched Reluctance Machines (SRMs). Many topologies and structures have been developed over the last years considering several specific applications for this kind of machine, improving the control strategies, performance range, fault-tolerant operation, among other aspects. Thus, due to the great importance of power electronic converters in such applications, this paper is focused on a detailed review of main structures and topologies for SRM drives. The proposed study is not limited to the classic two-level power converters topologies dedicated to the SRMs; it also presents a review about recent approaches, such as multilevel topologies and based on impedance source network. Moreover, this review is also focused on a new class of topologies associated to these machines, namely the ones with fault-tolerant capability. This new category of topologies has been a topic of research in recent years, being currently considered an area of great interest for future research work. An analysis, taking into consideration the main features of each structure and topology, was addressed in this review. A classification and comparison of the several structures and topologies for each kind of converter, considering modularity, boost capability, number of necessary switches and phases, integration in the machine design, control complexity, available voltage levels and fault-tolerant capability to different failure modes, is also presented. In this way, this review also includes a description of the presented solutions taking into consideration the reliability of the SRM drive.info:eu-repo/semantics/publishedVersio

The modular multilevel DC converters for MVDC and HVDC applications

A dc structure for an electrical power system is seen to have important advantages over an ac structure for the purpose of renewable energy integration and for expansion of transmission and distribution networks. There is also much interest and strong motivation to interconnect the existing point-to-point dc links to form multi-terminal and multi-voltage dc networks, which can make full use of the benefits of a dc scheme across various voltage levels and also increase the flexibility and ease the integration of both centralized and distributed renewable energy. This thesis investigates both high step-ratio dc-dc conversion to interface dc systems with different voltage levels and low step-ratio dc-dc conversion to interconnect dc systems with similar but not identical voltages (still within the same voltage level). The research work explores the possibility of combining the relatively recent modular multilevel converter (MMC) technology with the classic dc-dc circuits and from this proposes several modular multilevel dc converters, and their associated modulation methods and control schemes to operate them, which inherit the major advantages of both MMC technologies and classic dc-dc circuits. They facilitate low-cost, high-compactness, high-efficiency and high-reliability conversion for the medium voltage level and high voltage level dc network interconnection. For medium voltage level cases, this thesis extends the classic LLC dc-dc circuit by introducing MMC-like stack of sub-modules (SMs) in place of the half-bridge or full-bridge inverter in the original configuration. Two families of resonant modular multilevel dc converters (RMMCs) are proposed covering high step-ratio and low step-ratio conversion respectively. A phase-shift modulation scheme is further proposed for these RMMCs that creates an inherent feature of balancing SM capacitor voltages, provides a high effective operating frequency for reducing system footprint and offers a wide operating range for flexible conversion. For high voltage level cases requiring a high step-ratio conversion, a modular multilevel dc-ac-dc converter based on the single-active-bridge or dual-active-bridge structure is explored. The operating mode developed for this converter employs a near-square-wave ac current in order to decrease both the volt-ampere rating requirement for semiconductor devices and the energy storage requirement for SM capacitors. For low step-ratio cases, a single-stage modular multilevel dc-dc converter based on a buck-boost structure is examined, and an analysis method is created to support the choice of the circulating current frequency for minimum current stresses and reactive power losses. Theoretical analysis of and operating principles for all of these proposed modular multilevel dc converters, together with their associated modulation methods and control schemes, are verified by both time-domain simulation at full-scale and experimental tests on down-scaled prototypes. The results demonstrate that these medium voltage and high voltage dc-dc converters are good candidates for the interconnection of dc links at different voltages and thereby make a contribution to future multi-terminal and multi-voltage dc networks.Open Acces

Developed cascaded multilevel inverter topology to minimise the number of circuit devices and voltage stresses of switches

In this study, a novel structure for cascade multilevel inverter is presented. The proposed inverter can generate all possible DC voltage levels with the value of positive and negative. The proposed structure results in reduction of switches number, relevant gate driver circuits and also the installation area and inverter cost. The suggested inverter can be used as symmetric and asymmetric structures. Comparing the peak inverse voltage and losses of the proposed inverter with conventional multilevel inverters show the superiority of the proposed converter. The operation and good performance of the proposed multilevel inverter have been verified by the simulation results of a single-phase nine-level symmetric and 17-level asymmetric multilevel inverter and experimental results of a nine-level and 17-level inverters. Simulation and experimental results confirmed the validity and effectiveness performance of the proposed inverter

The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

DESIGN AND IMPROVEMENT OF PHOTOVOLTAIC BASED INDUCTION MOTOR USING MULTILEVEL INVERTERS

Multilevel Inverters are power devices that convert direct current (DC) to alternating current (AC). The focus of this work lies in the study, simulation and implementation of cascaded H-bridge multilevel inverters, since they operate on the basis of multiple inputs. Each DC input could be interchanged with a solar panel to achieve the photovoltaic setup of the system. Furthermore, tests on the solar irradiances around an area of interest were carried. Full analysis of two and three levels inverters are included as well. Matlab and Simulink software packages are used in the study and simulation. Resistive and Inductive loads are present in the design, illustrating the resistive-inductive property of the single-phase induction motor

Modelling and control techniques for multiphase electric drives: a phase variable approach

Multiphase electric drives are today one of the most relevant research topics for the electrical engineering scientific community, thanks to the many advantages they offer over standard three-phase solutions (e.g., power segmentation, fault-tolerance, optimized performances, torque/power sharing strategies, etc...). They are considered promising solutions in many application areas, like industry, traction and renewable energy integration, and especially in presence of high-power or high-reliability requirements. However, contrarily to the three-phase counterparts, multiphase drives can assume a wider variety of different configurations, concerning both the electrical machine (e.g., symmetrical/asymmetrical windings disposition, concentrated/distributed windings, etc...) and the overall drive topology (e.g., single-star configuration, multiple-star configuration, open-end windings, etc…). This aspect, together with the higher number of variables of the system, can make their analysis and control more challenging, especially when dealing with reconfigurable systems (e.g., in post-fault scenarios). This Ph.D. thesis is focused on the mathematical modelling and on the control of multiphase electric drives. The aim of this research is to develop a generalized model-based approach that can be used in multiple configurations and scenarios, requiring minimal reconfigurations to deal with different machine designs and/or different converter topologies, and suitable both in healthy and in faulty operating conditions. Standard field-oriented approaches for the analysis and control of multiphase drives, directly derived as extensions of the three-phase equivalents, despite being relatively easy and convenient solutions to deal with symmetrical machines, may suffer some hurdles when applied to some asymmetrical configurations, including post-fault layouts. To address these issues, a different approach, completely derived in the phase variable domain, is here developed. The method does not require any vector space decomposition or rotational transformation but instead explicitly considers the mathematical properties of the multiphase machine and the effects of the drive topology (which typically introduces some constraints on the system variables). In this thesis work, the proposed approach is particularized for multiphase permanent magnet synchronous machines and for multiphase synchronous reluctance machines. All the results are obtained through rigorous mathematical derivations, and are supported and validated by both numerical analysis and experimental tests. As proven considering many different configurations and scenarios, the main benefits of the proposed methodology are its generality and flexibility, which make it a viable alternative to standard modelling and control algorithms

Contributions on spectral control for the asymmetrical full bridge multilevel inverter

Las topologías de circuitos inversores multinivel pueden trabajar a tensiones y potencias mayores que las alcanzadas por convertidores convencionales de dos niveles. Además, la conversión multinivel reduce la distorsión armónica de las variables de salida y en algunos casos, a pesar del aumento de elementos de conmutación, también reduce las pérdidas de conversión al incrementarse el número de niveles. La reducción de distorsión alcanzada por el número de niveles puede aprovecharse para reducir las pérdidas de conmutación disminuyendo la frecuencia de las señales portadoras. Para reducir aún más esta frecuencia sin degradar el espectro, nosotros controlamos las pendientes de las portadoras triangulares. Primero se han desarrollado dos modelos analíticos para predecir el espectro del voltage de salida, dependiendo de: el índice de modulación MA, la razón de distribución de voltaje K de las fuentes de alimentación , y las cuatro pendientes de las portadoras{r1, r2, r3, r4}. El primer modelo considera el Muestreo Natural y se basa en Series Dobles de Fourier (SDF) mientras que el segundo modelo, utiliza la Serie Sencilla de Fourier (SSF) introduciendo el concepto de Muestreo Pseudo-Natural, una aproximación digital de la modulación natural. Ambos modelos son programados en Matlab, verificados con Pspice y validados con un prototipo experimental que contiene un modulador digital implementado con DSP.La concordancia entre las modulaciones natural y pseudo-natural, asi como entre sus respectivos modelos, es aprovechada por un algorítmo genético (AG) donde la THD es la función costo a reducir. Después de varios ensayos y de sintonizar el AG, se genera una matriz que contiene conjuntos de portadoras optimizadas dentro un rango específico de las variables {MA,K} y es probada con un segundo prototipo en lazo cerrado. Un lazo lento digital modifica las portadoras creadas por un dsPIC en modulaciones PWM; estas son demoduladas y sus amplitudes corregidas por un lazo de acción anticipada. Estas portadoras se comparan con una referencia sinusoidal que a su vez es modificada por variables de estado, generando finalmente la modulación multinivel en lazo cerrado. Los resultados finales demuestran la fiabilidad de la reducción de armónicos usando la programación de las pendientes de las portadoras. Palabras claves: inversor multinivel, PWM, distorsión armónica, modelo espectral, pendiente de portadora, conjunto de portadoras, distribución de niveles, Serie Doble de Fourier, Serie Simple de Fourier, muestreo natural, muestreo regular, muestreo pseudo-natural , Algoritmos Genéticos.Multilevel inverter (MI) topologies can work at higher voltage and higher power than conventional two-level converters. In addition, multilevel conversion reduces the output variables harmonic distortion and, sometimes, in spite of the devices-count increment, the conversion losses can also decrease by increasing the number of levels. The harmonic distortion reduction achieved by increasing the number of levels, can be used to further reducing the switching losses by decreasing the inverter carrier frequencies. To reduce even more the switching frequency without degrading output spectrum, we control the triangular carrier waveforms slopes. First, to achieve this target, two analytical models have been created in order to predict the inverter output voltage spectrum, depending on diverse parameters: the amplitude modulation index MA, the voltage distribution K of the inverter input sources, and the four carrier slopes {r1, r2, r3, r4}. The first model considers Natural Sampling and is based on Double Fourier Series (DFS) whereas the second model based on Simple Fourier Series (SFS), introduces the concept of Pseudo-Natural Sampling, as a digital approximation of the natural modulation. Both models are programmed in Matlab, verified with Pspice simulations and validated with a first experimental prototype with a DSP digital modulator.The good agreement between natural and pseudo-natural modulations, as well as their respective DFS and SFS models, is exploited by a Genetic Algorithm (GA) application where THD is the cost function to minimize. After testing and properly tuning the GA, a framework matrix containing the optimized carriers set for a specific range of variables {MA,K} is generated and then, tested with a second, closed-loop prototype. A slow digital loop modifies the carrier slopes created by dsPIC microcontroller as PWM modulations, whose amplitude, once demodulated, are affected by a feed-forward loop. These carriers, compared with a sinusoidal reference, state-feedback modified, generate finally the closed-loop multilevel modulation. The final results demonstrates the feasibility of harmonic reduction by means of carrier slopes programming. Keywords: multilevel inverter, PWM, harmonic distortion, spectral modeling, carrier slope, carriers set, level distribution, Double Fourier Series, Simple Fourier Series, natural sampling, regular sampling, pseudo-natural sampling, Genetic Algorithms

Analysis of heterogeneously configured converter stations in HVDC grids under asymmetrical DC operation

Additional technologies different from classical high voltage alternating current (HVAC) transmission are necessary to deal with the higher renewable energy integration in the current energetic framework. High voltage direct current (HVDC) transmission based on modular multilevel voltage source converters (MMC-VSC) is a promising alternative for some applications. Thus, the number of HVDC projects is increasing worldwide. This makes possible their future gradual interconnection to constitute an overlay DC grid that offers numerous additional advantages but still many challenges. Even if the development of the HVDC technology overcomes all the present challenges in the future, the lack of standardisation will lead to a DC grid integrated by different HVDC station topologies, grounding schemes, DC-DC converters, or control strategies. During normal operation, the DC grid is assumed to work symmetrically, and some aspects, such as the topology or the grounding scheme, do not intervene in the system response. However, in case of working asymmetrically due to a fault or outage affecting a single pole of the DC network, all the aspects mentioned above affect the system operation. However, such a heterogeneous DC grid under asymmetrical DC operation has yet to be addressed in the literature. Thus, it constitutes the general objective of this thesis. To achieve this objective, the asymmetrical DC operation in different heterogeneous DC systems is studied using load flow, dynamic EMT simulation, and small-signal stability analysis. The analysis of a system of these characteristics under asymmetrical DC operation is an original contribution of the thesis. First, a DC grid connecting different AC zones and formed by different HVDC station topologies and DC-DC converters is modelled to perform the load-flow assessment. The asymmetrical DC operation is examined by causing an asymmetrical contingency in the DC network. The analysis is carried out considering different grounding resistances, control strategies, control parameters, and galvanic isolation ability of the DC-DC converters. The results obtained regarding DC current and voltage asymmetry, which are related to the overloading of elements and excessive voltage deviation, allow for assessing the impact of the asymmetrical operation under different circumstances. Second, the dynamic assessment aims to identify the main aspects involved in the transient response during asymmetrical DC operation. The connection of a symmetrical monopolar station to a bipolar system is modelled, and the outage of one of the converters of a bipolar station is simulated. The effect of the grounding impedance and the control strategy on the dynamic response of the system is assessed. Therefore, the main system parameters and issues that may appear are identified. Furthermore, the effect of the connection of the symmetrical monopole station over the existing protections of the bipolar system is assessed by considering different grounding impedances in the monopolar station. Finally, the small-signal analysis of a system composed of different topologies focuses on the asymmetrical DC operation. A new suitable model is developed and validated against EMT simulations. The small-signal analysis is carried out, and the main aspects that impact the small-signal stability during asymmetrical operation are identified. Furthermore, a new controller that enhances the system stability during asymmetrical DC operation is developed.Para hacer frente a la mayor integración de energías renovables en el marco energético actual se necesitan tecnologías adicionales distintas de la transmisión clásica en corriente alterna en alta tensión (HVAC). La transmisión de corriente continua en alta tensión (HVDC) basada en convertidores multinivel modulares de fuente de tensión (MMCVSC) es una alternativa prometedora para algunas aplicaciones. Por tanto, el número de proyectos HVDC está aumentando en todo el mundo. Esto hace posible que se interconecten gradualmente en el futuro para formar una red de corriente continua (CC) que ofrece numerosas ventajas adicionales, pero todavía muchos retos. Aunque el desarrollo de la tecnología HVDC supere todos los retos actuales en el futuro, la falta de normalización dará lugar a una red de CC integrada por diferentes topologías de estaciones HVDC, esquemas de puesta a tierra, convertidores CC-CC o estrategias de control. Durante el funcionamiento normal, la red de CC funciona simétricamente y algunos aspectos, como la topología o el esquema de puesta a tierra, no intervienen en la respuesta del sistema. Sin embargo, en caso de funcionamiento asimétrico, debido a una falta o desconexión que afecte a un solo polo de la red de CC, todos los aspectos mencionados anteriormente afectan al funcionamiento del sistema. Este tipo de red de CC heterogénea en funcionamiento asimétrico aún no se ha abordado en el estado del arte. Por ello, constituye el objetivo general de esta tesis. Para lograr este objetivo, se estudia el funcionamiento asimétrico de CC en diferentes sistemas heterogéneos de CC utilizando diferentes enfoques como el flujo de cargas, la simulación dinámica EMT y el análisis de estabilidad de pequeña señal. El análisis de un sistema de estas características en funcionamiento asimétrico en CC constituye la principal contribución de la tesis. Para realizar la evaluación del flujo de cargas, se modela una red de CC que conecta diferentes zonas de CA y está formada por diferentes topologías de estaciones HVDC y convertidores CC-CC. A continuación, se examina el funcionamiento asimétrico de CC provocando una contingencia asimétrica en la red de CC. El análisis se lleva a cabo considerando diferentes resistencias de puesta a tierra, estrategias de control, parámetros de control y capacidad de aislamiento galvánico de los convertidores CC-CC. Los resultados obtenidos sobre la asimetría de corriente y tensión en CC, relacionados con la sobrecarga de los elementos y la desviación excesiva de la tensión, permiten evaluar el impacto del funcionamiento asimétrico en distintas circunstancias. La evaluación dinámica pretende identificar los principales aspectos que intervienen en la respuesta transitoria durante el funcionamiento asimétrico en CC. En primer lugar, se modela la conexión de una estación monopolar simétrica a un sistema bipolar. A continuación, se simula la interrupción de uno de los convertidores de una estación bipolar y se evalúa el efecto de la impedancia de puesta a tierra y de la estrategia de control en la respuesta dinámica del sistema. Por último, se identifican los principales parámetros del sistema y los problemas que pueden aparecer. Además, se evalúa el efecto de la conexión de la estación monopolar simétrica sobre las protecciones existentes del sistema bipolar, considerando diferentes impedancias de puesta a tierra en la estación monopolar. Por último, se realiza el análisis de pequeña señal de un sistema compuesto por diferentes topologías centrándose en el funcionamiento asimétrico en CC. Para ello, primero se desarrolla un nuevo modelo adecuado para este análisis y se valida con simulaciones EMT. A continuación, se lleva a cabo el análisis de pequeña señal y se identifican los principales aspectos que afectan a la estabilidad de pequeña señal durante el funcionamiento asimétrico. Además, se desarrolla un nuevo controlador que mejora la estabilidad del sistema durante el funcionamiento asimétrico en CC.Programa de Doctorado en Ingeniería Eléctrica, Electrónica y Automática por la Universidad Carlos III de MadridPresidente: José Luis Rodríguez Amenedo.- Secretario: Eduardo Prieto Araujo.- Vocal: Dunixe Marene Larruskain Escoba

Single phase asymmetrical multilevel inverter topology with reduced device count

Multilevel Inverters (MLIs) are vital components for medium voltage and high-power applications. However, the number of components will increase with increased output voltage levels. It leads to high power losses. In this thesis, a new single-phase asymmetrical multilevel inverter topology used for medium and high voltage applications is proposed. The topology is capable of producing n-level output voltage with reduced device counts. It is achieved by arranging available switches and direct current (dc)-sources to obtain the maximum combinations of addition and subtraction of the input dc-sources. A comprehensive literature review has been carried out, and the proposed topology is compared with the topologies available in the literature. Comparison based on the number of switches utilized, the number of dc sources used, and the total number of devices is made. To verify the viability of the proposed topology, circuit models for 9-level, 25-level, and 67-level inverters are developed and simulated in Matlab-Simulink software first. Voltage and current waveforms and THD for resistive and inductive loads are obtained from the simulation model and validated with the experimental setup. Experimental results of the proposed inverter prototype for 9-level and 25-level output, developed in the laboratory, are presented. A low-frequency and high-frequency switching strategy for the proposed inverter topology are also presented in this work. Thermal modelling of the proposed topology is done in PLECS software, and detailed loss analysis for 9-level as well as 25-level topologies is carried out. The fundamental topology utilizes 9 switches with a total standing voltage (TSV) of 6.75 per unit while the 25-level topology structure has 12 switches with the TSV of 6.92 per unit only. Comparison with the other multilevel topologies shows that the proposed circuit requires fewer power switches and dc-sources to produce the same output levels. Due to the low switching frequency requirement, the proposed topology is applicable for high and medium voltage applications, resulting in lower switching losses