700 research outputs found

    DENSE 3D HETEROGENEOUS INTEGRATION USING SELECTIVE COBALT ALD DEPOSITION AND RECONSTITUTED TIERS

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    In this thesis, a new fine-pitch low-temperature bonding technology using selective Cobalt (Co) ALD deposition is presented. The benefits of selective Co ALD bonding are nanometer-scale controllability, low planarity requirement, low bonding temperature (200 oC) and potential for ultra-high-density bonds. To demonstrate selective Co ALD bonding, a Cu/Gap/Cu three-layered structure, which emulates 3D ICs stacking, is fabricated and carefully characterized. The testbed shows seamless Co interconnection between the Cu pads after Co ALD deposition for 1000 cycles. The electrical measurements demonstrate over 90% yield, which prove the Co connectivity between the Cu pads. Moreover, in this thesis, a new type of SiO2-reconstituted-tier stacking technology is proposed. The SiO2-reconstituted-tier stacking technology utilizes low-temperature ICP- PECVD SiO2 to encapsulate multi-sized chiplets. After ICP-PECVD SiO2 encapsulation, the through-oxide-vias and the pads are formed on the SiO2 to complete the reconstituted tier before stacking. Compared with conventional epoxy-molding-compound-based stacking, the SiO2 approach can have smaller loss tangent (10x), lower CTE mismatch (3x) and the higher via density (>400x). The thickness of the proposed technology can be over 10 times smaller than conventional epoxy molding. The two technologies, with further analysis and studies, open up exciting new opportunities for future 3D IC heterogeneous integration.M.S

    US Microelectronics Packaging Ecosystem: Challenges and Opportunities

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    The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technological solutions to enhance cost-effectiveness while incorporating more features into the silicon footprint. One promising approach is Heterogeneous Integration (HI), which involves advanced packaging techniques to integrate independently designed and manufactured components using the most suitable process technology. However, adopting HI introduces design and security challenges. To enable HI, research and development of advanced packaging is crucial. The existing research raises the possible security threats in the advanced packaging supply chain, as most of the Outsourced Semiconductor Assembly and Test (OSAT) facilities/vendors are offshore. To deal with the increasing demand for semiconductors and to ensure a secure semiconductor supply chain, there are sizable efforts from the United States (US) government to bring semiconductor fabrication facilities onshore. However, the US-based advanced packaging capabilities must also be ramped up to fully realize the vision of establishing a secure, efficient, resilient semiconductor supply chain. Our effort was motivated to identify the possible bottlenecks and weak links in the advanced packaging supply chain based in the US.Comment: 22 pages, 8 figure

    Technical Design Report for the PANDA Micro Vertex Detector

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    This document illustrates the technical layout and the expected performance of the Micro Vertex Detector (MVD) of the PANDA experiment. The MVD will detect charged particles as close as possible to the interaction zone. Design criteria and the optimisation process as well as the technical solutions chosen are discussed and the results of this process are subjected to extensive Monte Carlo physics studies. The route towards realisation of the detector is outlined

    Creation and Optimisation of Plasma Etch Processes for the Manufacture of Silicon Microstructures

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    Microneedles are an area of growing interest for applications in transdermal delivery. Small, minimally invasive medical or cosmetic devices, microneedles are intended to penetrate the skin’s outer protective layer (stratum corneum) to facilitate delivery of active formulations into the skin. Delivery of solution via microneedles has the benefits associated with hypodermic injection, i.e. avoiding the first-pass metabolism systems, with the added advantages of painless delivery and dose sparing from the reduced solution volumes required.Advancements in semiconductor processing technologies and equipment have enabled the creation of devices and structures that could not have been fabricated in the past. This is also true for the fabrication of microneedles, where previous manufacturing methods have relied on hazardous chemicals such as Hydrofluoric Acid and Potassium Hydroxide to create the sharp tip of the needle, required to reduce insertion force.In this thesis, the realisation of a hollow bevelled silicon microneedle fabricated using only plasma processing techniques is presented, providing a route to scalable manufacture of high-performance, sharp-tipped microneedles. The microneedle fabrication process consists of three main etch steps in the process flow to create hollow structures. For each of the Bevel, Bore, and Shaft processes the development and optimisation is detailed. Throughout the process development, several unexpected processing issues were encountered, including depth non-uniformity, “notching”, and “silicon grass”. Investigations have been performed to determine the root cause of each issue and fine-tune processes to optimise the final devices. A discussion of the process hardware is also presented, with reference to the benefits for each specific application process.Following development and optimisation of each individual process, the Bevel, Bore, and Shaft processes were integrated in the manufacturing flow to create the final hollow silicon microneedle device. Issues arising from the combination of the three processes have been investigated, resolved, and optimised. This includes the conception and execution of a novel process for the plasma smoothing of an angled silicon surface, which improved the quality of lithography on the non-planar bevel surface and minimised grass formation.Preliminary testing, undertaken to assess the suitability of these devices for transdermal use, included mechanical fracture force, skin penetration, and injection testing. The microneedles were found to be strong enough to remain intact during insertion, and demonstrate successful penetration and injection through the stratum corneum and into the deeper skin layers

    Design, Fabrication, and Characterization of an Array of Graphene Based Variable Capacitors

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    Since it was first isolated and characterized in 2004, graphene has shown the potential for a technological revolution. This is due to its amazing physical properties such as high electrical conductivity, high thermal conductivity, and extreme flexibility. Freestanding graphene membranes naturally possesses an intrinsic rippled structure, and these ripples are in constant random motion even room temperatures. Occasionally, the ripples undergo spontaneous buckling (change of curvature from concave to convex and vice versa) and the potential energy associated with this is a double well potential. This movement of graphene is a potential source of vibrational energy. In this dissertation, we want to exploit this movement of freestanding graphene to design and create an array of freestanding graphene-based variable capacitors on 100 mm silicon wafer substrates. Our intent is to develop a device that can be highly duplicated and potentially incorporated into an integrated circuit to power low power electronics. This work is based on a two-mask photolithography process. The first photolithographic mask creates long trenches terminated by square wells which have a cone-shaped tip feature etched at its center. These trenches, wells, and tip features are created by isotropic wet etching of the underlying sacrificial SiO2 layer with hydrofluoric acid for 5 minutes at room temperature. The second photolithographic mask lays out metal traces from the tip to its bonding pad along the trench, and a second bonding pad opposite the square well. Creation of these conductive pathways and contact pads is done by deposition of Cr and Au. Finally, I perform large area graphene transfer to the tip regions and use critical point dryer to dry the substrate. This ensures that graphene is left freestanding over the tip feature. This graphene-tip feature junction forms a variable capacitor where graphene is the movable plate, and the etched tip feature is the fixed plate. Capacitance of up to 60aF is measured from these device structures. In a broad picture, this graphene-tip variable capacitor can be incorporated in a low power energy harvesting circuit as the power source component. It can be used to power low power electronics such as remote sensors. Harnessing this energy associated with graphene vibrations could be source of clean renewable energy and an alternative to batteries

    High Speed Test Interface Module Using MEMS Technology

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    With the transient frequency of available CMOS technologies exceeding hundreds of gigahertz and the increasing complexity of Integrated Circuit (IC) designs, it is now apparent that the architecture of current testers needs to be greatly improved to keep up with the formidable challenges ahead. Test requirements for modern integrated circuits are becoming more stringent, complex and costly. These requirements include an increasing number of test channels, higher test-speeds and enhanced measurement accuracy and resolution. In a conventional test configuration, the signal path from Automatic Test Equipment (ATE) to the Device-Under-Test (DUT) includes long traces of wires. At frequencies above a few gigahertz, testing integrated circuits becomes a challenging task. The effects on transmission lines become critical requiring impedance matching to minimize signal reflection. AC resistance due to the skin effect and electromagnetic coupling caused by radiation can also become important factors affecting the test results. In the design of a Device Interface Board (DIB), the greater the physical separation of the DUT and the ATE pin electronics, the greater the distortion and signal degradation. In this work, a new Test Interface Module (TIM) based on MEMS technology is proposed to reduce the distance between the tester and device-under-test by orders of magnitude. The proposed solution increases the bandwidth of test channels and reduces the undesired effects of transmission lines on the test results. The MEMS test interface includes a fixed socket and a removable socket. The removable socket incorporates MEMS contact springs to provide temporary with the DUT pads and the fixed socket contains a bed of micro-pins to establish electrical connections with the ATE pin electronics. The MEMS based contact springs have been modified to implement a high-density wafer level test probes for Through Silicon Vias (TSVs) in three dimensional integrated circuits (3D-IC). Prototypes have been fabricated using Silicon On Insulator SOI wafer. Experimental results indicate that the proposed architectures can operate up to 50 GHz without much loss or distortion. The MEMS probes can also maintain a good elastic performance without any damage or deformation in the test phase

    MME2010 21st Micromechanics and Micro systems Europe Workshop : Abstracts

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    Broadband solar energy harvesting enabled by micro and nanostructured materials

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    In der kommenden Ära des "Carbon Peak und der KohlenstoffneutralitĂ€t" ist es besonders wichtig, neue Energietechnologien zu entwickeln, die kostengĂŒnstig, umweltfreundlich und im industriellem Maßstab herstellbar sind, um die herkömmlichen fossilen Brennstoffe zu ersetzen, die weithin als Verursacher des Treibhauseffekts und hĂ€ufiger extremer Wetterlagen gelten. Solarenergie ist sozusagen eine unerschöpfliche Energieform, die jedem Land der Erde kostenlos zur VerfĂŒgung steht. Daher ist sie im Vergleich zu Kernenergie, Windenergie und blauer Energie die vielversprechendste Alternative zu fossiler Energie. In dieser Arbeit werden breitbandige Materialien zur Gewinnung von Solarenergie als Lichtabsorber fĂŒr Anwendungen zur Umwandlung von Solarenergie, wie Stromerzeugung, Wasserdampferzeugung und Wasserstofferzeugung, vorgestellt. ZunĂ€chst wird schwarzes Silizium (b-Si) mit einer Vielzahl von Mikro-Nanostrukturen durch reaktives IonenĂ€tzen (RIE) hergestellt. Die so hergestellten b-Si-Proben mit ultra-breitbandiger Lichtabsorption können fĂŒr die photo-thermoelektrische (P-TE) Stromerzeugung, die photothermische (PT) Wasserverdampfung und die photoelektrochemische (PEC) Wasserreduktion verwendet werden, was die Leistung der Solarenergieumwandlung aufgrund ihrer hervorragenden Lichtabsorption im gesamten Sonnenspektrum verbessert. DarĂŒber hinaus wurde eine metastabile Atomlagenabscheidung (MS-ALD) mit Selbstorganisation zur Herstellung großflĂ€chiger plasmonischer 3D-Ag@SiO2 Hybrid-Nanostrukturen entwickelt. Diese zeigen auch eine ultrabreitbandige sehr hohe Absorption im gesamten Sonnenspektrum. Wenn sie fĂŒr die P-TE- und PT-Wasserverdampfung verwendet werden, verbessert sich die Leistung der Solarenergieumwandlung im Vergleich zu b-Si-Proben.In the current era of "Carbon Peak and Carbon Neutrality", it is particularly important to develop low-cost, environmentally-friendly, and industrial-scale energy technologies to replace the traditional fossil fuels, which are widely considered to cause the greenhouse effect and frequent extreme weathers. Solar energy is a kind of energy that lasts forever and is freely available for all countries all over the world. Therefore, it is the most promising alternative to fossil energy compared to nuclear energy, wind energy, and blue energy (Energy that comes from ocean, such as tidal energy, salinity gradient energy). In this work, broadband solar energy harvesting materials are produced and demonstrated to serve as light absorbers for solar energy conversion applications, such as electric power generation, water steam generation and hydrogen generation. Firstly, black silicon (b-Si) with micro-nanostructures is fabricated by reactive ion etching (RIE). The as-prepared b-Si samples with ultra-broadband light absorption can be used for photo-thermoelectric (P-TE) power generation, photothermal (PT) water evaporation and photoelectrochemical (PEC) water reduction, which enhances solar energy conversion performance due to their excellent broadband light absorption. In addition, a metastable atomic layer deposition (MS-ALD) self-assembly strategy for fabricating large area 3D Ag@SiO2 hybrid plasmonic nanostructures was developed. They also demonstrate an ultra-broadband super-high absorption over the whole solar spectrum. When they are further used for P-TE and PT water evaporation, the solar energy conversion performances are improved compared with b-Si samples
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