Developing the knowledge-based human resources that support the implementation of the National Dual Training System (NDTS): evaluation of TVET teacher's competency at MARA Training Institutions

Development in the world of technical and vocational education and training (TVET) on an ongoing basis is a challenge to the profession of the TVET-teachers to maintain their performance. The ability of teachers to identify the competencies required by their profession is very critical to enable them to make improvements in teaching and learning. For a broader perspective the competency needs of the labour market have to be matched by those developed within the vocational learning processes. Consequently, this study has focused on developing and validating the new empirical based TVET-teacher competency profile and evaluating teacher’s competency. This study combines both quantitative and qualitative research methodology that was designed to answer all the research questions. The new empirical based competency profile development and TVET-teacher evaluation was based upon an instructional design model. In addition, a modified Delphi technique has also been adopted throughout the process. Initially, 98 elements of competencies were listed by expert panel and rated by TVET institutions as important. Then, analysis using manual and statistical procedure found that 112 elements of competencies have emerged from seventeen (17) clusters of competencies. Prior to that, using the preliminary TVET-teacher competency profile, the level of TVETteacher competencies was found to be Proficient and the finding of 112 elements of competencies with 17 clusters was finally used to develop the new empirical based competency profile for MARA TVET-teacher. Mean score analysis of teacher competencies found that there were gaps in teacher competencies between MARA institutions (IKM) and other TVET institutions, where MARA-teacher was significantly better than other TVET teacher. ANOVA and t-test analysis showed that there were significant differences between teacher competencies among all TVET institutions in Malaysia. On the other hand, the study showed that teacher’s age, grade and year of experience are not significant predictors for TVET-teacher competency. In the context of mastering the competency, the study also found that three competencies are classified as most difficult or challenging, twelve competencies are classified as should be improved, and eight competencies are classified as needed to be trained. Lastly, to make NDTS implementation a reality for MARA the new empirical based competency profile and the framework for career development and training pathway were established. This Framework would serve as a significant tool to develop the knowledge based human resources needed. This will ensure that TVET-teachers at MARA are trained to be knowledgeable, competent, and professional and become a pedagogical leader on an ongoing basis towards a world class TVET-education system

GSFC Cutting Edge Avionics Technologies for Spacecraft

With the launch of NASA's first fiber optic bus on SAMPEX in 1992, GSFC has ushered in an era of new technology development and insertion into flight programs. Predating such programs the Lewis and Clark missions and the New Millenium Program, GSFC has spearheaded the drive to use cutting edge technologies on spacecraft for three reasons: to enable next generation Space and Earth Science, to shorten spacecraft development schedules, and to reduce the cost of NASA missions. The technologies developed have addressed three focus areas: standard interface components, high performance processing, and high-density packaging techniques enabling lower cost systems. To realize the benefits of standard interface components GSFC has developed and utilized radiation hardened/tolerant devices such as PCI target ASICs, Parallel Fiber Optic Data Bus terminals, MIL-STD-1773 and AS1773 transceivers, and Essential Services Node. High performance processing has been the focus of the Mongoose I and Mongoose V rad-hard 32-bit processor programs as well as the SMEX-Lite Computation Hub. High-density packaging techniques have resulted in 3-D stack DRAM packages and Chip-On-Board processes. Lower cost systems have been demonstrated by judiciously using all of our technology developments to enable "plug and play" scalable architectures. The paper will present a survey of development and insertion experiences for the above technologies, as well as future plans to enable more "better, faster, cheaper" spacecraft. Details of ongoing GSFC programs such as Ultra-Low Power electronics, Rad-Hard FPGAs, PCI master ASICs, and Next Generation Mongoose processors

Three-dimensional imaging and detection efficiency performance of orthogonal coplanar CZT strip detectors

We report on recent three-dimensional imaging performance and detection efficiency measurements obtained with 5 mm thick prototype CdZnTe detectors fabricated with orthogonal coplanar anode strips. In previous work, we have shown that detectors fabricated using this design achieve both very good energy resolution and sub-millimeter spatial resolution with fewer electronic channels than are required for pixel detectors. As electron-only devices, like pixel detectors, coplanar anode strip detectors can be fabricated in the thickness required to be effective imagers for photons with energies in excess of 500 keV. Unlike conventional double-sided strip detectors, the coplanar anode strip detectors require segmented contacts and signal processing electronics on only one surface. The signals can be processed to measure the total energy deposit and the photon interaction location in three dimensions. The measurements reported here provide a quantitative assessment of the detection capabilities of orthogonal coplanar anode strip detectors

Evolutionary trends in Transmit/Receive Module for Active Phased Array Radars

Worldwide, defense technologies are rapidly evolving and are currently aiming at integrating diverse functionalities like Radar, Electronic Warfare, Communications, etc., on a singular miniaturized platform. Hence, it cannot be denied that the advancements in modern Active Phased Array Radar technologies assume a critical role towards the achievement of this goal. A typical Active Phased Array Radar comprises of an Active Antenna Array Unit (AAAU) consisting of a large number of radiating elements, Transmit/Receive (T/R) Modules with other associated RF and digital circuitry and power electronics.  This paper presents mainly the developments in Transmit/Receive (T/R) Module technology, which assimilates various stages of the technological evolution - past, current and futuristic. It discusses how these technologies contribute towards the improvement of efficiency, miniaturization and reliability without compromising its performance parameters

Development of a novel series interconnect for thin-film photovoltaics

Thin-film photovoltaics (TF-PV) offer possible cost savings from reduced semiconductor usage compared to the incumbent crystalline silicon technology. During manufacture TF-PV devices are deposited onto a large glass panel and split into many, series interconnected, cells in order to obtain a useful electrical output. M-Solv has patented a novel process to do this series interconnection in a single step, One Step Interconnect (OSI), after the deposition of all layers. This has a number of benefits compared to the conventional process including, but not limited to, reduced capital cost by ~30%, reduced panel transit time and reduced energy usage. In this thesis OSI is introduced, the individual processes developed (laser scribing, inkjet printing of insulator and conductor) and working modules manufactured. The electrical performance of the manufactured modules compare favourably with reference material from the same deposition run and modules interconnected in the conventional way. Fill factor (FF) is the principle metric when determining the quality of series interconnection and very high FF, ~80%, have been shown by OSI cells. Preliminary lifetime testing guided by the IEC 61646 specification has been carried out and the results are promising with OSI cells surviving more than double the required number of thermal cycles from -40 to +85°C with no sign of performance degradation

Zinc oxide-nickel cermet selective coatings obtained by sequential electrodeposition

The investigation of pulse electrodepositing modes influence on crystal structure, morphology and optical properties of ZnO has revealed the conditions in which quasi-one-dimensional (1D) ZnO nanorod arrays are formed as separate nanorods. Due to a sufficiently high resistance of zinc oxide, the electrodeposition of nickel on the fluorine doped tin oxide (FTO)/ZnO surfaces carried out in space between the ZnO nanorods. An incomplete filling of the gaps between nanorods by the nickel nanoparticles through subsequent Ni electrodeposition ensured the creation of ZnO–Ni graded cermets. The cermets, in which electrochemical filling of the spaces between ZnO nanorods by Ni, was performed in the pulse mode. It provided higher absorption of visible and near IR light. It was shown that the manufactured ZnO–Ni graded cermets have high light absorption combined with comparatively low thermal losses, so these cermets are promising cheap and affordable selective coatings for solar heat collectors

Investigation of CdS Nanowires and Planar Films for Enhanced Performance as Window Layers in CdS-CdTe Solar Cell Devices

Cadmium sulfide (CdS) and cadmium telluride (CdTe) are two leading semiconductor materials used in the fabrication of thin film solar cells of relatively high power conversion efficiency and low manufacturing cost. In this work, CdS/CdTe solar cells with a varying set of processing parameters and device designs were fabricated and characterized for comparative evaluation. Studies were undertaken to elucidate the effects of (i) each step in fabrication and (ii) parameters like thickness, sheet resistance, light absorptivity solution concentration, inert gas pressure etc. Best results were obtained when the thickness of CdS planar film for the window layer was in the range of 150 nm to 200 nm. Also, CdS nanowires were fabricated for use as the window layer in CdS-CdTe solar cells. Their materials characteristics were studied with scanning electron microscopy (SEM) and X-ray Diffraction (XRD). Spectral absorption measurements on the planar CdS films and nanowire CdS layers were performed and results compared. It was established that the nanowire CdS design was superior because its absorption of sunlight was far less than that of planar CdS film, which would lead to enhanced performance in the CdS-CdTe solar cell through higher short circuit current density and higher open circuit voltage. Diode behavior of CdS-CdTe devices on planar CdS and nanowire CdS was analyzed and compared. KEYWORDS: Thin Film Solar Cell, Nanowire, UV Absorption, Open-circuit Voltage, Close Space Sublimatio

Optoelectronic devices and packaging for information photonics

This thesis studies optoelectronic devices and the integration of these components onto optoelectronic multi chip modules (OE-MCMs) using a combination of packaging techniques. For this project, (1×12) array photodetectors were developed using PIN diodes with a GaAs/AlGaAs strained layer structure. The devices had a pitch of 250μm, operated at a wavelength of 850nm. Optical characterisation experiments of two types of detector arrays (shoe and ring) were successfully performed. Overall, the shoe devices achieved more consistent results in comparison with ring diodes, i.e. lower dark current and series resistance values. A decision was made to choose the shoe design for implementation into the high speed systems demonstrator. The (1x12) VCSEL array devices were the optical sources used in my research. This was an identical array at 250μm pitch configuration used in order to match the photodetector array. These devices had a wavelength of 850nm. Optoelectronic testing of the VCSEL was successfully conducted, which provided good beam profile analysis and I-V-P measurements of the VCSEL array. This was then implemented into a simple demonstrator system, where eye diagrams examined the systems performance and characteristics of the full system and showed positive results. An explanation was given of the following optoelectronic bonding techniques: Wire bonding and flip chip bonding with its associated technologies, i.e. Solder, gold stud bump and ACF. Also, technologies, such as ultrasonic flip chip bonding and gold micro-post technology were looked into and discussed. Experimental work implementing these methods on packaging the optoelectronic devices was successfully conducted and described in detail. Packaging of the optoelectronic devices onto the OEMCM was successfully performed. Electrical tests were successfully carried out on the flip chip bonded VCSEL and Photodetector arrays. These results verified that the devices attached on the MCM achieved good electrical performance and reliable bonding. Finally, preliminary testing was conducted on the fully assembled OE-MCMs. The aim was to initially power up the mixed signal chip (VCSEL driver), and then observe the VCSEL output