ELECTROMAGNETIC BANDGAP STRUCTURES FOR BROADBAND SWITCHING NOISE MITIGATION IN HIGH-SPEED PACKAGES

For the past two decades, silicon-based complementary metal-oxide semiconductor (CMOS) technology and circuits have been advancing along an exponential path of shrinking device dimensions, increasing density, increasing speed, and decreasing cost. Electronic design complexity is in constant acceleration and new designs have to incorporate new features, which inevitably will require faster processing time. In recent years this acceleration rate has drastically decreased because of various constraints, such as static power dissipation due to leakage current, the effect of wires and interconnects and the decreased immunity of modern devices to noise, interference and voltage fluctuations on their Power Distribution Network (PDN). Lowering the power supply voltages and hence the power consumption of a single transistor, has been possible due to the fact that these new technologies are able to provide smaller and faster transistors with lower threshold levels. The benefits associated with lowering the threshold levels of the transistors used in a given device comes at a high-price, specifically the decrease of immunity of such device to noise and fluctuations of the power supply voltage. The research work carried out in this dissertation, addresses the concept of embedding Electromagnetic Bandgap (EBG) structures in conventional power distribution networks in order to increase the immunity of the circuits that feed from such networks to noise and voltage fluctuations. Underlying theories of Embedded EBG (EEBG) structures and design methodologies are presented. Various design concepts, based on simulations, measurements and different modeling techniques developed during this research work are presented. The accuracy of these methods is analyzed by comparing results of these techniques with experimental results. Also, this work shows that EEBG structures are not only very effective in the suppression of switching noise in high-speed circuit but also they suppress Electromagnetic Interference (EMI) caused by such switching and they provide increased immunity for their PDN to external sources of noise. Finally new EEBG configurations, topologies and miniaturized structures are introduced that overcome the limitations of current switching noise mitigation techniques, including initial EEBG designs to provide immunity against high-bandwidth noise, voltage fluctuations and radiation, new EEBG configurations, topologies and miniaturized structures are introduced and their efficacy is demonstrated. The novel designs developed during this research provide noise mitigation over a wide range of frequencies, and also extends the suppression frequency range into the sub-gigahertz region, only using a single EBG design with smaller patches than those used in previous works

An Efficient Approach for Power Delivery Network Design with Closed-Form Expressions for Parasitic Interconnect Inductances

Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it. Full-wave methods are often employed to study the power integrity problem. While full-wave methods can be accurate, they are time and memory consuming. The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network. However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency. A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes. Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced. Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network. While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes. Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived. This allows both frequency and transient responses to be done with SPICE simulation

Modeling of the IC\u27s Switching Currents on the Power Bus of a High Speed Digital Board

When the performances of the electronic technology increase (higher frequencies, more power, lover power supply, faster transistors, reduced chip dimensions), designing electronic equipment becomes more challenging for the electronic engineers. Signal and power integrity on board become of paramount importance. One of the main causes of board malfunctions and electromagnetic radiation is the simultaneous switching noise (SSN) due to the integrated circuits soldered on the board. The paper proposes two simple procedures to model the SSN, so to evaluate its effects in any point of the board

Via transition modeling and charge replenishment of the power delivery network in multilayer PCBs

In the first article of this thesis, the charge delivery in the power distribution network for printed circuit board has been analyzed in the time-domain. Performing all the simulations and analyzing the PDN physics and modeling, I contributed to a better understanding of the time-domain decoupling mechanism. The second paper studies the noise coupling sing a segmentation approach combined with a via-to-antipad capacitance model and a plane-pair cavity model. Building equivalent circuit models as well as analyzing design strategies, I contributed to a new approach for the PDN analysis in multilayer PCBs. The third article discusses how to estimate the amount of current needed for large ICs and how to evaluate the amount of noise voltage due to this current draw. After accurate discussion of the design strategies, I modeled and simulated the free evolution of a charged PCB with and without decoupling capacitors. The depletion of charges stored between the power buses in time and frequency-domain has been investigated as a function of the plane thickness, SMT decoupling closeness in the fourth paper. With my contribution, the time and frequency-domain in the PDN have been related using circuit approach. In the fifth paper, I analyzed a 26-layer printed circuit board performing milling, measurements and building circuit models. It is the first time that the segmentation approach has been used for differential geometry. In addition, Debye materials have been implemented in the cavity model --Abstract, page iv

Modeling DC Power-Bus Structures with Vertical Discontinuities using a Circuit Extraction Approach Based on a Mixed-Potential Integral Equation

The DC power-bus is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented herein to model arbitrary multilayer power-bus structures with vertical discontinuities that include decoupling capacitor interconnects. Green\u27s functions in a stratified medium are used and the problem is formulated using a mixed-potential integral equation approach. The final matrix equation is not solved, rather, an equivalent circuit model is extracted from the first-principles formulation. Agreement between modeling and measurements is good, and the utility of the approach is demonstrated for DC power-bus design

A Comprehensive Study on Printed Circuit Board Backdoor Coupling in High Intensity Radiated Fields Environments

Due to the prevalence of unintentional electromagnetic interference (EMI) and the growth of intentional electromagnetic interference (IEMI) or high power microwave (HPM) sources, it is now more important than ever to understand how electronic systems are affected by high intensity radiated fields (HIRF) environments. Both historic events and experimental testing have demonstrated that HIRF environments are capable of disrupting and potentially damaging critical systems including but not limited to civil and military aircraft, industrial control systems (ICS), and internet of things (IoT) devices. However, there is limited understanding on the complex electromagnetic interactions that lead to such effects. This study provides unique insight into the backdoor coupling mechanisms associated with printed circuit boards (PCBs) as well as design techniques for reducing electromagnetic coupling in HIRF environments. Among existing literature, there is very little quantification of PCB coupling leading to multiple gaps in understanding. In this study, both PCB plane coupling and PCB trace coupling are explored under various conditions using 3D full-wave electromagnetic modeling and experimental testing. Data is provided for each individual technique as well as combinations of techniques which show greater immunity. Through this comprehensive study on PCB backdoor coupling, this work demonstrates that simple and explainable techniques can be incorporated into multi-layer PCB designs to mitigate coupling in HIRF environments. Additionally, variations in PCB layout as well as plane wave angle of incidence and polarization are explored to ensure that the conclusions are broadly applicable. It is expected that the information in this study as well as future work in this area will enable hardening design guidelines in order to reduce coupling and therefore better protect systems in such harsh electromagnetic environments

Analysis and mitigation of parallel-plate noise for high-isolation applications

Achieving highs levels of isolation between different functionalities in a PCB can be challenging. One of the major issues is that vertically adjacent planes or area fills in a PCB can form a parallel-plate waveguide with no cutoff frequency and serve as an efficient coupling mechanism between interconnects. Due to the finite size of the conductors, reflections off the edges of these parallel-plate cavities can result in the formation of standing-wave patterns with very high field strengths, resulting in high coupling at certain frequencies. This noise coupling mechanism can be suppressed by connecting the parallel plates together with an adequate amount of vias. However, adjacent power and ground conductors can not be conductively connected together because they are at different DC potentials. As a result, there is no way to eliminate the existence of parallel-plate noise in a power/ground cavity. A fundamental understanding of this problem is needed to determine how it can be mitigated. The first part of the thesis develops a qualitative understanding of the underlying physics of how noise is coupled to the parallel plates from a variety of interconnects and how the noise can spread throughout the design. This discussion is then expanded to more complex geometries that are representative of what could occur in actual designs. Test vehicles are created to study the noise coupling to various interconnects from noise injected into the power distribution network by an amplifier. Parameters affecting the transfer of noise from an amplifier to the power distribution network, such as the addition of capacitors, are then explored. An expression to predict the noise coupling using S-parameter measurements of the PCB and the amplifier is developed. It is demonstrated that results from full-wave electromagnetic simulation can be used to predict the amount of noise coupling before PCB fabrication. General design recommendations are then presented to improve design robustness to the parallel-plate noise --Abstract, page iii

Electromagnetic Interference and Compatibility

Recent progress in the fields of Electrical and Electronic Engineering has created new application scenarios and new Electromagnetic Compatibility (EMC) challenges, along with novel tools and methodologies to address them. This volume, which collects the contributions published in the “Electromagnetic Interference and Compatibility” Special Issue of MDPI Electronics, provides a vivid picture of current research trends and new developments in the rapidly evolving, broad area of EMC, including contributions on EMC issues in digital communications, power electronics, and analog integrated circuits and sensors, along with signal and power integrity and electromagnetic interference (EMI) suppression properties of materials

Electromagnetic Interference Reduction using Electromagnetic Bandgap Structures in Packages, Enclosures, Cavities, and Antennas

Electromagnetic interference (EMI) is a source of noise problems in electronic devices. The EMI is attributed to coupling between sources of radiation and components placed in the same media such as package or chassis. This coupling can be either through conducting currents or through radiation. The radiation of electromagnetic (EM) fields is supported by surface currents. Thus, minimizing these surface currents is considered a major and critical step to suppress EMI. In this work, we present novel strategies to confine surface currents in different applications including packages, enclosures, cavities, and antennas. The efficiency of present methods of EM noise suppression is limited due to different drawbacks. For example, the traditional use of lossy materials and absorbers suffers from considerable disadvantages including mechanical and thermal reliability leading to limited life time, cost, volume, and weight. In this work, we consider the use of Electromagnetic Band Gap (EBG) structures. These structures are suitable for suppressing surface currents within a frequency band denoted as the bandgap. Their design is straight forward, they are inexpensive to implement, and they do not suffer from the limitations of the previous methods. A new method of EM noise suppression in enclosures and cavity-backed antennas using mushroom-type EBG structures is introduced. The effectiveness of the EBG as an EMI suppresser is demonstrated using numerical simulations and experimental measurements. To allow integration of EBGs in printed circuit boards and packages, novel miniaturized simple planar EBG structures based on use of high-k dielectric material (r > 100) are proposed. The design consists of meander lines and patches. The inductive meander lines serve to provide current continuity bridges between the capacitive patches. The high-k dielectric material increases the effective capacitive load substantially in comparison to commonly used material with much lower dielectric constant. Meander lines can increase the effective inductive load which pushes down the lower edge of bandgap, thus resulting in a wider bandgap. Simulation results are included to show that the proposed EBG structures provide very wide bandgap (~10GHz) covering the multiple harmonics of of currently available microprocessors and its harmonics. To speed up the design procedure, a model based on combination of lumped elements and transmission lines is proposed. The derived model predicts accurately the starting edge of bandgap. This result is verified with full-wave analysis. Finally, another novel compact wide band mushroom-type EBG structure using magneto-dielectric materials is designed. Numerical simulations show that the proposed EBG structure provides in-phase reflection bandgap which is several times greater than the one obtained from a conventional EBG operating at the same frequency while its cell size is smaller. This type of EBG structure can be used efficiently as a ground plane for low-profile wideband antennas

Contributions to the design of power modules for electric and hybrid vehicles: trends, design aspects and simulation techniques

314 p.En la última década, la protección del medio ambiente y el uso alternativo de energías renovables están tomando mayor relevancia tanto en el ámbito social y político, como científico. El sector del transporte es uno de los principales causantes de los gases de efecto invernadero y la polución existente, contribuyendo con hasta el 27 % de las emisiones a nivel global. En este contexto desfavorable, la electrificación de los vehículos de carretera se convierte en un factor crucial. Para ello, la transición de la actual flota de vehículos de carretera debe ser progresiva forzando la investigación y desarrollo de nuevos conceptos a la hora de producir vehículos eléctricos (EV) y vehículos eléctricos híbridos (HEV) más eficientes, fiables, seguros y de menor coste. En consecuencia, para el desarrollo y mejora de los convertidores de potencia de los HEV/EV, este trabajo abarca los siguientes aspectos tecnológicos: - Arquitecturas de la etapa de conversión de potencia. Las principales topologías que pueden ser implementadas en el tren de potencia para HEV/EV son descritas y analizadas, teniendo en cuenta las alternativas que mejor se adaptan a los requisitos técnicos que demandan este tipo de aplicaciones. De dicha exposición se identifican los elementos constituyentes fundamentales de los convertidores de potencia que forman parte del tren de tracción para automoción.- Nuevos dispositivos semiconductores de potencia. Los nuevos objetivos y retos tecnológicos solo pueden lograrse mediante el uso de nuevos materiales. Los semiconductores Wide bandgap (WBG), especialmente los dispositivos electrónicos de potencia basados en nitruro de galio (GaN) y carburo de silicio (SiC), son las alternativas más prometedoras al silicio (Si) debido a las mejores prestaciones que poseen dichos materiales, lo que permite mejorar la conductividad térmica, aumentar las frecuencias de conmutación y reducir las pérdidas.- Análisis de técnicas de rutado, conexionado y ensamblado de módulos de potencia. Los módulos de potencia fabricados con dies en lugar de dispositivos discretos son la opción preferida por los fabricantes para lograr las especificaciones indicadas por la industria de la automoción. Teniendo en cuenta los estrictos requisitos de eficiencia, fiabilidad y coste es necesario revisar y plantear nuevos layouts de las etapas de conversión de potencia, así como esquemas y técnicas de paralelización de los circuitos, centrándose en las tecnologías disponibles.Teniendo en cuenta dichos aspectos, la presente investigación evalúa las alternativas de semiconductores de potencia que pueden ser implementadas en aplicaciones HEV/EV, así como su conexionado para la obtención de las densidades de potencia requeridas, centrándose en la técnica de paralelización de semiconductores. Debido a la falta de información tanto científica como comercial e industrial sobre dicha técnica, una de las principales contribuciones del presente trabajo ha sido la propuesta y verificación de una serie de criterios de diseño para el diseño de módulos de potencia. Finalmente, los resultados que se han extraído de los circuitos de potencia propuestos demuestran la utilidad de dichos criterios de diseño, obteniendo circuitos con bajas impedancias parásitas y equilibrados eléctrica y térmicamente. A nivel industrial, el conocimiento expuesto en la presente tesis permite reducir los tiempos de diseño a la hora de obtener prototipos de ciertas garantías, permitiendo comenzar la fase de prototipado habiéndose realizado comprobaciones eléctricas y térmicas