Contribution to dimensionality reduction of digital predistorter behavioral models for RF power amplifier linearization

The power efficiency and linearity of radio frequency (RF) power amplifiers (PAs) are critical in wireless communication systems. The main scope of PA designers is to build the RF PAs capable to maintain high efficiency and linearity figures simultaneously. However, these figures are inherently conflicted to each other and system-level solutions based on linearization techniques are required. Digital predistortion (DPD) linearization has become the most widely used solution to mitigate the efficiency versus linearity trade-off. The dimensionality of the DPD model depends on the complexity of the system. It increases significantly in high efficient amplification architectures when considering current wideband and spectrally efficient technologies. Overparametrization may lead to an ill-conditioned least squares (LS) estimation of the DPD coefficients, which is usually solved by employing regularization techniques. However, in order to both reduce the computational complexity and avoid ill-conditioning problems derived from overparametrization, several efforts have been dedicated to investigate dimensionality reduction techniques to reduce the order of the DPD model. This dissertation contributes to the dimensionality reduction of DPD linearizers for RF PAs with emphasis on the identification and adaptation subsystem. In particular, several dynamic model order reduction approaches based on feature extraction techniques are proposed. Thus, the minimum number of relevant DPD coefficients are dynamically selected and estimated in the DPD adaptation subsystem. The number of DPD coefficients is reduced, ensuring a well-conditioned LS estimation while demanding minimum hardware resources. The presented dynamic linearization approaches are evaluated and compared through experimental validation with an envelope tracking PA and a class-J PA The experimental results show similar linearization performance than the conventional LS solution but at lower computational cost.La eficiencia energetica y la linealidad de los amplificadores de potencia (PA) de radiofrecuencia (RF) son fundamentales en los sistemas de comunicacion inalambrica. El principal objetivo a alcanzar en el diserio de amplificadores de radiofrecuencia es lograr simultaneamente elevadas cifras de eficiencia y de linealidad. Sin embargo, estas cifras estan inherentemente en conflicto entre si, y se requieren soluciones a nivel de sistema basadas en tecnicas de linealizacion. La linealizacion mediante predistorsion digital (DPD) se ha convertido en la solucion mas utilizada para mitigar el compromise entre eficiencia y linealidad. La dimension del modelo del predistorsionador DPD depende de la complejidad del sistema, y aumenta significativamente en las arquitecturas de amplificacion de alta eficiencia cuando se consideran los actuales anchos de banda y las tecnologfas espectralmente eficientes. El exceso de parametrizacion puede conducir a una estimacion de los coeficientes DPD, mediante minimos cuadrados (LS), mal condicionada, lo cual generalmente se resuelve empleando tecnicas de regularizacion. Sin embargo, con el fin de reducir la complejidad computacional y evitar dichos problemas de mal acondicionamiento derivados de la sobreparametrizacion, se han dedicado varies esfuerzos para investigar tecnicas de reduccion de dimensionalidad que permitan reducir el orden del modelo del DPD. Esta tesis doctoral contribuye a aportar soluciones para la reduccion de la dimension de los linealizadores DPD para RF PA, centrandose en el subsistema de identificacion y adaptacion. En concrete, se proponen varies enfoques de reduccion de orden del modelo dinamico, basados en tecnicas de extraccion de caracteristicas. El numero minimo de coeficientes DPD relevantes se seleccionan y estiman dinamicamente en el subsistema de adaptacion del DPD, y de este modo la cantidad de coeficientes DPD se reduce, lo cual ademas garantiza una estimacion de LS bien condicionada al tiempo que exige menos recursos de hardware. Las propuestas de linealizacion dinamica presentados en esta tesis se evaluan y comparan mediante validacion experimental con un PA de seguimiento de envolvente y un PA tipo clase J. Los resultados experimentales muestran unos resultados de linealizacion de los PA similares a los obtenidos cuando se em plea la solucion LS convencional, pero con un coste computacional mas reducido.Postprint (published version

BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

Objective: The advent of High-Performance Computing (HPC) in recent years has led to its increasing use in brain study through computational models. The scale and complexity of such models are constantly increasing, leading to challenging computational requirements. Even though modern HPC platforms can often deal with such challenges, the vast diversity of the modeling field does not permit for a single acceleration (or homogeneous) platform to effectively address the complete array of modeling requirements. Approach: In this paper we propose and build BrainFrame, a heterogeneous acceleration platform, incorporating three distinct acceleration technologies, a Dataflow Engine, a Xeon Phi and a GP-GPU. The PyNN framework is also integrated into the platform. As a challenging proof of concept, we analyze the performance of BrainFrame on different instances of a state-of-the-art neuron model, modeling the Inferior- Olivary Nucleus using a biophysically-meaningful, extended Hodgkin-Huxley representation. The model instances take into account not only the neuronal- network dimensions but also different network-connectivity circumstances that can drastically change application workload characteristics. Main results: The synthetic approach of three HPC technologies demonstrated that BrainFrame is better able to cope with the modeling diversity encountered. Our performance analysis shows clearly that the model directly affect performance and all three technologies are required to cope with all the model use cases.Comment: 16 pages, 18 figures, 5 table

Pavlov's dog associative learning demonstrated on synaptic-like organic transistors

In this letter, we present an original demonstration of an associative learning neural network inspired by the famous Pavlov's dogs experiment. A single nanoparticle organic memory field effect transistor (NOMFET) is used to implement each synapse. We show how the physical properties of this dynamic memristive device can be used to perform low power write operations for the learning and implement short-term association using temporal coding and spike timing dependent plasticity based learning. An electronic circuit was built to validate the proposed learning scheme with packaged devices, with good reproducibility despite the complex synaptic-like dynamic of the NOMFET in pulse regime

Linear Operation of Switch-Mode Outphasing Power Amplifiers

Radio transceivers are playing an increasingly important role in modern society. The ”connected” lifestyle has been enabled by modern wireless communications. The demand that has been placed on current wireless and cellular infrastructure requires increased spectral efficiency however this has come at the cost of power efficiency. This work investigates methods of improving wireless transceiver efficiency by enabling more efficient power amplifier architectures, specifically examining the role of switch-mode power amplifiers in macro cell scenarios. Our research focuses on the mechanisms within outphasing power amplifiers which prevent linear amplification. From the analysis it was clear that high power non-linear effects are correctable with currently available techniques however non-linear effects around the zero crossing point are not. As a result signal processing techniques for suppressing and avoiding non-linear operation in low power regions are explored. A novel method of digital pre-distortion is presented, and conventional techniques for linearisation are adapted for the particular needs of the outphasing power amplifier. More unconventional signal processing techniques are presented to aid linearisation of the outphasing power amplifier, both zero crossing and bandwidth expansion reduction methods are designed to avoid operation in nonlinear regions of the amplifiers. In combination with digital pre-distortion the techniques will improve linearisation efforts on outphasing systems with dynamic range and bandwidth constraints respectively. Our collaboration with NXP provided access to a digital outphasing power amplifier, enabling empirical analysis of non-linear behaviour and comparative analysis of behavioural modelling and linearisation efforts. The collaboration resulted in a bench mark for linear wideband operation of a digital outphasing power amplifier. The complimentary linearisation techniques, bandwidth expansion reduction and zero crossing reduction have been evaluated in both simulated and practical outphasing test benches. Initial results are promising and indicate that the benefits they provide are not limited to the outphasing amplifier architecture alone. Overall this thesis presents innovative analysis of the distortion mechanisms of the outphasing power amplifier, highlighting the sensitivity of the system to environmental effects. Practical and novel linearisation techniques are presented, with a focus on enabling wide band operation for modern communications standards

Partial least squares identification of multi look-up table digital predistorters for concurrent dual-band envelope tracking power amplifiers

©208 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly select only the best LUTs of the DPD function in the forward path, and thus reduce the number of required coefficients. On the other hand, the PLS regression method is proposed to address both the regularization problem of the coefficient estimation and, at the same time, reducing the number of coefficients to be estimated in the DPD feedback identification path. Moreover, by exploiting the orthogonality of the PLS transformed matrix, the computational complexity of the parameters' identification can be significantly simplified. Experimental results will prove how it is possible to reduce the DPD complexity (i.e., the number of coefficients) in both the forward and feedback paths while meeting the targeted linearity levels.Peer ReviewedPostprint (author's final draft

Independent digital predistortion parameters estimation using adaptive principal component analysis

©2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.This paper presents an estimation/adaptation method based on the adaptive principal component analysis (APCA) technique to guarantee the identification of the minimum necessary parameters of a digital predistorter. The proposed estimation/adaptation technique is suitable for online field-programmable gate array or system on chip implementation. By exploiting the orthogonality of the resulting transformed matrix obtained with the APCA technique, it is possible to reduce the number of coefficients to be estimated which, at the same time, has a beneficial regularization effect by preventing ill-conditioning or overfitting problems. Therefore, this identification/adaptation method enhances the robustness of the parameter estimation and simplifies the adaptation by reducing the number of estimated coefficients. Due to the orthogonality of the new basis, these parameters can be estimated independently, thus allowing for scalability. Experimental results will show that it is possible to determine the minimum number of parameters to be estimated in order to meet the targeted linearity levels while ensuring a robust well-conditioned identification. Moreover, the results will show how thanks to the orthogonality property of the new basis functions, the coefficients of the digital predistorter can be estimated independently. This allows to tradeoff the digital predistorter adaptation time versus performance and hardware complexity.Peer ReviewedPostprint (author's final draft