State-of-art on permanent magnet brushless DC motor drives

Permanent magnet brushless DC (PMBLDC) motors are the latest choice of researchers due to their high efficiency, silent operation, compact size, high reliability and low maintenance requirements. These motors are preferred for numerous applications; however, most of them require sensorless control of these motors. The operation of PMBLDC motors requires rotor-position sensing for controlling the winding currents. The sensorless control would need estimation of rotor position from the voltage and current signals, which are easy to be sensed. This paper presents a state of art on PMBLDC motor drives with emphasis on sensorless control of these motors

Technology development of electric vehicles: A review

To reduce the dependence on oil and environmental pollution, the development of electric vehicles has been accelerated in many countries. The implementation of EVs, especially battery electric vehicles, is considered a solution to the energy crisis and environmental issues. This paper provides a comprehensive review of the technical development of EVs and emerging technologies for their future application. Key technologies regarding batteries, charging technology, electric motors and control, and charging infrastructure of EVs are summarized. This paper also highlights the technical challenges and emerging technologies for the improvement of efficiency, reliability, and safety of EVs in the coming stages as another contribution

Sensorless Commutation Method for Low-Voltage BLDC Motors Based on Unfiltered Line Voltage

This study presents a filterless and sensorless commutation method for low-voltage brushless DC motors. The proposed method utilizes controlled DC-link inverter instead of the Pulse-Width Modulation (PWM) scheme. Therefore, motor voltages and currents become free from the high-frequency noise of PWM switching, thereby decreasing motor losses. Consequently, the method does not require any Low-Pass Filter (LPF) and it does not involve speed-dependent phase delay caused by the LPF. However, current commutation deteriorates waveform of line voltages. Thus, specific functions are defined to compensate for the current commutation spikes and remove false zero-crossing points of line voltages. Furthermore, the use of unfiltered line voltages eliminates the requirement of any phase shifter. Hence, the main superiority of the proposed method over preceding sensorless commutation methods is the simultaneous elimination of the phase shifter and LPF, which makes the method simple and cost-effective. The simulation and experimental results show the effectiveness and validity of the method

Contribuciones en el campo de la detección de la posición y velocidad de motores "Brushed DC" y "Brushless DC" mediante técnicas sensorless

- INTRODUCCIÓN: Entre los motores eléctricos de corriente continua, se tienen los motores con escobillas (brushed DC, BDC), que emplean escobillas para conmutar la corriente, y los motores sin escobillas (brushless DC, BLDC), que emplean un inversor electrónico para realizar la conmutación de fases. La revisión de la literatura relacionada con motores BLDC (Artículo 1 del compendio) y BDC sugiere que en el control de los mismos utilizando sensores de posición, como codificadores digitales (encoders) o sondas de efecto Hall, puede reducirse el coste y aumentar la fiabilidad mediante la sustitución de dichos sensores por técnicas sin sensores (sensorless). - OBJETIVOS: El objetivo general de la tesis comprende el análisis, desarrollo y validación de diversas técnicas sensorless para la detección de la posición y velocidad de motores BDC y BLDC. Para la consecución de este objetivo se han propuesto cuatro técnicas. La primera está basada en el análisis las ondulaciones o rizado (ripple) de la corriente en motores BDC (patente ES 2334551 A1). La segunda se fundamenta también en la componente ripple de la corriente para motores BDC, pero utilizando reconocimiento de patrones con clasificadores (Artículo 2 del compendio). La tercera está basada en la derivada de los voltajes de fase para motores BLDC (Artículo 3 del compendio). La cuarta aplica redes neuronales artificiales a motores BLDC (Artículo 4 del compendio).- MÉTODOS: La primera técnica permite determinar la posición y velocidad de un motor BDC mediante la detección de las ondulaciones que aparecen en la corriente del motor, utilizando la comparación entre las muestras de la corriente. En la segunda técnica, se estima la posición y velocidad de motores BDC utilizando reconocimiento de patrones con clasificadores de tipo Máquina Vectores de Soporte (Support Vector Machine, SVM). En la tercera técnica, se detecta la información de posición y velocidad de un motor BLDC a través de la derivada de los voltajes de fase con respecto a un punto neutro virtual, empleando un hardware versátil basado en una matriz de puertas programable en campo (FPGA). En la cuarta técnica, se estima la posición y velocidad de un motor BLDC mediante dos ANNs de tipo Perceptron Multicapa (Multilayer Perceptron, MLP). - RESULTADOS: En la primera técnica, se han obtenido unos errores absolutos medios de posición y velocidad inferiores a 17,75 rad y 4,64 rpm, respectivamente, en un rango entre 5.000 rpm y 7.000 rpm en condiciones de velocidad constante o con variación lenta. En la segunda técnica, se han obtenido unos errores absolutos medios de posición y velocidad inferiores a 19 rad y 18 rpm, respectivamente, en un rango entre 500 rpm y 11.000 rpm, en condiciones como aceleración constante y saltos abruptos de velocidad. En la tercera técnica, se han obtenido unos errores cuadráticos medios de posición entre 10º y 30º, y de velocidad inferiores a 3 rpm con el motor BLDC sin carga; así como de posición entre 10º y 15º, y de velocidad inferiores a 1 rpm en condiciones de plena carga, en un rango entre 5 rpm y 1.500 rpm con aceleración constante y saltos bruscos de velocidad. En la cuarta técnica, se ha obtenido un error de posición absoluto medio de 6,47º y un error de velocidad relativo medio de 4,87% en un rango entre 125 rpm y 1.500 rpm con una aceleración constante a plena carga. -CONCLUSIONES: Los resultados muestran que las cuatro técnicas propuestas permiten detectar la posición y velocidad, tanto en motores BDC como BLDC, con una aceptable precisión, inmunidad al ruido y coste computacional sobre un amplio rango de velocidades. En base a ello, puede considerarse que las técnicas desarrolladas representan una alternativa fiable respecto a técnicas de detección basadas en sensores y frente a técnicas sensorless básicas.Departamento de Teoría de la Señal y Comunicaciones e Ingeniería Telemátic

Control of brushless DC motor using siingle-input fuzzy proportional-integral controller

Over the years, development in control industry has brought a hybrid controller, Fuzzy Proportional-Integral (PI) Controller (FPIC) as Brushless DC (BLDC) motor speed regulator with as good performance as PI controller. The FPIC suffers from lengthy design time due to the large number of rules and parameter tuning. Thus, this thesis proposes a newly developed Single-Input Fuzzy PI Controller (SIFPIC) to be used as the BLDC motor speed controller. SIFPIC is a simplified version of FPIC with one input variable derived using signed distance method. SIFPIC gives a speed performance comparable to the FPIC but with much faster computing time and simpler tuning process. The motor performance with SIFPIC is evaluated through simulation and experimental approach in terms of speed, current and torque response under several test conditions. The performance is then compared with the motor performance with discrete PI and FPIC speed controller. FPIC is excluded from the comparison in the experiment due to the limitation of DS1104 Digital Signal Processor. From the simulation conducted, SIFPIC produced a comparable performance as FPIC in speed response where both controllers eliminated undershoot and oscillation problems. Under constant speed and changing speed conditions, SIFPIC also showed it superiority from discrete PI controller with average of 36.3% and 11.7% lower ripples than discrete PI controller, respectively. The simulation findings have been verified by the experimental results

Interconnection and damping assignment passivity-based controller for multilevel inverter

This thesis proposes an Interconnection and Damping Assignment Passivity- Based Controller (IDA-PBC) to control a 5-level Cascaded H-Bridge Multilevel Inverter (CHMI). The proposed IDA-PBC uses the Port-Controlled Hamiltonian (PCH) theory to modify the CHMI system energy by adding damping, thereby modifying dissipation structures related to dynamics and stability. The objective is to maintain output voltage regulation, resulting in fast response and low Total Harmonic Distortion (THD) values. Although the proposed IDA-PBC control algorithm showed outstanding performance during transient and nonlinear load condition, further improvements are required during no-load condition. To address this, improvements in the form of modification to the proposed IDA-PBC algorithm was made by adding a single loop Proportional-Integral (PI) controller at the voltage side, which was aimed at regulating the voltage before it was fed back into the IDAPBC. In order to verify the viability of the proposed IDA-PBC-PI controller for the CHMI, a simulation study was conducted using MATLAB/Simulink at a 20 kHz switching frequency and 1 µs sample time. The controller was tested at five load conditions, namely, steady state, no-load to full-load, load uncertainty, structural uncertainty and nonlinear load condition. The performance of the proposed controller showed regulated output voltage while maintaining THD values below 5% in all load conditions and a maximum of 220 µs response time during load uncertainty. The simulation results revealed the superiority of the proposed controller compared to the conventional double loop PI controller and the conventional IDA-PBC in terms of transient response, THD value, as well as regulation of the output voltage. The feasibility of the proposed IDA-PBC-PI controller was validated by developing its proof-of-concept hardware prototype. The simulation and experimental results obtained based on a 3 kHz switching frequency and 38 µs sample time were found to be consistent, which confirmed the capability of the proposed controller in controlling the 5-level CHMI output voltage