Partition-driven standard cell thermal placement

ABSTRACT The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitiondriven standard cell placement. The proposed heuristic uses a multigrid-like method that simplifies the thermal equation at each level of partitioning and makes it possible to incorporate temperature considerations directly as placement constraints, thus leading to better thermal distribution. Our experimental results verify the effectiveness of our scheme. We also describe an algorithm to derive a compact thermal model with a complexity of O(mn + m 2 ), where m is the number of the mesh nodes on the substrate surface and n is the number of all internal mesh nodes

CAD methodologies for low power and reliable 3D ICs

The main objective of this dissertation is to explore and develop computer-aided-design (CAD) methodologies and optimization techniques for reliability, timing performance, and power consumption of through-silicon-via(TSV)-based and monolithic 3D IC designs. The 3D IC technology is a promising answer to the device scaling and interconnect problems that industry faces today. Yet, since multiple dies are stacked vertically in 3D ICs, new problems arise such as thermal, power delivery, and so on. New physical design methodologies and optimization techniques should be developed to address the problems and exploit the design freedom in 3D ICs. Towards the objective, this dissertation includes four research projects. The first project is on the co-optimization of traditional design metrics and reliability metrics for 3D ICs. It is well known that heat removal and power delivery are two major reliability concerns in 3D ICs. To alleviate thermal problem, two possible solutions have been proposed: thermal-through-silicon-vias (T-TSVs) and micro-fluidic-channel (MFC) based cooling. For power delivery, a complex power distribution network is required to deliver currents reliably to all parts of the 3D IC while suppressing the power supply noise to an acceptable level. However, these thermal and power networks pose major challenges in signal routability and congestion. In this project, a co-optimization methodology for signal, power, and thermal interconnects in 3D ICs is presented. The goal of the proposed approach is to improve signal, thermal, and power noise metrics and to provide fast and accurate design space explorations for early design stages. The second project is a study on 3D IC partition. For a 3D IC, the target circuit needs to be partitioned into multiple parts then mapped onto the dies. The partition style impacts design quality such as footprint, wirelength, timing, and so on. In this project, the design methodologies of 3D ICs with different partition styles are demonstrated. For the LEON3 multi-core microprocessor, three partitioning styles are compared: core-level, block-level, and gate-level. The design methodologies for such partitioning styles and their implications on the physical layout are discussed. Then, to perform timing optimizations for 3D ICs, two timing constraint generation methods are demonstrated that lead to different design quality. The third project is on the buffer insertion for timing optimization of 3D ICs. For high performance 3D ICs, it is crucial to perform thorough timing optimizations. Among timing optimization techniques, buffer insertion is known to be the most effective way. The TSVs have a large parasitic capacitance that increases the signal slew and the delay on the downstream. In this project, a slew-aware buffer insertion algorithm is developed that handles full 3D nets and considers TSV parasitics and slew effects on delay. Compared with the well-known van Ginneken algorithm and a commercial tool, the proposed algorithm finds buffering solutions with lower delay values and acceptable runtime overhead. The last project is on the ultra-high-density logic designs for monolithic 3D ICs. The nano-scale 3D interconnects available in monolithic 3D IC technology enable ultra-high-density device integration at the individual transistor-level. The benefits and challenges of monolithic 3D integration technology for logic designs are investigated. First, a 3D standard cell library for transistor-level monolithic 3D ICs is built and their timing and power behavior are characterized. Then, various interconnect options for monolithic 3D ICs that improve design quality are explored. Next, timing-closed, full-chip GDSII layouts are built and iso-performance power comparisons with 2D IC designs are performed. Important design metrics such as area, wirelength, timing, and power consumption are compared among transistor-level monolithic 3D, gate-level monolithic 3D, TSV-based 3D, and traditional 2D designs.PhDCommittee Chair: Lim, Sung Kyu; Committee Member: Bakir, Muhannad; Committee Member: Kim, Hyesoon; Committee Member: Lee, Hsien-Hsin; Committee Member: Mukhopadhyay, Saiba

Coherent States Formulation of Polymer Field Theory

We introduce a stable and efficient complex Langevin (CL) scheme to enable the first numerical simulations of the coherent-states (CS) formulation of polymer field theory. In contrast with Edwards' well known auxiliary-field (AF) framework, the CS formulation does not contain an embedded non-linear, non-local functional of the auxiliary fields, and the action of the field theory has a fully explicit, finite-order and semi-local polynomial character. In the context of a polymer solution model, we demonstrate that the new CS-CL dynamical scheme for sampling fluctuations in the space of coherent states yields results in good agreement with now-standard AF simulations. The formalism is potentially applicable to a broad range of polymer architectures and may facilitate systematic generation of trial actions for use in coarse-graining and numerical renormalization-group studies.Comment: 14pages 8 figure

Integrating Smart Ceiling Fans and Communicating Thermostats to Provide Energy-Efficient Comfort

The project goal was to identify and test the integration of smart ceiling fans and communicating thermostats. These highly efficient ceiling fans use as much power as an LED light bulb and have onboard temperature and occupancy sensors for automatic operationbased on space conditions. The Center for the Environment (CBE) at UC Berkeley led the research team including TRC, Association for Energy Affordability (AEA), and Big Ass Fans (BAF). The research team conducted laboratory tests, installed99 ceiling fans and 12 thermostats in four affordable multifamily housing sites in California’s Central Valley, interviewed stakeholders to develop a case study, developed an online design tool and design guide, outlined codes and standards outreach, and published several papers.The project team raised indoor cooling temperature setpoints and used ceiling fans as the first stage of cooling; this sequencing of ceiling fans and air conditioningreducesenergy consumption, especially during peak periods, while providing thermal comfort.The field demonstration resulted in 39% measured compressor energy savings during the April–October cooling seasoncompared to baseline conditions, normalized for floor area. Weather-normalized energy use varied from a 36% increase to 71% savings, withmedian savings of 15%.This variability reflects the diversity in buildings, mechanical systems, prior operation settings, space types, andoccupants’ schedules,preferences, and motivations. All commercial spaces with regular occupancy schedules (and twoof the irregularly-occupied commercial spaces and one of the homes) showed energy savings on an absolute basis before normalizing for warmer intervention temperatures,and 10 of 13 sites showed energy savings on a weather-normalized basis. The ceiling fans provided cooling for one site for months during hot weather when the coolingequipment failed.Occupants reported high satisfaction with the ceiling fans and improved thermal comfort. This technology can apply to new and retrofit residential and commercial buildings

Modeling transport phenomena and uncertainty quantification in solidification processes

Direct chill (DC) casting is the primary processing route for wrought aluminum alloys. This semicontinuous process consists of primary cooling as the metal is pulled through a water cooled mold followed by secondary cooling with a water jet spray and free falling water. To gain insight into this complex solidification process, a fully transient model of DC casting was developed to predict the transport phenomena of aluminum alloys for various conditions. This model is capable of solving mixture mass, momentum, energy, and species conservation equations during multicomponent solidification. Various DC casting process parameters were examined for their effect on transport phenomena predictions in an alloy of commercial interest (aluminum alloy 7050). The practice of placing a wiper to divert cooling water from the ingot surface was studied and the results showed that placement closer to the mold causes remelting at the surface and increases susceptibility to bleed outs. Numerical models of metal alloy solidification, like the one previously mentioned, are used to gain insight into physical phenomena that cannot be observed experimentally. However, uncertainty in model inputs cause uncertainty in results and those insights. The analysis of model assumptions and probable input variability on the level of uncertainty in model predictions has not been calculated in solidification modeling as yet. As a step towards understanding the effect of uncertain inputs on solidification modeling, uncertainty quantification (UQ) and sensitivity analysis were first performed on a transient solidification model of a simple binary alloy (Al-4.5wt.%Cu) in a rectangular cavity with both columnar and equiaxed solid growth models. This analysis was followed by quantifying the uncertainty in predictions from the recently developed transient DC casting model. The PRISM Uncertainty Quantification (PUQ) framework quantified the uncertainty and sensitivity in macrosegregation, solidification time, and sump profile predictions. Uncertain model inputs of interest included the secondary dendrite arm spacing, equiaxed particle size, equiaxed packing fraction, heat transfer coefficient, and material properties. The most influential input parameters for predicting the macrosegregation level were the dendrite arm spacing, which also strongly depended on the choice of mushy zone permeability model, and the equiaxed packing fraction. Additionally, the degree of uncertainty required to produce accurate predictions depended on the output of interest from the model

Characterization on insulation performance, poststability, and foaming process of rigid polyurethane sandwich panel for cold storage warehouse

Polyurethane (PU) is a commonly used insulation material for cold storage warehouses. The insulation performance of PU sandwich panels made from blended blowing agents were re-assessed by k-factor measurements and insulation thickness calculation based on cold warehouse design standard, which has proved the significant impact of blowing agent difference on energy saving. The foam post-stability was also evaluated by mathematic profiling. The developed 3D paraboloid model based on gridding measurements has provided scientific method for panel shrinkage evaluation. Cell microstructure characterization and post-growth angle coefficients calculation were further performed for better understanding the shrinkage problem at microscopic level. The foaming process model of continuous panel production was developed based on FOAMAT characterization which has provided theoretical solution to panel processing

Coil-helix transition of polypeptide at water-lipid interface

We present the exact solution of a microscopic statistical mechanical model for the transformation of a long polypeptide between an unstructured coil conformation and an $\alpha$-helix conformation. The polypeptide is assumed to be adsorbed to the interface between a polar and a non-polar environment such as realized by water and the lipid bilayer of a membrane. The interfacial coil-helix transformation is the first stage in the folding process of helical membrane proteins. Depending on the values of model parameters, the conformation changes as a crossover, a discontinuous transition, or a continuous transition with helicity in the role of order parameter. Our model is constructed as a system of statistically interacting quasiparticles that are activated from the helix pseudo-vacuum. The particles represent links between adjacent residues in coil conformation that form a self-avoiding random walk in two dimensions. Explicit results are presented for helicity, entropy, heat capacity, and the average numbers and sizes of both coil and helix segments.Comment: 22 pages, 12 figures, accepted for publication by JSTA