On the impact of substrate electron injection on dynamic Ron in GaN-on-Si HEMTs

The impact of electron injection from the substrate on the dynamic Ron of GaN-on-Si High Electron Mobility Transistors (HEMTs) has been investigated by means of back-bias transient and vertical leakage measurements and TCAD simulations. A strong correlation between electrons injected from the substrate and on-state drain current transients is demonstrated. Moreover, the contribution of the electron-type traps in the buffer layer as opposed to the usually studied hole-like traps to the dynamic Ron is discussed. In particular, the impact of electron-like traps for different levels of substrate leakage current is studied. A TCAD model has been developed and calibrated by taking into account both off-state vertical leakage and on-state drain current transient experimental results. The proposed charge dynamic has also been assessed against state-of-the-art theories. This analysis contributes to a deeper understanding of the complex scenario of different types of traps in the buffer layer of GaN-on-Si devices and highlights the impact that trap-states can have on the on-state and off-state currents

Impact of buffer charge on the reliability of carbon doped AlGaN/GaN-on-Si HEMTs

Charge trapping and transport in the carbon doped GaN buffer of an AlGaN/GaN-on-Si HEMT have been investigated. Back-gating and dynamic RON experiments show how the onset of leakage in the strain relief layer at a lower field than that through the upper part of the structure can result in serious long-term trapping leading to current collapse under standard device operating conditions. Controlling current-collapse requires control of not only the layer structures and its doping, but also the precise balance of leakage in each layer

Design, Fabrication and Characterization of GaN HEMTs for Power Switching Applications

The unique properties of the III-nitride heterostructure, consisting of gallium nitride (GaN), aluminium nitride (AlN) and their ternary compounds (e.g. AlGaN, InAlN), allow for the fabrication of high electron mobility transistors (HEMTs). These devices exhibit high breakdown fields, high electron mobilities and small parasitic capacitances, making them suitable for wireless communication and power electronic applications. In this work, GaN-based power switching HEMTs and low voltage, short-channel HEMTs were designed, fabricated, and characterized.In the first part of the thesis, AlGaN/GaN-on-SiC high voltage metal-insulator-semiconductor (MIS)HEMTs fabricated on a novel ‘buffer-free’ heterostructure are presented. This heterostructure effectively suppresses buffer-related trapping effects while maintaining high electron confinement and low leakage currents, making it a viable material for high voltage, power electronic HEMTs. This part of the thesis covers device processing techniques to minimize leakage currents and maximize breakdown voltages in these ‘buffer-free’ MISHEMTs. Additionally, a recess-etched, Ta-based, ohmic contact process was utilized to form low-resistive ohmic contacts with contact resistances of 0.44-0.47 Ω∙mm. High voltage operation can be achieved by employing a temperature-stable nitrogen implantation isolation process, which results in three-terminal breakdown fields of 98-123 V/μm. By contrast, mesa isolation techniques exhibit breakdown fields below 85 V/μm and higher off-state leakage currents. Stoichiometric low-pressure chemical vapor deposition (LPCVD) SiNx passivation layers suppress gate currents through the AlGaN barrier below 10 nA/mm over 1000 V, which is more than two orders of magnitude lower compared to Si-rich SiNx passivation layers. A 10% dynamic on-resistance increase at 240 V was measured in HEMTs with stoichiometric SiNx passivation, which is likely caused by slow traps with time constants over 100 ms. SiNx gate dielectrics display better electrical isolation at high voltages compared to HfO2 and Ta2O5. However, the two gate oxides exhibit threshold voltages (Vth) above -2 V, making them a promising alternative for the fabrication of recess-etched normally-off MISHEMTs.Reducing the gate length (Lg) to minimize losses and increase the operating frequency in GaN HEMTs also entails more severe short-channel effects (SCEs), limiting gain, output power and the maximum off-state voltage. In the second part of the thesis, SCEs were studied in short-channel GaN HEMTs using a drain-current injection technique (DCIT). The proposed method allows Vth to be obtained for a wide range of drain-source voltages (Vds) in one measurement, which then can be used to calculate the drain-induced barrier lowering (DIBL) as a rate-of-change of Vth with respect to Vds. The method was validated using HEMTs with a Fe-doped GaN buffer layer and a C-doped AlGaN back-barrier with thin channel layers. Supporting technology computer-aided design (TCAD) simulations indicate that the large increase in DIBL is caused by buffer leakage. This method could be utilized to optimize buffer design and gate lengths to minimize on-state losses and buffer leakage currents in power switching HEMTs

Temperature-Dependent Dynamic on Resistance in Gamma-Irradiated AlGaN/GaN Power HEMTs

Dynamic RON is a key parameter in terms of device reliability and the efficiency of power-switching converters. In this study, commercial off-the-shelf GaN-on-Si power high-electron-mobility transistors (HEMTs) were irradiated using different regimes of accumulative gamma rays with a 60Co source of photon energy (1.33 MeV), while a base temperature of 53 °C and 133 °C during the irradiation test was applied. This test campaign had the objective of investigating how the combination of gamma irradiation and temperature affects dynamic on-resistance (RON) behaviour. The results indicated that gate voltage bias stress affected the degradation of dynamic on-resistance when irradiation was applied, and that temperature was an accelerating factor in dynamic on-resistance degradation. Finally, we obtained a partial reduction in dynamic RON when a total ionising dose of around 140 krad(SiO2) was applied and the base temperature during the irradiation test was not high

Technology and reliability of normally-off GaN HEMTs with p-type gate

GaN-based transistors with p-GaN gate are commonly accepted as promising devices for application in power converters, thanks to the positive and stable threshold voltage, the low on-resistance and the high breakdown field. This paper reviews the most recent results on the technology and reliability of these devices by presenting original data. The first part of the paper describes the technological issues related to the development of a p-GaN gate, and the most promising solutions for minimizing the gate leakage current. In the second part of the paper, we describe the most relevant mechanisms that limit the dynamic performance and the reliability of GaN-based normally-off transistors. More specifically, we discuss the following aspects: (i) the trapping effects specific for the p-GaN gate; (ii) the time-dependent breakdown of the p-GaN gate during positive gate stress and the related physics of failure; (iii) the stability of the electrical parameters during operation at high drain voltages. The results presented within this paper provide information on the current status of the performance and reliability of GaN-based E-mode transistors, and on the related technological issues

Technology and reliability of normally-off GaN HEMTs with p-type gate

open4siopenMeneghini, Matteo*; Hilt, Oliver; Wuerfl, Joachim; Meneghesso, GaudenzioMeneghini, Matteo; Hilt, Oliver; Wuerfl, Joachim; Meneghesso, Gaudenzi

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics