A Review of Broadband Low-Cost and High-Gain Low-Terahertz Antennas for Wireless Communications Applications

Low-terahertz (Low-THz, 100 GHz-1.0 THz) technology is expected to provide unprecedented data rates in future generations of wireless system such as the 6th generation (6G) mobile communication system. Increasing the carrier frequencies from millimeter wave to THz is a potential solution to guarantee the transmission rate and channel capacity. Due to the large transmission loss of Low-THz wave in free space, it is particularly urgent to design high-gain antennas to compensate the additional path loss, and to overcome the power limitation of Low-THz source. Recently, with the continuous updating and progress of additive manufacturing (AM) and 3D printing (3DP) technology, antennas with complicated structures can now be easily manufactured with high precision and low cost. In the first part, this paper demonstrates different approaches of recent development on wideband and high gain sub-millimeter-wave and Low-THz antennas as well as their fabrication technologies. In addition, the performances of the state-of-the-art wideband and high-gain antennas are presented. A comparison among these reported antennas is summarized and discussed. In the second part, one case study of a broadband high-gain antenna at 300 GHz is introduced, which is an all-metal model based on the Fabry-Perot cavity (FPC) theory. The proposed FPC antenna is very suitable for manufacturing using AM technology, which provides a low-cost, reliable solution for emerging THz applications

Substrate Integrated Waveguide Devices and Receiver Systems for Millimeter-Wave Applications

RÉSUMÉ La très forte congestion du spectre radiofréquence alloué aux fréquences RF et micro-ondes pour les communications sans fil d’aujourd’hui motive ce travail de recherche qui se consacre aux bandes millimétriques pour lesquelles d’avantages d’allocations spectrales sont disponibles, et qui est particulièrement intéressante pour le transfert à très haut débit. Comparé aux autres technologies de ligne de transmission, le Guide Intégré au Substrat (GIS) montre des avantages très attractifs comme un faible profil, un faible coût, un haut facteur de qualité (facteur Q), de faibles pertes d’insertion... Ce dernier a gagné beaucoup d’attention récemment grâce à ces caractéristiques favorables pour la conception de circuits et systèmes millimétriques. Le sujet de ce doctorat concerne deux tâches de recherche distinctes : la première est dédiée à l’investigation et à la conception de composants et d’antennes GIS innovants pour une possible application en ondes millimétriques; la seconde se consacre à la mise au point et à la démonstration de systèmes de réceptions millimétriques de tailles compactes, faibles pertes, à haut niveau d’intégration et hautes performances. Les chapitres 1 à 4 se concentrent sur l’exploitation et l’investigation, un à un, de composants GIS pour lesquels un nombre de concepts originaux et innovants de structures est proposé et démontré. Dans le chapitre 5, les architectures classiques et les paramètres des systèmes de réception sont introduits, puis utilisés pour la conception de systèmes de réceptions millimétriques dans les chapitres suivants. Du chapitre 6 au chapitre 8, des systèmes submillimétriques et millimétriques basés sur le GIS sont démontrés. Les contributions majeures de cette thèse sont les suivantes : Une structure balancée large bande inhérente peut être obtenue en imprimant un circuit sur deux faces d’un substrat GIS. Ainsi, un balun planaire large bande GIS implémenté sur un circuit imprimé (ou PCB, pour Printed Circuit Board) simple couche est proposé et présenté, suite auquel une nouvelle transition large bande de ligne microruban à ligne parallèle est démontrée. Avec cette transition proposée comme réseau d’alimentation, une nouvelle antenne large bande quasi-Yagi planaire est développée.----------ABSTRACT The heavily congested condition at the existing radio frequency (RF)/microwave spectra allocated for the today’s wireless communications motivates and expedites the research work at millimeter-wave bands where more spectrum space is available for massive data rate delivery. Compared with other transmission line techniques, the substrate integrated waveguide (SIW) platform shows attractive advantages of low profile, low-cost, high Q-factor, and low insertion loss, etc. It has gained a lot of attention recently due to its favorable features in millimeter-wave circuit/system design. The topic of this doctoral dissertation are concerned with two distinct research tasks: (1) investigating and designing innovative SIW components and antennas for possible millimeter-wave applications; (2) developing and demonstrating geometry-compact, low cost, high level of integration and high performance millimeter-wave receiver systems. Chapters 1 to 4 focus on the exploitation and investigation of individual SIW devices, in which a number of original concepts and innovative structures are proposed and demonstrated. In Chapter 5, generic architectures and parameters of receiver systems are discussed and used as a guideline for the millimeter-wave system design in the next chapters. From Chapter 6 to Chapter 8, sub-millimeter/millimeter wave systems based on SIW technique are demonstrated. The major contributions of this thesis work can be highlighted as follows:An inherent broadband balanced structure can be achieved by printing circuits on two opposite sides of an SIW substrate. According to this feature, a broadband SIW planar balun implemented on a single layer printed circuit board (PCB) is proposed and presented, following which another newly proposed broadband microstrip-to-broadside parallel stripline transition is demonstrated. With the proposed transition as the feeding network, a novel broadband printed quasi-Yagi antenna is developed. Half-mode substrate integrated waveguide (HMSIW) and quarter-mode substrate integrated waveguide (QMSIW) techniques are introduced for the purpose of miniaturizing SIW circuits and enhancing the bandwidth

Polymer-Based Micromachining for Scalable and Cost-Effective Fabrication of Gap Waveguide Devices Beyond 100 GHz

The terahertz (THz) frequency bands have gained attention over the past few years due to the growing number of applications in fields like communication, healthcare, imaging, and spectroscopy. Above 100 GHz transmission line losses become dominating, and waveguides are typically used for transmission. As the operating frequency approaches higher frequencies, the dimensions of the waveguide-based components continue to decrease. This makes the traditional machine-based (computer numerical control, CNC) fabrication method increasingly challenging in terms of time, cost, and volume production. Micromachining has the potential of addressing the manufacturing issues of THz waveguide components. However, the current microfabrication techniques either suffer from technological immaturity, are time-consuming, or lack sufficient cost-efficiency. A straightforward, fast, and low-cost fabrication method that can offer batch fabrication of waveguide components operating at THz frequency range is needed to address the requirements.A gap waveguide is a planar waveguide technology which does not suffer from the dielectric loss of planar waveguides, and which does not require any electrical connections between the metal walls. It therefore offers competitive loss performance together with providing several benefits in terms of assembly and integration of active components. This thesis demonstrates the realization of gap waveguide components operating above 100 GHz, in a low-cost and time-efficient way employing the development of new polymer-based fabrication methods.A template-based injection molding process has been designed to realize a high gain antenna operating at D band (110 - 170 GHz). The injection molding of OSTEMER is an uncomplicated and fast device fabrication method. In the proposed method, the time-consuming and complicated parts need to be fabricated only once and can later be reused.A dry film photoresist-based method is also presented for the fabrication of waveguide components operating above 100 GHz. Dry film photoresist offers rapid fabrication of waveguide components without using complex and advanced machinery. For the integration of active circuits and passive waveguides section a straightforward solution has been demonstrated. By utilizing dry film photoresist, a periodic metal pin array has been fabricated and incorporated in a waveguide to microstrip transition that can be an effective and low-cost way of integrating MMIC of arbitrary size to waveguide blocks

Broadcast-oriented wireless network-on-chip : fundamentals and feasibility

Premi extraordinari doctorat UPC curs 2015-2016, àmbit Enginyeria de les TICRecent years have seen the emergence and ubiquitous adoption of Chip Multiprocessors (CMPs), which rely on the coordinated operation of multiple execution units or cores. Successive CMP generations integrate a larger number of cores seeking higher performance with a reasonable cost envelope. For this trend to continue, however, important scalability issues need to be solved at different levels of design. Scaling the interconnect fabric is a grand challenge by itself, as new Network-on-Chip (NoC) proposals need to overcome the performance hurdles found when dealing with the increasingly variable and heterogeneous communication demands of manycore processors. Fast and flexible NoC solutions are needed to prevent communication become a performance bottleneck, situation that would severely limit the design space at the architectural level and eventually lead to the use of software frameworks that are slow, inefficient, or less programmable. The emergence of novel interconnect technologies has opened the door to a plethora of new NoCs promising greater scalability and architectural flexibility. In particular, wireless on-chip communication has garnered considerable attention due to its inherent broadcast capabilities, low latency, and system-level simplicity. Most of the resulting Wireless Network-on-Chip (WNoC) proposals have set the focus on leveraging the latency advantage of this paradigm by creating multiple wireless channels to interconnect far-apart cores. This strategy is effective as the complement of wired NoCs at moderate scales, but is likely to be overshadowed at larger scales by technologies such as nanophotonics unless bandwidth is unrealistically improved. This dissertation presents the concept of Broadcast-Oriented Wireless Network-on-Chip (BoWNoC), a new approach that attempts to foster the inherent simplicity, flexibility, and broadcast capabilities of the wireless technology by integrating one on-chip antenna and transceiver per processor core. This paradigm is part of a broader hybrid vision where the BoWNoC serves latency-critical and broadcast traffic, tightly coupled to a wired plane oriented to large flows of data. By virtue of its scalable broadcast support, BoWNoC may become the key enabler of a wealth of unconventional hardware architectures and algorithmic approaches, eventually leading to a significant improvement of the performance, energy efficiency, scalability and programmability of manycore chips. The present work aims not only to lay the fundamentals of the BoWNoC paradigm, but also to demonstrate its viability from the electronic implementation, network design, and multiprocessor architecture perspectives. An exploration at the physical level of design validates the feasibility of the approach at millimeter-wave bands in the short term, and then suggests the use of graphene-based antennas in the terahertz band in the long term. At the link level, this thesis provides an insightful context analysis that is used, afterwards, to drive the design of a lightweight protocol that reliably serves broadcast traffic with substantial latency improvements over state-of-the-art NoCs. At the network level, our hybrid vision is evaluated putting emphasis on the flexibility provided at the network interface level, showing outstanding speedups for a wide set of traffic patterns. At the architecture level, the potential impact of the BoWNoC paradigm on the design of manycore chips is not only qualitatively discussed in general, but also quantitatively assessed in a particular architecture for fast synchronization. Results demonstrate that the impact of BoWNoC can go beyond simply improving the network performance, thereby representing a possible game changer in the manycore era.Avenços en el disseny de multiprocessadors han portat a una àmplia adopció dels Chip Multiprocessors (CMPs), que basen el seu potencial en la operació coordinada de múltiples nuclis de procés. Generacions successives han anat integrant més nuclis en la recerca d'alt rendiment amb un cost raonable. Per a que aquesta tendència continuï, però, cal resoldre importants problemes d'escalabilitat a diferents capes de disseny. Escalar la xarxa d'interconnexió és un gran repte en ell mateix, ja que les noves propostes de Networks-on-Chip (NoC) han de servir un tràfic eminentment variable i heterogeni dels processadors amb molts nuclis. Són necessàries solucions ràpides i flexibles per evitar que les comunicacions dins del xip es converteixin en el pròxim coll d'ampolla de rendiment, situació que limitaria en gran mesura l'espai de disseny a nivell d'arquitectura i portaria a l'ús d'arquitectures i models de programació lents, ineficients o poc programables. L'aparició de noves tecnologies d'interconnexió ha possibilitat la creació de NoCs més flexibles i escalables. En particular, la comunicació intra-xip sense fils ha despertat un interès considerable en virtut de les seva baixa latència, simplicitat, i bon rendiment amb tràfic broadcast. La majoria de les Wireless NoC (WNoC) proposades fins ara s'han centrat en aprofitar l'avantatge en termes de latència d'aquest nou paradigma creant múltiples canals sense fils per interconnectar nuclis allunyats entre sí. Aquesta estratègia és efectiva per complementar a NoCs clàssiques en escales mitjanes, però és probable que altres tecnologies com la nanofotònica puguin jugar millor aquest paper a escales més grans. Aquesta tesi presenta el concepte de Broadcast-Oriented WNoC (BoWNoC), un nou enfoc que intenta rendibilitzar al màxim la inherent simplicitat, flexibilitat, i capacitats broadcast de la tecnologia sense fils integrant una antena i transmissor/receptor per cada nucli del processador. Aquest paradigma forma part d'una visió més àmplia on un BoWNoC serviria tràfic broadcast i urgent, mentre que una xarxa convencional serviria fluxos de dades més pesats. En virtut de la escalabilitat i del seu suport broadcast, BoWNoC podria convertir-se en un element clau en una gran varietat d'arquitectures i algoritmes poc convencionals que milloressin considerablement el rendiment, l'eficiència, l'escalabilitat i la programabilitat de processadors amb molts nuclis. El present treball té com a objectius no només estudiar els aspectes fonamentals del paradigma BoWNoC, sinó també demostrar la seva viabilitat des dels punts de vista de la implementació, i del disseny de xarxa i arquitectura. Una exploració a la capa física valida la viabilitat de l'enfoc usant tecnologies longituds d'ona milimètriques en un futur proper, i suggereix l'ús d'antenes de grafè a la banda dels terahertz ja a més llarg termini. A capa d'enllaç, la tesi aporta una anàlisi del context de l'aplicació que és, més tard, utilitzada per al disseny d'un protocol d'accés al medi que permet servir tràfic broadcast a baixa latència i de forma fiable. A capa de xarxa, la nostra visió híbrida és avaluada posant èmfasi en la flexibilitat que aporta el fet de prendre les decisions a nivell de la interfície de xarxa, mostrant grans millores de rendiment per una àmplia selecció de patrons de tràfic. A nivell d'arquitectura, l'impacte que el concepte de BoWNoC pot tenir sobre el disseny de processadors amb molts nuclis no només és debatut de forma qualitativa i genèrica, sinó també avaluat quantitativament per una arquitectura concreta enfocada a la sincronització. Els resultats demostren que l'impacte de BoWNoC pot anar més enllà d'una millora en termes de rendiment de xarxa; representant, possiblement, un canvi radical a l'era dels molts nuclisAward-winningPostprint (published version

Broadcast-oriented wireless network-on-chip : fundamentals and feasibility

Premi extraordinari doctorat UPC curs 2015-2016, àmbit Enginyeria de les TICRecent years have seen the emergence and ubiquitous adoption of Chip Multiprocessors (CMPs), which rely on the coordinated operation of multiple execution units or cores. Successive CMP generations integrate a larger number of cores seeking higher performance with a reasonable cost envelope. For this trend to continue, however, important scalability issues need to be solved at different levels of design. Scaling the interconnect fabric is a grand challenge by itself, as new Network-on-Chip (NoC) proposals need to overcome the performance hurdles found when dealing with the increasingly variable and heterogeneous communication demands of manycore processors. Fast and flexible NoC solutions are needed to prevent communication become a performance bottleneck, situation that would severely limit the design space at the architectural level and eventually lead to the use of software frameworks that are slow, inefficient, or less programmable. The emergence of novel interconnect technologies has opened the door to a plethora of new NoCs promising greater scalability and architectural flexibility. In particular, wireless on-chip communication has garnered considerable attention due to its inherent broadcast capabilities, low latency, and system-level simplicity. Most of the resulting Wireless Network-on-Chip (WNoC) proposals have set the focus on leveraging the latency advantage of this paradigm by creating multiple wireless channels to interconnect far-apart cores. This strategy is effective as the complement of wired NoCs at moderate scales, but is likely to be overshadowed at larger scales by technologies such as nanophotonics unless bandwidth is unrealistically improved. This dissertation presents the concept of Broadcast-Oriented Wireless Network-on-Chip (BoWNoC), a new approach that attempts to foster the inherent simplicity, flexibility, and broadcast capabilities of the wireless technology by integrating one on-chip antenna and transceiver per processor core. This paradigm is part of a broader hybrid vision where the BoWNoC serves latency-critical and broadcast traffic, tightly coupled to a wired plane oriented to large flows of data. By virtue of its scalable broadcast support, BoWNoC may become the key enabler of a wealth of unconventional hardware architectures and algorithmic approaches, eventually leading to a significant improvement of the performance, energy efficiency, scalability and programmability of manycore chips. The present work aims not only to lay the fundamentals of the BoWNoC paradigm, but also to demonstrate its viability from the electronic implementation, network design, and multiprocessor architecture perspectives. An exploration at the physical level of design validates the feasibility of the approach at millimeter-wave bands in the short term, and then suggests the use of graphene-based antennas in the terahertz band in the long term. At the link level, this thesis provides an insightful context analysis that is used, afterwards, to drive the design of a lightweight protocol that reliably serves broadcast traffic with substantial latency improvements over state-of-the-art NoCs. At the network level, our hybrid vision is evaluated putting emphasis on the flexibility provided at the network interface level, showing outstanding speedups for a wide set of traffic patterns. At the architecture level, the potential impact of the BoWNoC paradigm on the design of manycore chips is not only qualitatively discussed in general, but also quantitatively assessed in a particular architecture for fast synchronization. Results demonstrate that the impact of BoWNoC can go beyond simply improving the network performance, thereby representing a possible game changer in the manycore era.Avenços en el disseny de multiprocessadors han portat a una àmplia adopció dels Chip Multiprocessors (CMPs), que basen el seu potencial en la operació coordinada de múltiples nuclis de procés. Generacions successives han anat integrant més nuclis en la recerca d'alt rendiment amb un cost raonable. Per a que aquesta tendència continuï, però, cal resoldre importants problemes d'escalabilitat a diferents capes de disseny. Escalar la xarxa d'interconnexió és un gran repte en ell mateix, ja que les noves propostes de Networks-on-Chip (NoC) han de servir un tràfic eminentment variable i heterogeni dels processadors amb molts nuclis. Són necessàries solucions ràpides i flexibles per evitar que les comunicacions dins del xip es converteixin en el pròxim coll d'ampolla de rendiment, situació que limitaria en gran mesura l'espai de disseny a nivell d'arquitectura i portaria a l'ús d'arquitectures i models de programació lents, ineficients o poc programables. L'aparició de noves tecnologies d'interconnexió ha possibilitat la creació de NoCs més flexibles i escalables. En particular, la comunicació intra-xip sense fils ha despertat un interès considerable en virtut de les seva baixa latència, simplicitat, i bon rendiment amb tràfic broadcast. La majoria de les Wireless NoC (WNoC) proposades fins ara s'han centrat en aprofitar l'avantatge en termes de latència d'aquest nou paradigma creant múltiples canals sense fils per interconnectar nuclis allunyats entre sí. Aquesta estratègia és efectiva per complementar a NoCs clàssiques en escales mitjanes, però és probable que altres tecnologies com la nanofotònica puguin jugar millor aquest paper a escales més grans. Aquesta tesi presenta el concepte de Broadcast-Oriented WNoC (BoWNoC), un nou enfoc que intenta rendibilitzar al màxim la inherent simplicitat, flexibilitat, i capacitats broadcast de la tecnologia sense fils integrant una antena i transmissor/receptor per cada nucli del processador. Aquest paradigma forma part d'una visió més àmplia on un BoWNoC serviria tràfic broadcast i urgent, mentre que una xarxa convencional serviria fluxos de dades més pesats. En virtut de la escalabilitat i del seu suport broadcast, BoWNoC podria convertir-se en un element clau en una gran varietat d'arquitectures i algoritmes poc convencionals que milloressin considerablement el rendiment, l'eficiència, l'escalabilitat i la programabilitat de processadors amb molts nuclis. El present treball té com a objectius no només estudiar els aspectes fonamentals del paradigma BoWNoC, sinó també demostrar la seva viabilitat des dels punts de vista de la implementació, i del disseny de xarxa i arquitectura. Una exploració a la capa física valida la viabilitat de l'enfoc usant tecnologies longituds d'ona milimètriques en un futur proper, i suggereix l'ús d'antenes de grafè a la banda dels terahertz ja a més llarg termini. A capa d'enllaç, la tesi aporta una anàlisi del context de l'aplicació que és, més tard, utilitzada per al disseny d'un protocol d'accés al medi que permet servir tràfic broadcast a baixa latència i de forma fiable. A capa de xarxa, la nostra visió híbrida és avaluada posant èmfasi en la flexibilitat que aporta el fet de prendre les decisions a nivell de la interfície de xarxa, mostrant grans millores de rendiment per una àmplia selecció de patrons de tràfic. A nivell d'arquitectura, l'impacte que el concepte de BoWNoC pot tenir sobre el disseny de processadors amb molts nuclis no només és debatut de forma qualitativa i genèrica, sinó també avaluat quantitativament per una arquitectura concreta enfocada a la sincronització. Els resultats demostren que l'impacte de BoWNoC pot anar més enllà d'una millora en termes de rendiment de xarxa; representant, possiblement, un canvi radical a l'era dels molts nuclisAward-winningPostprint (published version

High-Speed, Low-Power and Mid-IR Silicon Photonics Applications

In this book, the first high-speed silicon-organic hybrid (SOH) modulator is demonstrated by exploiting a highly-nonlinear polymer cladding and a silicon waveguide. By using a liquid crystal cladding instead, an ultra-low power phase shifter is obtained. A third type of device is proposed for achieving three-wave mixing on the silicon-organic hybrid (SOH) platform. Finally, new physical constants which describe the optical absorption in charge accumulation/inversion layers in silicon are determined

Ultra Wideband

Ultra wideband (UWB) has advanced and merged as a technology, and many more people are aware of the potential for this exciting technology. The current UWB field is changing rapidly with new techniques and ideas where several issues are involved in developing the systems. Among UWB system design, the UWB RF transceiver and UWB antenna are the key components. Recently, a considerable amount of researches has been devoted to the development of the UWB RF transceiver and antenna for its enabling high data transmission rates and low power consumption. Our book attempts to present current and emerging trends in-research and development of UWB systems as well as future expectations

Advanced Trends in Wireless Communications

Physical limitations on wireless communication channels impose huge challenges to reliable communication. Bandwidth limitations, propagation loss, noise and interference make the wireless channel a narrow pipe that does not readily accommodate rapid flow of data. Thus, researches aim to design systems that are suitable to operate in such channels, in order to have high performance quality of service. Also, the mobility of the communication systems requires further investigations to reduce the complexity and the power consumption of the receiver. This book aims to provide highlights of the current research in the field of wireless communications. The subjects discussed are very valuable to communication researchers rather than researchers in the wireless related areas. The book chapters cover a wide range of wireless communication topics