A review of information flow diagrammatic models for product-service systems

A product-service system (PSS) is a combination of products and services to create value for both customers and manufacturers. Modelling a PSS based on function orientation offers a useful way to distinguish system inputs and outputs with regards to how data are consumed and information is used, i.e. information flow. This article presents a review of diagrammatic information flow tools, which are designed to describe a system through its functions. The origin, concept and applications of these tools are investigated, followed by an analysis of information flow modelling with regards to key PSS properties. A case study of selection laser melting technology implemented as PSS will then be used to show the application of information flow modelling for PSS design. A discussion based on the usefulness of the tools in modelling the key elements of PSS and possible future research directions are also presented

Automated Synthesis: a Distributed Viewpoint

Distributed algorithms are inherently hard to get right, and a major challenge is to come up with automated techniques for error detection and recovery. The talk will survey recent results on the synthesis of distributed monitors and controllers

Desynchronization: Synthesis of asynchronous circuits from synchronous specifications

Asynchronous implementation techniques, which measure logic delays at run time and activate registers accordingly, are inherently more robust than their synchronous counterparts, which estimate worst-case delays at design time, and constrain the clock cycle accordingly. De-synchronization is a new paradigm to automate the design of asynchronous circuits from synchronous specifications, thus permitting widespread adoption of asynchronicity, without requiring special design skills or tools. In this paper, we first of all study different protocols for de-synchronization and formally prove their correctness, using techniques originally developed for distributed deployment of synchronous language specifications. We also provide a taxonomy of existing protocols for asynchronous latch controllers, covering in particular the four-phase handshake protocols devised in the literature for micro-pipelines. We then propose a new controller which exhibits provably maximal concurrency, and analyze the performance of desynchronized circuits with respect to the original synchronous optimized implementation. We finally prove the feasibility and effectiveness of our approach, by showing its application to a set of real designs, including a complete implementation of the DLX microprocessor architectur

An expert system model using predicate transition nets

Cover title.Includes bibliographical references.Support provided through the Office of Naval Research. N00014-85-K-0782Didier M. Perdu, Alexander H. Levis

High-level Synthesis of GALS Systems

Abstract—The aim of this research is to automate the synthesis process of synchronous elastic (SE) systems whilst exploiting the advantages of data-flow concurrency of asynchronous design. This approach automates the integration of synchrony and asynchrony. Therefore, it makes it possible to investigate high level synthesis of Globally Asynchronous Locally Synchronous (GALS) systems without the need to build trivial links and ports and the ad-hoc insertion of synchronisers etc. Our proposed method enables the designer to use a unified language to develop flexible multi-clocked SoCs. I

Translation Of AADL To PNML To Ensure The Utilization Of Petri Nets

Architecture Analysis and Design Language (AADL), which is used to design and analyze software and hardware architectures of embedded and real-time systems, has proven to be a very efficient way of expressing the non-functional properties of safety-critical systems and architectural modeling. Petri nets are the graphical and mathematical modeling tools used to describe and study information processing systems characterized as concurrent and distributed. As AADL lacks the formal semantics needed to show the functional properties of such systems, the objective of this research was to extend AADL to enable other Petri nets to be incorporated into Petri Net Markup Language (PNML), an interchange language for Petri nets. PNML makes it possible to incorporate different types of analysis using different types of Petri net. To this end, the interchange format Extensible Markup Language (XML) was selected and AADL converted to AADL-XML (the XML format of AADL) and Petri nets to PNML, the XML-format of Petri nets, via XSLT script. PNML was chosen as the transfer format for Petri nets due to its universality, which enables designers to easily map PNML to many different types of Petri nets. Manual conversion of AADL to PNML is error-prone and tedious and thus requires automation, so XSLT script was utilized for the conversion of the two languages in their XML format. Mapping rules were defined for the conversion from AADL to PNML and the translation to XSLT automated. Finally, a PNML plug-in was designed and incorporated into the Open Source AADL Tool Environment (OSATE)

Classifying Invariant Structures of Step Traces

In the study of behaviours of concurrent systems, traces are sets of behaviourally equivalent action sequences. Traces can be represented by causal partial orders. Step traces, on the other hand, are sets of behaviourally equivalent step sequences, each step being a set of simultaneous actions. Step traces can be represented by relational structures comprising non-simultaneity and weak causality. In this paper, we propose a classification of step alphabets as well as the corresponding step traces and relational structures representing them. We also explain how the original trace model fits into the overall framework.Algorithms and the Foundations of Software technolog