Permutation and sampling with maximum length CA for pseudorandom number generation

In this paper, we study the effect of dynamic permutation and sampling on the randomness quality of sequences generated by cellular automata (CA). Dynamic permutation and sampling have not been explored in previous CA work and a suitable implementation is shown using a two CA model. Three different schemes that incorporate these two operations are suggested - Weighted Permutation Vector Sampling with Controlled Multiplexing, Weighted Permutation Vector Sampling with Irregular Decimation and Permutation Programmed CA Sampling. The experiment results show that the resulting sequences have varying degrees of improvement in DIEHARD results and linear complexity compared to the CA

Layered cellular automata for pseudorandom number generation

The proposed Layered Cellular Automata (L-LCA), which comprises of a main CA with L additional layers of memory registers, has simple local interconnections and high operating speed. The time-varying L-LCA transformation at each clock can be reduced to a single transformation in the set formed by the transformation matrix of a maximum length Cellular Automata (CA), and the entire transformation sequence for a single period can be obtained. The analysis for the period characteristics of state sequences is simplified by analyzing representative transformation sequences determined by the phase difference between the initial states for each layer. The L-LCA model can be extended by adding more layers of memory or through the use of a larger main CA based on widely available maximum length CA. Several L-LCA (L=1,2,3,4) with 10- to 48-bit main CA are subjected to the DIEHARD test suite and better results are obtained over other CA designs reported in the literature. The experiments are repeated using the well-known nonlinear functions and in place of the linear function used in the L-LCA. Linear complexity is significantly increased when or is used

Encoders for block-circulant LDPC codes

Methods and apparatus to encode message input symbols in accordance with an accumulate-repeat-accumulate code with repetition three or four are disclosed. Block circulant matrices are used. A first method and apparatus make use of the block-circulant structure of the parity check matrix. A second method and apparatus use block-circulant generator matrices

Efficient Implementation of Elliptic Curve Cryptography on FPGAs

This work presents the design strategies of an FPGA-based elliptic curve co-processor. Elliptic curve cryptography is an important topic in cryptography due to its relatively short key length and higher efficiency as compared to other well-known public key crypto-systems like RSA. The most important contributions of this work are: - Analyzing how different representations of finite fields and points on elliptic curves effect the performance of an elliptic curve co-processor and implementing a high performance co-processor. - Proposing a novel dynamic programming approach to find the optimum combination of different recursive polynomial multiplication methods. Here optimum means the method which has the smallest number of bit operations. - Designing a new normal-basis multiplier which is based on polynomial multipliers. The most important part of this multiplier is a circuit of size $O(n \log n)$ for changing the representation between polynomial and normal basis

A review of enhanced image techniques using chaos encryption

Secured multimedia data has grown in importance over the last few decades to safeguard multimedia content from unwanted users. Generally speaking, a number of methods have been employed to hide important visual data from eavesdroppers, one of which is chaotic encryption. This review article will examine chaotic encryption methods currently in use, highlighting their benefits and drawbacks in terms of their applicability for picture security

A new block cipher for image encryption based on multi chaotic systems

In this paper, a new algorithm for image encryption is proposed based on three chaotic systems which are Chen system,logistic map and two-dimensional (2D) Arnold cat map. First, a permutation scheme is applied to the image, and then shuffled image is partitioned into blocks of pixels. For each block, Chen system is employed for confusion and then logistic map is employed for generating subsititution-box (S-box) to substitute image blocks. The S-box is dynamic, where it is shuffled for each image block using permutation operation. Then, 2D Arnold cat map is used for providing diffusion, after that XORing the result using Chen system to obtain the encrypted image.The high security of proposed algorithm is experimented using histograms, unified average changing intensity (UACI), number of pixels change rate (NPCR), entropy, correlation and keyspace analyses.

Lightweight Architectures for Reliable and Fault Detection Simon and Speck Cryptographic Algorithms on FPGA

The widespread use of sensitive and constrained applications necessitates lightweight (lowpower and low-area) algorithms developed for constrained nano-devices. However, nearly all of such algorithms are optimized for platform-based performance and may not be useful for diverse and flexible applications. The National Security Agency (NSA) has proposed two relatively-recent families of lightweight ciphers, i.e., Simon and Speck, designed as efficient ciphers on both hardware and software platforms. This paper proposes concurrent error detection schemes to provide reliable architectures for these two families of lightweight block ciphers. The research work on analyzing the reliability of these algorithms and providing fault diagnosis approaches has not been undertaken to date to the best of our knowledge. The main aim of the proposed reliable architectures is to provide high error coverage while maintaining acceptable area and power consumption overheads. To achieve this, we propose a variant of recomputing with encoded operands. These low-complexity schemes are suited for lowresource applications such as sensitive, constrained implantable and wearable medical devices. We perform fault simulations for the proposed architectures by developing a fault model framework. The architectures are simulated and analyzed on recent field-programmable grate array (FPGA) platforms, and it is shown that the proposed schemes provide high error coverage. The proposed low-complexity concurrent error detection schemes are a step forward towards more reliable architectures for Simon and Speck algorithms in lightweight, secure applications