461 research outputs found

    A Pixel Vertex Tracker for the TESLA Detector

    Get PDF
    In order to fully exploit the physics potential of a e+e- linear collider, such as TESLA, a Vertex Tracker providing high resolution track reconstruction is required. Hybrid Silicon pixel sensors are an attractive sensor technology option due to their read-out speed and radiation hardness, favoured in the high rate TESLA environment, but have been so far limited by the achievable single point space resolution. A novel layout of pixel detectors with interleaved cells to improve their spatial resolution is introduced and the results of the characterisation of a first set of test structures are discussed. In this note, a conceptual design of the TESLA Vertex Tracker, based on hybrid pixel sensors is presentedComment: 20 pages, 11 figure

    Implementation and Characterisation of Monolithic CMOS Pixel Sensors for the CLIC Vertex and Tracking Detectors

    Get PDF
    Different CMOS technologies are being considered for the vertex and tracking layers of the detector at the proposed high-energy e+^{+}e^{−} Compact Linear Collider (CLIC). CMOS processes have been proven to be suitable for building high granularity, large area detector systems with low material budget and low power consumption. An effort is put on implementing detectors capable of performing precise timing measurements. Two Application-Specific Integrated Circuits (ASICs) for particle detection have been developed in the framework of this thesis, following the specifications of the CLIC vertex and tracking detectors. The process choice was based on a study of the features of each of the different available technologies and an evaluation of their suitability for each application. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is a pixelated detector chip designed to be used in capacitively coupled assemblies with the CLICpix2 readout chip, in the framework of the vertex detector at CLIC. The chip comprises a matrix of 128×128 square pixels with 25 µm pitch. A commercial 180 nm High-Voltage (HV) CMOS process was used for the C3PD design. The charge is collected with a large deep N-well, while each pixel includes a preamplifier placed on top of the collecting electrode. The C3PD chip was produced on wafers with different values for the substrate resistivity (∼ 20, 80, 200 and 1000 Ωcm) and has been extensively tested through laboratory measurements and beam tests. The design details and characterisation results of the C3PD chip will be presented. The CLIC Tracker Detector (CLICTD) is a novel monolithic detector chip developed in the context of the silicon tracker at CLIC. The CLICTD chip combines high density, mixed mode circuits on the same substrate, while it performs a fast time-tagging measurement with 10 ns time bins. The chip is produced in a 180 nm CMOS imaging process with a High-Resistivity (HR) epitaxial layer. A matrix of 16×128 detecting cells, each measuring 300 × 30 µm2^{2} , is included. A small N-well is used to collect the charge generated in the sensor volume, while an additional deep N-type implant is used to fully deplete the epitaxial layer. Using a process split, additional wafers are produced with a segmented deep N-type implant, a modification that has been simulated to result in a faster charge collection time. Each detecting cell is segmented into eight front-ends to ensure prompt charge collection in the sensor diodes. A simultaneous 8-bit timing and 5-bit energy measurement is performed in each detecting cell. A detailed description of the CLICTD design will be given, followed by the first measurement results

    Detector Technologies for CLIC

    Full text link
    The Compact Linear Collider (CLIC) is a high-energy high-luminosity linear electron-positron collider under development. It is foreseen to be built and operated in three stages, at centre-of-mass energies of 380 GeV, 1.5 TeV and 3 TeV, respectively. It offers a rich physics program including direct searches as well as the probing of new physics through a broad set of precision measurements of Standard Model processes, particularly in the Higgs-boson and top-quark sectors. The precision required for such measurements and the specific conditions imposed by the beam dimensions and time structure put strict requirements on the detector design and technology. This includes low-mass vertexing and tracking systems with small cells, highly granular imaging calorimeters, as well as a precise hit-time resolution and power-pulsed operation for all subsystems. A conceptual design for the CLIC detector system was published in 2012. Since then, ambitious R&D programmes for silicon vertex and tracking detectors, as well as for calorimeters have been pursued within the CLICdp, CALICE and FCAL collaborations, addressing the challenging detector requirements with innovative technologies. This report introduces the experimental environment and detector requirements at CLIC and reviews the current status and future plans for detector technology R&D.Comment: 152 pages, 116 figures; published as CERN Yellow Report Monograph Vol. 1/2019; corresponding editors: Dominik Dannheim, Katja Kr\"uger, Aharon Levy, Andreas N\"urnberg, Eva Sickin

    A low power, large dynamic range, CMOS amplifier and analog memory for capacitive sensors

    Get PDF
    This paper has been written to announce the design of a CMOS charge to voltage amplifier and it¹s integration within an analog memory. Together they provide the necessary front end electronics for the CMS electromagnetic calorimeter (ECAL) preshower detector systeAspell,Pm in the LHC experiment foreseen at the CERN particle physics laboratory. The design and measurements of the amplifier realised in a 1.5mm bulk CMOS process as a 16 channel prototype chip are presented. Results show the mean gain and peaking time of = 1.74mV/mip, = 18ns with channel to channel variations; s(peak_voltage) = 8% and s(peak_time) = 6.5%. The dynamic range is shown to be linear over 400mips with an integral non linearity (INL)=0.05mV as expressed in terms of sigma from the mean gain over the 400mip range. The measured noise of the amplifier was ENC=1800+41e/pF with a power consumption of 2.4mW/channel. The amplifier can support extreme levels of leakage current. The gain remains constant for up to 200mA of leakage current. The integration of this amplifier within a 32 channel, 128 cell analog memory chip ³DYNLDR² is then demonstrated. The DYNLDR offers sampling at 40MHz with a storage time of up to 3.2ms. It provides continuous Write/Read access with no dead time. Triggered data is protected within the memory until requested for readout which is performed at 2.5MHz. The memory is designed to have a steerable dc level enabling maximum dynamic range performance. Measurements of the DYNLDR are presented confirming the original amplifier performance. The memory itself has a very low pedestal non uniformity (s(ped)) of 0.9mV and a gain of 10mV/mip

    Design and standalone characterisation of a capacitively coupled HV-CMOS sensor chip for the CLIC vertex detector

    Get PDF
    The concept of capacitive coupling between sensors and readout chips is under study for the vertex detector at the proposed high-energy CLIC electron positron collider. The CLICpix Capacitively Coupled Pixel Detector (C3PD) is an active High-Voltage CMOS sensor, designed to be capacitively coupled to the CLICpix2 readout chip. The chip is implemented in a commercial 180180 nm HV-CMOS process and contains a matrix of 128×128128\times128 square pixels with 2525 μ\mum pitch. First prototypes have been produced with a standard resistivity of 20\sim20 Ω\Omegacm for the substrate and tested in standalone mode. The results show a rise time of 20\sim20 ns, charge gain of 190190 mV/ke^{-} and 40\sim40 e^{-} RMS noise for a power consumption of 4.84.8 μ\muW/pixel. The main design aspects, as well as standalone measurement results, are presented.Comment: 13 pages, 13 figures, 2 tables. Work carried out in the framework of the CLICdp collaboratio

    Design of custom ASIC for front-end electronics in a 130 nm CMOS process

    Get PDF
    Researchers at Birkeland center of space science at the University of Bergen is developing an instrument to be attached to a satellite, to measure energetic particles in the atmosphere and particle precipitation. This instrument will consist of a radiation sensor developed by SINTEF and custom electronics developed at the University of Bergen. This thesis covers the development and simulations of aforementioned elec- tronics. The process of designing and developing a charge sensitive amplifier, a shaping amplifier and bias current supply circuit. A functional amplifier was designed and implemented and its functionality is proven with simulation results. Some work remains to make the amplifier, fully functional according to the requirements of the instrumentMasteroppgave i fysikkMAMN-PHYSPHYS39

    Development of ASIC for SiPM sensor readout

    Get PDF
    L'abstract è presente nell'allegato / the abstract is in the attachmen

    Silicon Pixel R&D for the CLIC Tracking Detector

    Full text link
    The physics aims at the proposed high-energy e+ee^+e^- collider CLIC pose challenging demands on the performance of the detector system. Precise hit-time tagging, an excellent spatial resolutions, and a low mass are required for the vertex and tracking detectors. To meet these requirements, an all-silicon vertex and tracking detector system is foreseen, for which a broad R&D programme on a variety of novel silicon detector technologies is being pursued. For the ultra-low mass vertex detector, different hybrid technologies with innovative sensor concepts and interconnection techniques are explored. For the large-scale tracking detector, the focus of the R&D lies on monolithic HV-MAPS and HR-CMOS technologies. This contribution gives an overview of the ongoing activities with a focus on monolithic technologies for the CLIC tracking detector. Recent results from laboratory and test-beam measurement campaigns of the ATLASpix_Simple and the CLICTD sensor prototypes are presented.Comment: Proceedings for INSTR20, 10 pages, 9 figure

    Technical Design Report for the PANDA Micro Vertex Detector

    Get PDF
    This document illustrates the technical layout and the expected performance of the Micro Vertex Detector (MVD) of the PANDA experiment. The MVD will detect charged particles as close as possible to the interaction zone. Design criteria and the optimisation process as well as the technical solutions chosen are discussed and the results of this process are subjected to extensive Monte Carlo physics studies. The route towards realisation of the detector is outlined
    corecore