923 research outputs found

    Low-Dimensional Materials for Disruptive Microwave Antennas Design

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    This chapter is devoted to a complete analysis of remarkable electromagnetic properties of nanomaterials suitable for antenna design miniaturization. After a review of state of the art mesoscopic scale modeling tools and characterization techniques in microwave domain, new approaches based on wideband material parameters identification (complex permittivity and conductivity) will be described from impedance equivalence formulation achievement by de-embedding techniques applicable in integrated technology or in free space. A focus on performances of 1D materials such as vertically aligned multi-wall carbon nanotube (VA-MWCNT) bundles, from theory to technology, will be presented as a disruptive demonstration for defense and civil applications as in radar systems

    Memory effects in electrochemically gated metallic point contacts

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    Wafer bonding technologies for nano-, micro- and macro-system realization and integration

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    This paper is providing an overview about most common wafer bonding technologies used for the realization of nano-, micro,- and macro systems and for system integration. At first, the general aspects of wafer bonding applications are discussed. This is followed by the technological description of different wafer bonding processes, since for different bonding applications different processes are required related to process integration and the actual surface layers on the wafers which should be bonded. Finally, benefits and drawbacks as well as technology and application aspects are shown in an overview table, providing systematization and detailed comparison of the described bonding processes. This overview should help to choose the best suitable process for wafer level bonding and other applications

    Microwave Photonic Applications - From Chip Level to System Level

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    Die Vermischung von Mikrowellen- und optischen Technologien – Mikrowellenphotonik – ist ein neu aufkommendes Feld mit hohem Potential. Durch die Nutzung der Vorzüge beider Welten hat die Mikrowellenphotonik viele Anwendungsfälle und ist gerade erst am Beginn ihrer Erfolgsgeschichte. Der Weg für neue Konzepte, neue Komponenten und neue Anwendungen wird dadurch geebnet, dass ein höherer Grad an Integration sowie neue Technologien wie Silicon Photonics verfügbar sind. In diesem Werk werden zuerst die notwendigen grundlegenden Basiskomponenten – optische Quelle, elektro-optische Wandlung, Übertragungsmedium und opto-elektrische Wandlung – eingeführt. Mithilfe spezifischer Anwendungsbeispiele, die von Chipebene bis hin zur Systemebene reichen, wird der elektrooptische Codesign-Prozess veranschaulicht. Schließlich werden zukünftige Ausrichtungen wie die Unterstützung von elektrischen Trägern im Millimeterwellen- und THz-Bereich sowie Realisierungsoptionen in integrierter Optik und Nanophotonik diskutiert.The hybridization between microwave and optical technologies – microwave photonics – is an emerging field with high potential. Benefitting from the best of both worlds, microwave photonics has many use cases and is just at the beginning of its success story. The availability of a higher degree of integration and new technologies such as silicon photonics paves the way for new concepts, new components and new applications. In this work, first, the necessary basic building blocks – optical source, electro-optical conversion, transmission medium and opto-electrical conversion – are introduced. With the help of specific application examples ranging from chip level to system level, the electro-optical co-design process for microwave photonic systems is illustrated. Finally, future directions such as the support of electrical carriers in the millimeter wave and THz range and realization options in integrated optics and nanophotonics are discussed

    Thermo-Mechanical Effects Of Thermal Cycled Copper Through Silicon Vias

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    The semiconductor industry is currently facing transistor scaling issues due to fabrication thresholds and quantum effects. In this \u27More-Than-Moore\u27 era, the industry is developing new ways to increase device performance, such as stacking chips for three-dimensional integrated circuits (3D-IC). The 3D-IC\u27s superior performance over their 2D counterparts can be attributed to the use of vertical interconnects, or through silicon vias (TSV). These interconnects are much shorter, reducing signal delay. However TSVs are susceptible to various thermo-mechanical reliability concerns. Heating during fabrication and use, in conjunction with coefficient of thermal expansion mismatch between the copper TSVs and silicon substrate, create harmful stresses in the system. The purpose of this work is to evaluate the signal integrity of Cu-TSVs and determine the major contributing factors of the signal degradation upon in-use conditions. Two series of samples containing blind Cu-TSVs embedded in a Si substrate were studied, each having different types and amounts of voids from manufacturing. The samples were thermally cycled up to 2000 times using three maximum temperatures to simulate three unique in-use conditions. S11 parameter measurements were then conducted to determine the signal integrity of the TSVs. To investigate the internal response from cycling, a protocol was developed for cross-sectioning the copper TSVs. Voids were measured using scanning electron microscope and focused ion beam imaging of the cross-sections, while the microstructural evolution of the copper was monitored with electron backscattering diffraction. An increase in void area was found to occur after cycling. This is thought to be the major contributing factor in the signal degradation of the TSVs, since no microstructural changes were observed in the copper

    Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition

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    A neuromorphic chip that combines CMOS analog spiking neurons and memristive synapses offers a promising solution to brain-inspired computing, as it can provide massive neural network parallelism and density. Previous hybrid analog CMOS-memristor approaches required extensive CMOS circuitry for training, and thus eliminated most of the density advantages gained by the adoption of memristor synapses. Further, they used different waveforms for pre and post-synaptic spikes that added undesirable circuit overhead. Here we describe a hardware architecture that can feature a large number of memristor synapses to learn real-world patterns. We present a versatile CMOS neuron that combines integrate-and-fire behavior, drives passive memristors and implements competitive learning in a compact circuit module, and enables in-situ plasticity in the memristor synapses. We demonstrate handwritten-digits recognition using the proposed architecture using transistor-level circuit simulations. As the described neuromorphic architecture is homogeneous, it realizes a fundamental building block for large-scale energy-efficient brain-inspired silicon chips that could lead to next-generation cognitive computing.Comment: This is a preprint of an article accepted for publication in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol 5, no. 2, June 201
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