79 research outputs found

    Enhancing the Physical Layer in V2V Communication Using OFDM - MIMO Techniques

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    Vehicular Ad hoc network (VANET) has recently been attracting the attention of researchers as a new technology in the wireless communication system. Vehicle-to-vehicle V2V communication can be considered an important way to help the drivers to satisfy requirements such as less congestion, accident warning, road exploration, etc. The propagation issues such as multipath fading significantly affect the reliability of V2V communication. The goal of this work is to enhance the performance of the physical layer PHY in V2V communication. However, the cellular phone channel has been used to evaluate the possibility of apply it in the vehicular communication V2V. The simulation results observed that the transmitted signal is affected by a multipath fading channel. In order to overcome this problem two techniques are used: Orthogonal Frequency Division Multiplexing (OFDM) technique and Multiple-Input-MultipleOutput (MIMO) diversity technique. The simulation results showed that the OFDM technique overcomes the multipath fading with high transmission power. On the other hand, MIMO diversity technique called Alamouti Space-Time Code for two transmitters and two receivers (MIMO 2x2) is used to improve the error degradation with less transmission power

    Vehicle to vehicle (V2V) wireless communications

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    This work focuses on the vehicle-to-vehicle (V2V) communication, its current challenges, future perspective and possible improvement.V2V communication is characterized by the dynamic environment, high mobility, nonpredective scenario, propagation effects, and also communicating antenna's positions. This peculiarity of V2V wireless communication makes channel modelling and the vehicular propagation quite challenging. In this work, firstly we studied the present context of V2V communication also known as Vehicular Ad-hoc Netwok (VANET) including ongoing researches and studies particularly related to Dedicated Short Range Communication (DSRC), specifically designed for automotive uses with corresponding set of protocols and standards. Secondly, we focused on communication models and improvement of these models to make them more suitable, reliable and efficient for the V2V environment. As specifies the standard, OFDM is used in V2V communication, Adaptable OFDM transceiver was designed. Some parameters as performance analytics are used to compare the improvement with the actual situation. For the enhancement of physical layer of V2V communication, this work is focused in the study of MIMO channel instead of SISO. In the designed transceiver both SISO and MIMO were implemented and studied successfully

    Self-timed field programmmable gate array architectures

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    A 122 fps, 1 MHz bandwidth multi-frequency wearable EIT belt featuring novel active electrode architecture for neonatal thorax vital sign monitoring

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    A highly integrated, wearable electrical impedance tomography (EIT) belt for neonatal thorax vital multiple sign monitoring is presented. The belt has sixteen active electrodes. Each has an application specific integrated circuit (ASIC) connected to an electrode. The ASIC contains a fully differential current driver, a high-performance instrumentation amplifier (IA), a digital controller and multiplexors. The wearable EIT belt features a new active electrode architecture that allows programmable flexible electrode current drive and voltage sense patterns under simple digital control. It provides intimate connections to the electrodes for the current drive and to the IA for direct differential voltage measurement providing superior common-mode rejection ratio. The ASIC was designed in a CMOS 0.35-μm high-voltage technology. The high specification EIT belt has an image frame rate of 122 fps, a wide operating bandwidth of 1 MHz and multi-frequency operation. It measures impedance with 98% accuracy and has less than 0.5 Ω and 1o variation across all possible channels. The image results confirmed the advantage of the new active electrode architecture and the benefit of wideband, multi-frequency EIT operation. The wearable EIT belt can also detect patient position and torso shape information using a MEMS sensor interfaced to each ASIC. The system successfully captured high quality lung respiration EIT images, breathing cycle and heart rate

    On-board B-ISDN fast packet switching architectures. Phase 1: Study

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    The broadband integrate services digital network (B-ISDN) is an emerging telecommunications technology that will meet most of the telecommunications networking needs in the mid-1990's to early next century. The satellite-based system is well positioned for providing B-ISDN service with its inherent capabilities of point-to-multipoint and broadcast transmission, virtually unlimited connectivity between any two points within a beam coverage, short deployment time of communications facility, flexible and dynamic reallocation of space segment capacity, and distance insensitive cost. On-board processing satellites, particularly in a multiple spot beam environment, will provide enhanced connectivity, better performance, optimized access and transmission link design, and lower user service cost. The following are described: the user and network aspects of broadband services; the current development status in broadband services; various satellite network architectures including system design issues; and various fast packet switch architectures and their detail designs

    Network resource allocation for bursty ATM traffic sources

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    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990.Title as it appears in the M.I.T. Graduate List, June 1990: Resource allocation for bursty traffic sources in Asynchronous Transfer Mode networks.Includes bibliographical references (leaves 88-90).by Anuradha Vedantham.M.S

    Reconfigurable microarchitectures at the programmable logic interface

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    Integration of FAPEC as data compressor stage in a SpaceFibre link

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    SpaceFibre is a new technology for use onboard spacecraft that provides point-to-point and networked interconnections at 3.125 Gbits/s in flight qualified technology. SpaceFibre is an European Space Agency (ESA) initiative and will substitute the ubiquitous SpaceWire for high speed applications in space. FAPEC is a lossless data compression algorithm that typically offers better ratios than the CCSDS 121.0 Lossless Data Compression Recommendation on realistic data sets. FAPEC was designed for space communications, where requirements are very strong in terms of energy consumption and efficiency. In this project we have demonstrated that FAPEC can be easily integrated on top of SpaceFibre to reduce the amount of information that the spacecraft network has to deal with. The integration of FAPEC with SpaceFibre has successfully been validated in a representative FPGA platform. In the developed design FAPEC operated at ~12 Msamples/s (~200 Mbit/s) using a Xilinx Spartan-6 but it is expected to reach Gbit/s speeds with some additional work. The speed of the algorithm has been improved by a factor 6 while the resource usage remains low, around 2% of a Xilinx Virtex-5QV or a Microsemi RTG4. The combination of these two technologies can help to reduce the large amounts of data generated by some satellite instruments in a transparent way, without the need of user intervention, and to provide a solution to the increasing data volumes in spacecrafts. Consequently the combination of FAPEC with SpaceFibre can help to save mass, power consumption and reduce system complexity.SpaceFibre es una nueva tecnología para uso embarcado en satélites que proporciona conexiones punto a punto y de red a 3.125 Gbit/s en tecnología calificada para espacio. SpaceFibre es una iniciativa de la Agencia Espacial Europea (ESA) y sustituirá al popular SpaceWire en aplicaciones espaciales de alta velocidad. FAPEC es un algoritmo de compresión sin pérdidas que normalmente ofrece relaciones de compresión para conjuntos de datos realistas mejores que las de la recomendación CCSDS 121.0. FAPEC ha sido diseñado para las comunicaciones espaciales, donde las restricciones de consumo de energía y eficiencia son muy fuertes. En este proyecto hemos demostrado que FAPEC puede ser integrado fácilmente con SpaceFibre para reducir la cantidad de información que la red del satélite tiene que procesar. La integración de FAPEC con SpaceFibre ha sido validada con éxito en una plataforma FPGA representativa. En el diseño desarrollado, FAPEC funciona a ~12 Mmuestras/s (~200 Mbit/s) usando una Xilinx Spartan-6 pero se espera que alcance velocidades de Gbit/s con un poco más de trabajo. La velocidad del algoritmo se ha mejorado un factor 6 mientras que el uso de recursos continua siendo bajo, alrededor de un 2% de una Xilinx Virtex-5QV o Microsemi RTG4. La combinación de estas dos tecnologías puede ayudar a reducir las grandes cantidades de datos generados por los instrumentos de los satélites de una manera transparente, sin necesidad de una intervención por parte del usuario, y de proporcionar una solución al continuo incremento de datos generados. En consecuencia, la combinación de FAPEC y SpaceFibre puede ayudar a ahorrar masa y consumo de energía, y reducir la complejidad de los sistemas.SpaceFibre és una nova tecnologia per a ús embarcat en satèl·lits que proporciona connexions punt a punt i de xarxa a 3.125 Gbit/s en tecnologia qualificada per espai. SpaceFibre és una iniciativa de l'Agència Espacial Europea (ESA) i substituirà el popular SpaceWire en aplicacions espacials d'alta velocitat. FAPEC és un algorisme de compressió sense pèrdues que normalment ofereix relacions de compressió per a conjunts de dades realistes millors que les de la recomanació CCSDS 121.0. FAPEC ha estat dissenyat per a les comunicacions espacials, on les restriccions de consum d'energia i eficiència són molt fortes. En aquest projecte hem demostrat que FAPEC pot ser integrat fàcilment amb SpaceFibre per reduir la quantitat d'informació que la xarxa del satèl·lit ha de processar. La integració de FAPEC amb SpaceFibre ha estat validada amb èxit en una plataforma FPGA representativa. En el disseny desenvolupat, FAPEC funciona a ~12 Mmostres/s (~200 Mbit/s) utilitzant una Xilinx Spartan-6 però s'espera que arribi velocitats de Gbit/s amb una mica més de feina. La velocitat de l'algorisme s'ha millorat un factor 6 mentre que l'ús de recursos continua sent baix, al voltant d'un 2% d'una Xilinx Virtex-5QV o Microsemi RTG4. La combinació d'aquestes dues tecnologies pot ajudar a reduir les grans quantitats de dades generades pels instruments dels satèl·lits d'una manera transparent, sense necessitat d'una intervenció per part de l'usuari, i de proporcionar una solució al continu increment de dades generades. En conseqüència, la combinació de FAPEC i SpaceFibre pot ajudar a estalviar massa i consum d'energia, i reduir la complexitat dels sistemes

    A transputer based parallel database system.

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    A sophisticated database application generation environment known as DB4GL has been developed at Sheffield City Polytechnic. A unique feature of DB4GL is the object-oriented application model used to specify and generate database applications. Although DB4GL has many advanced and powerful features, such as a self-describing data dictionary and extensive integrity rule processing facilities; the system has not been designed for high performance in either the generation tools or the generated database applications. The Parallel-DB4GL (P-DB4GL) project represents an attempt to improve the performance of the generated database applications, by constructing a new concurrent implementation of DB4GL for execution on transputer-based parallel hardware. This thesis describes the DB4GL system as developed to the commencement of the P-DB4GL project. A prototype P-DB4GL system has been implemented that demonstrates how significant performance gains can be obtained from a concurrent implementation on transputer-based parallel hardware. Based on the successful results of this prototype system, designs for a fully functional multiprocessor P-DB4GL system are proposed. The details of this prototype and the fully functional designs are presented in this thesis. The thesis also provides an evaluation of the P-DB4GL project as a whole, and concludes with some suggestions for further research in the areas of parallel databases and object-oriented system implementation
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