Average power tracking optimization system for LTE power amplifiers

Abstract. This thesis introduces the design and implementation of an optimization system for average power tracking, used in the RF power amplifier of LTE mobile device. Average power tracking adjusts the supplied voltage of the power amplifier according to output power level so that the linearity of the power amplifier is maintained while the efficiency is improved. The optimization system is implemented with computer controlled measurement equipment setup. The setup consists of an RF signal generator, a power meter and a spectrum analyzer. Performance measurements are performed to the device under test with different bias voltages of the PA and various output power levels, separately for two different power modes of the power amplifier. The performance measurements focus on the ratio of transmission channel power and adjacent channel power. Total efficiency and gain of the device and the current consumption of the power amplifier were also measured. Based on the measurement results, the most suitable voltage for the power amplifier can be selected for each power level with a voltage table optimizing algorithm. The algorithm compares the measured adjacent channel leakage ratio to a predetermined target value and selects the lowest linearity requirements fulfilling a voltage value for the power amplifier. The effects of output power and supplied voltage on the linearity, gain and efficiency of the device are observed. The results show that the performance of the device under test is greatly dependent on the bias voltage of the power amplifier. In addition, the effect of ambient temperature and different frequency channels on the linearity and gain are observed. The measurements show that the temperature affects marginally the gain whereas linearity is more dependent on the used frequency channel. Finally the suitability of the optimized bias voltage table is verified by using it to adjust the power amplifier of a separate test board. The linearity of the product is verified by measuring the adjacent channel leakage ratio and comparing it to official requirements. The voltage table generated with the optimizing algorithm based on the results obtained with the measurement setup is well suited for improving the power amplifier efficiency with average power tracking. It is a fast method to obtain a wide range of measurement results of the performance of a power amplifier with various output power levels and bias voltages.Keskimääräisen tehonseurannan optimointisysteemi LTE-tehovahvistimille. Tiivistelmä. Tässä diplomityössä esitellään LTE-tiedonsiirtotekniikkaa tukevassa matkapuhelimessa käytettävän RF-tehovahvistimen keskimääräisen tehonseurannan optimointisysteemin suunnittelu ja toteutus. Keskimääräinen tehonseuranta säätää tehovahvistimen käyttöjännitettä lähtötehon perusteella niin, että tehovahvistimen lineaarisuus säilytetään ja hyötysuhde paranee. Optimointisysteemi toteutettiin tietokone-ohjatulla mittalaitekokoonpanolla sekä tulostenkäsittelyalgoritmilla. Mittalaitekokoonpano koostuu RF-signaaligeneraattorista, tehomittarista ja spektrianalysaattorista. Testilaitteelle suoritetaan suorituskykymittauksia eri tehovahvistimen jännitearvoilla ja usealla lähtötehotasolla, erikseen kahdelle eri vahvistimen tehotilalle. Suorituskykymittaukset keskittyvät lähetyskanavan sekä viereisen kanavan tehon suhteen mittaukseen. Myös hyötysuhde, kokonaisvahvistus sekä testilaitteen tehovahvistimen virrankulutus mitataan suorituskykymittausten yhteydessä. Mittaustulosten perusteella jännitetaulukon optimointialgoritmilla saadaan valittua sopivin tehovahvistimelle syötettävä jännite kullekin lähtötehotasolle. Algoritmi vertaa viereisen kanavan vuototehon suuruutta asetettuun tavoitearvoon ja valitsee tehovahvistimelle matalimman lineaarisuusvaatimukset täyttävän jännitteen. Havaintoja tehdään testilaitteen tehovahvistimen lineaarisuuden, vahvistuskertoimen ja hyötysuhteen riippuvuudesta lähtötehoon sekä käyttöjännitteeseen. Tuloksista nähdään syötettävän jännitteen vaikuttavan voimakkaasti testilaitteen suorituskykyyn. Myös ympäröivän lämpötilan sekä taajuuskanavan vaikutusta tehovahvistimen lineaarisuuteen ja vahvistuskertoimeen tutkitaan. Mittaukset osoittavat lämpötilan vaikuttavan tehovahvistimen vahvistuskertoimeen marginaalisesti. Sen sijaan lineaarisuuteen vaikuttaa enemmän käytettävä taajuuskanava. Lopuksi optimoidun jännitetaulukon soveltuvuus varmistetaan käyttämällä sitä erillisellä testilevyllä tehovahvistimen jännitteen säätämiseen. Varmistusmittauksissa lineaarisuus testataan mittaamalla viereisen kanavan vuototehon suuruus ja vertaamalla sitä asetettuihin virallisiin vaatimuksiin. Mittalaitekokoonpanolla saatujen mittaustulosten sekä optimointialgoritmin perusteella luotu jännitetaulukko soveltuu hyvin tehovahvistimen hyötysuhteen parantamiseen keskimääräisen tehonseurannan avulla. Se on nopea tapa saada mittaustuloksia tehovahvistimen suorituskyvystä laajalta lähtötehoalueelta eri jännitearvoilla

RF CMOS switch design methodologies for multiband transceiver applications

Multimode multiband connectivity has become a de-facto requirement for smartphones with 3G WCDMA/4G LTE applications. In transceivers, multiband operation is achieved by selecting an output from two or more signal path targeting for a specific frequency range in parallel or by using switched capacitor/inductor. In this paper, design methodology of 280nm CMOS switch is presented. Design optimization of RF CMOS switch is presented which is deciding proper selection of CMOS transistor parameters and switch size as per external circuit parameters. The CMOS switch of a 5-transistor stack with W/L=1200µm/280nm provides insertion loss 14dB. The switches designed when implemented in a multiband power amplifier (PA) exhibits 36dB gain at 1900MHz high-band and 34.5dB gain at 900MHz low-band with 27.5dBm peak power at both bands. The switch design methodologies presented in this paper should be of use in designing various blocks in emerging multiband transceiver applications

Design of a class-F power amplifier with reconfigurable output harmonic termination in 0.13 µm CMOS

Next generation wireless communication technology requires mobile devices and base stations to support multiband multimode frequencies with higher data rate because of the type of enriched and enhanced features and services that are provided to the end user. The challenge for next generation PA designers is to provide high efficiency, output power and good linearity across multiple frequency bands, modulation standards and bandwidth. Current industry solution involves parallel PAs dedicated to a single band of operation. As more and more features are added, more and more PAs will be required with increasing cost, area and complexity. As a solution to this problem, one tunable fully integrated class-F power amplifier with reconfigurable output harmonic termination is proposed, designed, fabricated and tested with a commercially available 0.13µm CMOS process technology. By using the coupling between the primary and the secondary winding of an on chip transformer with a variable secondary termination capacitance, the second and third harmonic short and open circuit frequencies are dynamically tuned from 700 MHz to 1200 MHz and achieve high efficiency and output power. To overcome CMOS process low break down voltage, a series voltage combining approach is used for the power device to boost output power, by allowing the power supply to exceed process limits. The fabricated die was packaged and mounted to a printed circuit board for evaluation. Compared to previously publish fully integrated PAs, our design exhibits superior peak power added efficiency, 48.4%, and decent saturated output power and power gain of 24.6 dBm and 16.5 dB respectively with reconfigurability from 700 MHz to 1200 MHz

A Concurrent Dual-Band Inverter-Based Low Noise Amplifier (LNA) for WLAN Applications

low noise amplifier (LNA); concurrent; dual-band; inverter-basedIn this paper, a two-stage concurrent dual-band low noise amplifier (DB-LNA) operating at 2.4/5.2-GHz is presented for Wireless Local Area Network (WLAN) applications. The current-reused structure using resistive shunt-shunt feedback is employed to reduce power dissipation and achieve a wide frequency band from DC to-5.5-GHz in the inverter-based LNA. The second inverter-based stage is employed to increase the gain and obtain a flat gain over the frequency band. An LC network is also inserted at the proposed circuit output to shape the dual-band frequency response. The proposed concurrent DB-LNA is designed by RF-TSMC 0.18-µm CMOS technology, which consumes 10.8 mW from a power supply of 1.5 V. The simulation results show that the proposed DB-LNA achieves a direct power gain (S 21 ) of 13.7/14.1 dB, a noise figure (NF) of 4.2/4.6 dB, and an input return loss (S 11 ) of −12.9/−14.6 dBm at the 2.4/5.2-GHz bands