Small Form Factor Hybrid CMOS/GaN Buck Converters for 10W Point of Load Applications

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities.Dissertation/ThesisMasters Thesis Electrical Engineering 201

Hybrid monolithic integration of high-power DC-DC converters in a high-voltage technology

The supply of electrical energy to home, commercial, and industrial users has become ubiquitous, and it is hard to imagine a world without the facilities provided by electrical energy. Despite the ever increasing efficiency of nearly every electrical application, the worldwide demand for electrical power continues to increase, since the number of users and applications more than compensates for these technological improvements. In order to maintain the affordability and feasibility of the total production, it is essential for the distribution of the produced electrical energy to be as efficient as possible. In other words the loss in the power distribution is to be minimized. By transporting electrical energy at the maximum safe voltage, the current in the conductors, and the associated conduction loss can remain as low as possible. In order to optimize the total efficiency, the high transportation voltage needs to be converted to the appropriate lower voltage as close as possible to the end user. Obviously, this conversion also needs to be as efficient, affordable, and compact as possible. Because of the ever increasing integration of electronic systems, where more and more functionality is combined in monolithically integrated circuits, the cost, the power consumption, and the size of these electronic systems can be greatly reduced. This thorough integration is not limited to the electronic systems that are the end users of the electrical energy, but can also be applied to the power conversion itself. In most modern applications, the voltage conversion is implemented as a switching DC-DC converter, in which electrical energy is temporarily stored in reactive elements, i.e. inductors or capacitors. High switching speeds are used to allow for a compact and efficient implementation. For low power levels, typically below 1 Watt, it is possible to monolithically implement the voltage conversion on an integrated circuit. In some cases, this is even done on the same integrated circuit that is the end user of the electrical energy to minimize the system dimensions. For higher power levels, it is no longer feasible to achieve the desired efficiency with monolithically integrated components, and some external components prove indispensable. Usually, the reactive components are the main limiting factor, and are the first components to be moved away from the integrated circuit for increasing power levels. The semiconductor components, including the power transistors, remain part of the integrated circuit. Using this hybrid approach, it is possible in modern converterapplications to process around 60 Watt, albeit limited to voltages of a few Volt. For hybrid integrated converters with an output voltage of tens of Volt, the power is limited to approximately 10 Watt. For even higher power levels, the integrated power transistors also become a limiting factor, and are replaced with discrete power devices. In these discrete converters, greatly increased power levels become possible, although the system size rapidly increases. In this work, the limits of the hybrid approach are explored when using so-called smart-power technologies. Smart-power technologies are standard lowcost submicron CMOS technologies that are complemented with a number of integrated high-voltage devices. By using an appropriate combination of smart-power technologies and circuit topologies, it is possible to improve on the current state-of-the-art converters, by optimizing the size, the cost, and the efficiency. To determine the limits of smart-power DC-DC converters, we first discuss the major contributing factors for an efficient energy distribution, and take a look at the role of voltage conversion in the energy distribution. Considering the limitations of the technologies and the potential application areas, we define two test-cases in the telecommunications sector for which we want to optimize the hybrid monolithic integration in a smart-power technology. Subsequently, we explore the specifications of an ideal converter, and the relevant properties of the affordable smart-power technologies for the implementation of DC-DC converters. Taking into account the limitations of these technologies, we define a cost function that allows to systematically evaluate the different potential converter topologies, without having to perform a full design cycle for each topology. From this cost function, we notice that the de facto default topology selection in discrete converters, which is typically based on output power, is not optimal for converters with integrated power transistors. Based on the cost function and the boundary conditions of our test-cases, we determine the optimal topology for a smart-power implementation of these applications. Then, we take another step towards the real world and evaluate the influence of parasitic elements in a smart-power implementation of switching converters. It is noticed that the voltage overshoot caused by the transformer secondary side leakage inductance is a major roadblock for an efficient implementation. Since the usual approach to this voltage overshoot in discrete converters is not applicable in smart-power converters due to technological limitations, an alternative approach is shown and implemented. The energy from the voltage overshoot is absorbed and transferred to the output of the converter. This allows for a significant reduction in the voltage overshoot, while maintaining a high efficiency, leading to an efficient, compact, and low-cost implementation. The effectiveness of this approach was tested and demonstrated in both a version using a commercially available integrated circuit, and our own implementation in a smart-power integrated circuit. Finally, we also take a look at the optimization of switching converters over the load range by exploiting the capabilities of highly integrated converters. Although the maximum output power remains one of the defining characteristics of converters, it has been shown that most converters spend a majority of their lifetime delivering significantly lower output power. Therefore, it is also desirable to optimize the efficiency of the converter at reduced output current and output power. By splitting the power transistors in multiple independent segments, which are turned on or off in function of the current, the efficiency at low currents can be significantly improved, without introducing undesirable frequency components in the output voltage, and without harming the efficiency at higher currents. These properties allow a near universal application of the optimization technique in hybrid monolithic DC-DC converter applications, without significant impact on the complexity and the cost of the system. This approach for the optimization of switching converters over the load range was demonstrated using a boost converter with discrete power transistors. The demonstration of our smart-power implementation was limited to simulations due to an issue with a digital control block. On a finishing note, we formulate the general conclusions and provide an outlook on potential future work based on this research

Doctor of Philosophy

dissertationMicroelectromechanical systems (MEMS) resonators on Si have the potential to replace the discrete passive components in a power converter. The main intention of this dissertation is to present a ring-shaped aluminum nitride (AlN) piezoelectric microreson

Design and Improved Switching Transient Modeling for A GaN-based Three Phase Inverter

In recent years, wide-bandgap devices (WBG) such as silicon carbide (SiC) and gallium nitride (GaN) transistors have drawn significant research attention in power conversion applications where higher efficiency, higher power density and lower cost are required, for example, in electric vehicle (EV) applications. Owing to its better figures of merit on on-resistance, switching speed and junction temperature, enhancement-mode GaN high electron mobility transistors (HEMTs) are able to be operated with switching frequency up to the megahertz range, through which the size of passive components in the power converters can be significantly reduced. Consequently, the power converter’s integration level and power density can be increased. In GaN-based power converters, the switching energy loss increases naturally along with the switching frequency, which is the dominant loss component. Consequently, it is always one of the top priority performances to be considered in research and development activities. For device manufacturers, with access to internal materials and dimensional parameters, physics-based device models are usually used. Although these models can reveal detailed characteristics of the devices, they are not accessible to the public and can be very time-consuming to develop. Analytical models, that can emulate the transistor’s dynamic behaviour and predict the switching energy loss without consuming too much computing resources, are always an essential tool to help provide guidelines to engineers for circuit design and performance optimization purposes. This thesis develops a computationally inexpensive and straightforward switching transient model which proves to be more accurate than conventional model through simulation and experiments. Currently, in the commercial market, there are only a few mature designs of GaN three-phase inverter products, and most of them are costly. This unavoidable phenomenon is led by the fact that the gate driver and power loop design for GaN is demanding. Some companies such as EPC, Navitas and Power Integrations are committed to monolithic-integrated gate drivers, but they are complex and expensive. Thus, this thesis also aims to design a GaN-based three-phase inverter with low cost and low complexity in the gate drive circuit. In addition, to achieve high performance GaN-based inverter, parasitic components in the power loop have to be minimized. In this thesis study, parasitic parameters of the power loop are extracted through Ansys Q3D simulation and then validated through experimental test results. With accurate parasitic parameters, the layout of the PCBs is improved to achieve better inverter performance

Magnetics and GaN for Integrated CMOS Voltage Regulators

The increased use of DC-consuming electronics in many applications relevant to everyday life, necessitates significant improvements to power conversion and distribution methodologies. The surge in mobile electronics created a new power application space where high efficiency, size, and reduced complexity are critical, and at the same time, many computational tasks are relegated to centralized cloud computing centers, which consume significant amounts of energy. In both those application spaces, conversion and distribution efficiency improvements of even a few-% proves to be more and more challenging. A lot of research and development efforts target each source of loss, in an attempt to improve power electronics such that it serves the advances in other fields of electronics. Non-isolated DC-DC converters are essential in every electronics system, and improvements to efficiency, volume, weight and cost are of utmost interest. In particular, increasing the operation frequency and the conversion ratio of such converters serves the purposes of reducing the number or required conversion steps, reducing converter size, and increasing efficiency. The aforementioned improvements can be achieved by using superior technologies for the components of the converter, and by implementing higher level of integration than most present-day converters exhibit. In this work, Gallium Nitride (GaN) high electron mobility transistors (HEMT) are utilized as switches in a half-bridge buck converter topology, in conjunction with fine-line 180nm complementary metal oxide semiconductor (CMOS) driver circuitry. The circuits are integrated through a face-to-face bonding technique which results in significant reduction in interconnects parasitics and allows faster, more efficient operation. This work shows that the use of GaN transistors for the converter gives an efficiency headroom that allow pairing converters with state-of-the-art thin-film inductors with magnetic material, a task that is currently usually relegated to air-core inductors. In addition, a new "core-clad" structure for thin-film magnetic integrated inductors is presented for the use with fully integrated voltage regulators (IVRs). The core-clad topology combines aspects from the two popular inductor topologies (solenoid and cladded) to achieve higher inductance density and improved high frequency performance

IEEE Access Special Section: Emerging Technologies for Energy Internet

10.1109/ACCESS.2020.3040490IEEE Access8213340-21334

Wide Bandgap Based Devices: Design, Fabrication and Applications, Volume II

Wide bandgap (WBG) semiconductors are becoming a key enabling technology for several strategic fields, including power electronics, illumination, and sensors. This reprint collects the 23 papers covering the full spectrum of the above applications and providing contributions from the on-going research at different levels, from materials to devices and from circuits to systems