On board processor system study Final report

Development and characteristics of onboard processor syste

Graphical microcode simulator with a reconfigurable datapath

Microcode is a symbolic way to simplify control design that allows changing, testing and updating the control unit of processors. By changing the microcode, the same datapath can be used for an entirely different application, such as supporting a completely different instruction set. For these reasons, a majority of control units in modern day processors are microcoded. The object was to investigate and implement a graphical microcode simulator with a reconfigurable datapath and microcode format. By allowing a wide configuration of the datapath, many types of logical processors can be designed and simulated. The resulting implemented simulator is able to fill the void in microprogramming tools since there are no graphical microcode simulators that allow such customization of the datapath. The customization of the datapath goes beyond allowing different files specifying the datapath, it allows the datapath to be created and modified using the graphical interface.This tool is able to be used to design and simulate general-purpose processors and application specific processors through datapath and microcode configurations. In the academic setting, this tool provides easier microcode testing through verification on the instruction level for instructors and provide simulation debugging through code tracing and breakpoints for students

Towards a design of HMO, an integrated hardware microcode optimizer

This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in micro-programmable machines. Besides presenting the algorithm itself, this research also analyzes the algorithm\u27s uses, design integration problems, architectural requirements, and adaptability to conventional machine characteristics. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process --Abstract, page ii

Wepsim: an online interactive educational simulator integrating microdesign, microprogramming, and assembly language programming

Our educational project has three primary goals. First, we want to provide a robust vision of how hardware and software interplay, by integrating the design of an instruction set (through microprogramming) and using that instruction set for assembly programming. Second, we wish to offer a versatile and interactive tool where the previous integrated vision could be tested. The tool we have developed to achieve this is called WepSIM and it provides the view of an elemental processor together with a microprogrammed subset of the MIPS instruction set. In addition, WepSIM is flexible enough to be adapted to other instruction sets or hardware components (e.g., ARM or x86). Third, we want to extend the activities of our university courses, labs, and lectures (fixed hours in a fixed place), so that students may learn by using their mobile device at any location, and at any time during the day. This article presents how WepSIM has improved the teaching of Computer Structure courses by empowering students with a more dynamic and guided learning process. In this paper, we show the results obtained during the experience of using the simulator in the Computer Structure course of the Bachelor's Degree in Computer Science and Engineering at University Carlos III of Madrid

A comparison of VHDL and microprogrammed implementations of synchronous finite state machines in field programmable logic devices

Digital design engineers often must balance the design issues of implementing finite state machines in field programmable logic devices, obtaining the highest clock frequency possible, and keeping the amount of logic resources utilized as small as possible. This and other design issues are discussed in this thesis. A comparison of VHDL and microprogrammed implementations of synchronous finite state machines in field programmable logic devices is presented. Three representative state machines, a Tap controller, temperature controller, and quarter-inch tape cartridge controller, with 16, 22, and 61 states respectively were chosen to be implemented using five basic methods: VHDL, a scaled-down microsequencer utilizing embedded array blocks (EABs) as the memory storage element, a scaled-down microsequencer utilizing lookup tables (LUTs) as the memory storage element, and a full-scale microsequencer with EABs and a full-scale microsequencer with LUTs. Altera Max Plus II software was used including versions 7.21 and 9.4. The Altera Flex 10K and 10KE components were used. The results from these methods were analyzed and compared. Areas of interest were clock frequency, logic cell utilization, and software efficiency As the number of states was increased for a finite state machine, VHDL became increasingly inefficient in terms of clock frequency and resource utilization. A scaled-down microsequencer approach using LUTs as the memory storage element was found to be the most efficient in overall clock frequency and resource utilization

Graph model analysis of computer structures

Graph theory is applicable to the solving of problems in nearly every field of scientific study. The purpose of this thesis is to consider its applications in representing and analyzing digital computers. Fundamental graph theory definitions, the types and the properties of the directed graphs, the matrix representation, and several reduction techniques are discussed. The blocking gate method for diagnosing computer systems is described and applied to the Scientific Control Corporation (SCC) 650 for its fault-diagnosis. Microprogramming has been a significant trend in hardware and software designs of computers. Microprogrammed computers are discussed in comparison to conventional computers. A general scheme utilizing four nodes generates directed graphs for both types of architecture. The directed graphs are studied with respect to the flexibility and cost parameters --Abstract, page ii