Physics and Technology of Silicon Carbide Devices

Recently, some SiC power devices such as Schottky-barrier diodes (SBDs), metal-oxide-semiconductor field-effect-transistors (MOSFETs), junction FETs (JFETs), and their integrated modules have come onto the market. However, to stably supply them and reduce their cost, further improvements for material characterizations and those for device processing are still necessary. This book abundantly describes recent technologies on manufacturing, processing, characterization, modeling, and so on for SiC devices. In particular, for explanation of technologies, I was always careful to argue physics underlying the technologies as much as possible. If this book could be a little helpful to progress of SiC devices, it will be my unexpected happiness

A physics-based model of SiC-based MESFETs

Silicon Carbide (SiC) has been investigated as an alternative material to Silicon (Si) for enhancing the power-handling capability of semiconductor devices for simultaneous high-temperature and high frequency applications. Its high thermal conductivity, high bandgap, low permittivity, high saturation velocity, moderate mobility, material hardness and chemical inertness make it a prime candidate for power electronics, heat and light sensors, and MEMS applications. The MESFET is the most viable power transistor based on SiC. The performance of SiC MESFETs is limited by trapping and thermal effects. A physics-based analytical model of the SiC MESFET incorporating trapping and thermal effects is reported. The model takes into account the field and temperature dependencies of carrier transport parameters and carrier trapping effects. Both surface and substrate traps have been incorporated in the model to calculate the observed current slump in the I-V characteristics. The trapping and detrapping from surface traps control the channel opening at the drain end of the channel that requires the drain resistance to be gate and drain voltage dependent. The substrate traps capture channel electrons at high drain bias when the buffer layer is fully depleted resulting in current collapse at low drain bias in the following I-V trace. The detrapping of the captured electrons is initiated with the increasing drain bias and the channel electron concentration increases which is accelerated by increased thermal effects. As a result, restoration of collapsed drain current is obtained before the trapping effect is reinitiated at high drain bias. The calculated results using the current model are in good agreement with experimental data. A small-signal model for the MESFET has also been proposed. Calculations for the output conductance, the transconductance, the gate-source and gate-drain capacitance has also been presented

Diamond power devices: State of the art, modelling and figures of merit

With its remarkable electro-thermal properties such as the highest known thermal conductivity (~22W/cmbold dotK at room temperature) of any material, high hole mobility (> 2000cm2/Vbold dots), high critical electric field (>10MV/cm), and large bandgap (5.47eV), diamond has overwhelming advantages over silicon and other wide bandgap semiconductors (WBG) for ultra-high- voltage and high temperature applications (>3kV and >450 K, respectively). However, despite their tremendous potential, fabricated devices based on this material have not delivered yet the expected high-performance. The main reason behind this is the absence of shallow donor and acceptor species. The second reason is the lack of consistent physical models and design approaches specific to diamond-based devices that could significantly accelerate their development. The third reason is that the best performances of diamond devices are expected only when the highest electric field in reverse bias can be achieved, something that has not been widely obtained yet. In this context, high temperature operation and unique device structures based on the 2DHG formation represent two alternatives which could alleviate the issue of the incomplete ionization of dopant species. Nevertheless, ultra-high temperature operations and device parallelization could result in severe thermal management issues and affect the overall stability and long-term reliability. Additionally, problems connected to the reproducibility and the long-term stability of 2DHG based-devices still need to be resolved. This review paper aims at addressing these issues by providing the power device research community with a detailed set of physical models, device designs and challenges associated to all the aspects of the diamond power device value chain, from the definition of figures of merits, the material growth and processing conditions, to packaging solutions and targeted applications. Finally, the paper will conclude with suggestions on how to design power converters with diamond devices and will provide the roadmap of diamond devices development for power electronics.This work was supported by the U.K. Engineering and Physical Sciences Research Council for the University of Cambridge Centre for Doctoral Training under Grant EP/M506485/1 and by the French ANR Research Agency under grant ANR-16-CE05-0023 #Diamond-HVDC. The research leading to these results has been performed within the GREENDIAMOND project and received funding from the European Community's Horizon 2020 Programme (H2020/2014–2020) under grant agreement no. 640947

Diamond power devices: state of the art, modelling, figures of merit and future perspective

Abstract: With its remarkable electro-thermal properties such as the highest known thermal conductivity (~22 W cm−1∙K−1 at RT of any material, high hole mobility (>2000 cm2 V−1 s−1), high critical electric field (>10 MV cm−1), and large band gap (5.47 eV), diamond has overwhelming advantages over silicon and other wide bandgap semiconductors (WBGs) for ultra-high-voltage and high-temperature (HT) applications (>3 kV and >450 K, respectively). However, despite their tremendous potential, fabricated devices based on this material have not yet delivered the expected high performance. The main reason behind this is the absence of shallow donor and acceptor species. The second reason is the lack of consistent physical models and design approaches specific to diamond-based devices that could significantly accelerate their development. The third reason is that the best performances of diamond devices are expected only when the highest electric field in reverse bias can be achieved, something that has not been widely obtained yet. In this context, HT operation and unique device structures based on the two-dimensional hole gas (2DHG) formation represent two alternatives that could alleviate the issue of the incomplete ionization of dopant species. Nevertheless, ultra-HT operations and device parallelization could result in severe thermal management issues and affect the overall stability and long-term reliability. In addition, problems connected to the reproducibility and long-term stability of 2DHG-based devices still need to be resolved. This review paper aims at addressing these issues by providing the power device research community with a detailed set of physical models, device designs and challenges associated with all the aspects of the diamond power device value chain, from the definition of figures of merit, the material growth and processing conditions, to packaging solutions and targeted applications. Finally, the paper will conclude with suggestions on how to design power converters with diamond devices and will provide the roadmap of diamond device development for power electronics

Smart Power Devices and ICs Using GaAs and Wide and Extreme Bandgap Semiconductors

We evaluate and compare the performance and potential of GaAs and of wide and extreme bandgap semiconductors (SiC, GaN, Ga2O3, diamond), relative to silicon, for power electronics applications. We examine their device structures and associated materials/process technologies and selectively review the recent experimental demonstrations of high voltage power devices and IC structures of these semiconductors. We discuss the technical obstacles that still need to be addressed and overcome before large-scale commercialization commences

Compact Modeling of Silicon Carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) in PSpice using Angelov Model and PSpice Simulation of Analog Circuit Building Blocks using SiC VJFET Model

This thesis presents the development of compact model of novel silicon carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) for high-power circuit simulation. An empirical Angelov model is developed for SiC VJFET in PSpice. The model is capable of accurately replicating the device behavior for the DC and Transient conditions. The model was validated against measured data obtained from devices developed by Mississippi Center for Advanced Semiconductor Prototyping at MSU and SemiSouth Laboratories. The modeling approach is based on extracting Angelov Equations Coefficients from experimental device characteristics using non linear fitting. The coefficients are extracted for different parameters (temperature, width, etc). Multi-Dimensional Interpolation Technique is used to incorporate the effect of more than one parameter. The models developed in this research are expected to be valuable tools for electronic designers in the future. The developed model was applied for investigating the characteristics of a few standard analog circuit blocks using SiC VJFET and Si JFET in order to demonstrate the capabilities of the model to reveal the relative advantages of one over the other. The selected circuits of interest were Voltage Follower, Common Source Amplifier, Current Source and Differential Amplifier. Simulations of analog circuit building blocks incorporating SiC VJFET showed better circuit functionality compared to their Si counterparts

FABRICATION AND CHARACTERIZATION OF Cu/4H-SiC SCHOTTKY DIODES

Copper Schottky contacts to n-type 4H Silicon Carbide with nickel ohmic contacts were fabricated. The electrical and physical characteristics of these Schottky diodes were analyzed and the results are presented. I-V measurements revealed two sets of characteristics, one indicating nearly ideal Schottky behavior and the other exhibiting regions with two barrier heights. The reason for this observed phenomenon was studied and attributed to the in-homogeneity of the Silicon Carbide surface. The I-V and C-V characteristics were used to extract the electrical parameters, which include barrier height, ideality factor, reverse saturation current density, and doping concentration. The measured barrier height was close to the Schottky-Mott limit. The importance of an additional surface clean prior to the deposition of the Schottky contacts was established. Significant improvement in the electrical characteristics was observed when this second surface clean was performed. C-V measurements and XPS results indicate that this improvement was due to the removal of an oxide layer from the SiC surface which formed some time after the initial wafer clean. This thesis presents some of the first experimental data on Cu/4H-SiC Schottky diodes

Ultra Wideband 5 W Hybrid Power Amplifier Design Using Silicon Carbide MESFETs

Aufgrund des hohen Bandabstandes von SiC besitzen SiC-MESFETs ein hohe Duruchbruchspannung und können folglich bei hohen Versorgungsspannungen betrieben werden. Darüber hinaus besitzen sie eine hohe Elektronensätigungsgeschwindigkeit und Wärmeleitfähigkeit. Aufgrund diese eigenschaften eignen sich diese bauelemente hervorragend für die Entwiklung von breitbandigen Leistungsverstärkern bis in den unteren GHz-Bereich. In dieser Arbeit wird ein neues empirisches Modell für SiC MESFET vorgeschlagen. Ein kommerziell erhältlicher, gehäuster MESFET Typ (CREE CRF24010) wird für die Entwicklung des Modelles verwendet. Messungen wurden sowohl in Arbeitspunkten mit als auch ohne Vorspannung durchgeführt um die Gleichungen und Parameter abzuleiten. Die Cold FET Technik wurde verwendet um die parasitären extrinsischen Elemente zu bestimmen, während die arbeitspunktabhängigen Elemente des Modelles analytisch bei mehreren Arbeitspunkten bestimmt wurden. Nichtlineare Gleichungen für die arbeitspunktabhängigen Elemente wurden ebenfalls abgeleitet. Das so entwickelte Modell für den SiC MESFET wurde sowohl hinsichtlich des Kleinsignal als auch des Großsignalverhaltens überprüft. Fünf verschiedene Generationen von Breitband-Leistungsverstärkern wurden auf Grundlage des entwickelten Modelles implementiert. Dabei wurde keinerlei Impedanztransformator eingesetzt. Eine neuartige breitbandige Biasstruktur wurde entwickelt, um gute Isolation und geringe Verluste über die angestrebte Bandbreite zu erreichen. Die Anpassungsnetzwerke an Eingang, Ausgang und zwischen den Stufen sowie die Parallel-Rückkopplung wurden mit Hilfe von Mikrostreifenleitungstechnik realisiert um die Bandbreite zu erhöhen und die Stabilität zu verbessern. Als erste Generation wird ein einstufiger 5 Watt Leistungsverstärker mit einem SiC MESFET entworfen und aufgebaut, der den Frequenzbereich von 10 MHz bis 2,4 GHz abdeckt. Eine Leistungsverstärkung von 6 dB, 37 dBm Ausgangsleistung, 33% PAE und 52 dBm OIP3 wurden erreicht. Ein zweistufiger Leistungsverstärker mit hoher Verstärkung für die selbe Bandbreite, der einen GaAs und einen SiC MESFET in Kaskade verwendet, wurde ebenfalls aufgebaut. Typische Werte von 23 dB Leistungsverstärkung, 37 dBm Ausgangsleistung, 28 % PAE und 47 dBm OIP3 wurden erreicht. Der Einfluss der Treiberstufe auf die Leistungs- und Linearitätseigenschaften der zweiten Generation wurde untersucht. Basierend auf SiC Chips wurden die dritte und vierte Generation in Form von einstufigen und zweistufigen ultra-breitband Leistungsverstärkern implementiert, die das Frequenzband von 1 MHz bis 5 GHz abdecken. Der Einfluss des GaAs FET Treibers in der vierten Kategorie auf die Gesamteigenschaften wurde ebenfalls diskutiert. Unter Einsatz der Rückkopplungs-Kompensationstechnik wurde ein schmalbandiger 10 W Leistungsverstärkerentwurf mit hoher Verstärkung, basierend auf einem SiC Chip, als fünftes Beispiel vorgestellt. Alle Leistungs- und Linearitäts-Ergebnisse wurden über das gesamte Frequenzband ermittelt. Die Entwurfsprozedur wird detailliert beschrieben und die Ergebnisse werden diskutiert und ausführlich mit den Simulationen verglichen.SiC MESFETs have an enormous potential for realizing high-power amplifiers at microwave frequencies due to their wide band-gap features of high breakdown field, high electron saturation velocity and high operating temperature. In this thesis, a new empirical model for SiC MESFET is proposed. A commercially packaged high power MESFET device (CREE CRF24010) is adopted for the model development. Both hot and cold bias condition measurements are performed to derive equations and parameters. Cold FET technique is used to extract the parasitic extrinsic elements whereas the bias-dependent model elements are extracted analytically from multiple bias points. Nonlinear equations for the bias dependent elements are derived, too. The derived model for the SiC MESFET has been verified in small signal as well as large signal performances. Five different generations of broadband power amplifiers based on the developed model have been implemented. No impedance transformer was used at all. A novel broadband choke structure has been developed to obtain good isolation and low loss over the desired bandwidth. Input, interstage and output matching networks and shunt feedback topology have been designed based on microstip technique to increase the bandwidth and improve the stability. In the first generation, a single stage 5-watt power amplifier using a SiC MESFET covering the frequency range from 10 MHz to 2.4 GHz is designed and fabricated. A power gain of 6 dB, 37 dBm output power, 33 % PAE and 52 dBm OIP3 have been achieved. A high gain two stage power amplifier covering the same bandwidth using a GaAs- and a SiC- MESFET in cascade also has been fabricated. Typical values of 23 dB power gain, 37 dBm output power, 28 % PAE and 47 dBm OIP3 have been obtained. The impact of the driver stage on power and linearity performances of the second generation has been discussed. Based on SiC Chip, the third and the fourth generation represent ultra wideband single stage and two stage power amplifiers, covering the frequency band from 1 MHz to 5 GHz have been simulated. Small signal and harmonic balance simulations based on ADS have been introduced. The impact of the GaAs FET driver in the fourth category on the overall performances also has been discussed. Using feedback compensation technique, a 10-W narrow band high gain power amplifier design based on SiC Chip has been presented as a fifth example. All power and linearity results were obtained over the whole frequency band. The design procedure is given in detail and the results are being discussed and compared with simulations extensively

MODELLING AND DESIGN OF DIAMOND POWER SEMICONDUCTOR DEVICES

With its remarkable electro-thermal properties such as the highest known thermal conductivity (~22 W/cm∙ K at room temperature) of any material, high hole mobility (>2000 cm2/V∙s), high critical electric field (>10 MV/cm), and large bandgap (5.47 eV), Diamond has overwhelming advantages over Silicon and wide bandgap semiconductors (WBG) for ultra-high voltage and high temperature applications (>3 kV and >450 K, respectively). However, despite its tremendous potential, fabricated devices based on this material have not yet delivered the expected high-performance. This is due to three main reasons: (i) the lack of consistent physical models and design approaches specific to diamond-based devices that could significantly accelerate their development; (ii) the absence of shallow acceptor and donor dopant species which has resulted in poor room temperature performance; (iii) the technological issues of the manufacturing process. With the principal aim of modelling the next generation of diamond devices, this Ph.D dissertation endeavours to numerically model the main electro-thermal properties of diamond devices for power electronic applications. Optimized unipolar mode diamond field effect transistors have been designed by means of finite element simulations and their performance has been assessed against the state-of-the-art diamond FETs. Particular attention is given to the static and dynamic properties of deep dopant levels and their effects in WBG semiconductor-based devices. Moreover, by means of a more global comparison technique and through accurate theoretical analysis, diamond FETs and diodes’ performance have been projected and compared with that of GaN and SiC devices. This work concludes with possible implementations of diamond devices in power converters and provides a roadmap of diamond devices for power electronics. These promising results give a new impetus to the rather small, but growing diamond community and enable future research in the field with the goal of bringing diamond to the commercial world.U.K. Engineering and Physical Sciences Research Council for the University of Cambridge Centre for Doctoral Training under Grant EP/M506485/