Signal and Power Integrity Challenges for High Density System-on-Package

As the increasing desire for more compact, portable devices outpaces Moore’s law, innovation in packaging and system design has played a significant role in the continued miniaturization of electronic systems.Integrating more active and passive components into the package itself, as the case for system-on-package (SoP), has shown very promising results in overall size reduction and increased performance of electronic systems.With this ability to shrink electrical systems comes the many challenges of sustaining, let alone improving, reliability and performance. The fundamental signal, power, and thermal integrity issues are discussed in detail, along with published techniques from around the industry to mitigate these issues in SoP applications

Self-rolled-up membrane (S-RuM) capacitors and filters for radio frequency communication

Self-rolled-up membrane (S-RuM) is a novel technology to build precisely controllable three- dimensional (3D) micro-structures. This technology finds wide applications in passive electronics, photonics, and neural interfaces, and achieves great device size reduction and performance enhancement. For passive electronics, devices based on S-RuM utilize electromagnetic energy well- confined in the device tubular cavity with extremely high efficiency, and break the footprint and parasitic effect limit set by conventional planar devices. S-RuM inductors and capacitors can reach self- resonant frequency up to 60 GHz, Q factor up to 80, and with footprint one hundredth that of the state- of-the-art 2D counterparts. This thesis illustrates the working mechanism of S-RuM technology first, and then introduces S-RuM passive electronic devices for radio frequency (RF) application. Current approaches to improve RF passive device performance are discussed. Designs of capacitors and filters based on S-RuM are demonstrated, followed by simulation and lab measurement results. Challenges associated with S-RuM passive electronics are addressed and solutions are proposed. Future work and potential wearable device applications are summarized

Design, manufacture and characterization of compact filter assemblies for radiofrequency applications

This paper presents the use of additive manufacturing in the design and fabrication of a non-planar fully 3Dprinted low-pass filter. The process implements stereolithographic 3D printing and copper electroplating to produce the necessary parts and their casing. The filter we produce acts as a demonstrator: we present the possibility of constructing building blocks and combining different elements into a full assembly for system integration. We introduce the "drop-and-screw" concept, which is implemented to mount the parts into a single connectorized assembly without the need for welding. The method we propose may be suitable for building other components by simply changing the building blocks. We pay special attention to the design of the constituent parts of the filter (a 3D conical inductor and a 3D capacitor), exploring new geometries to reduce the size of the final filter prototypes. The results demonstrate the potential of additive manufacturing in the construction of high-performance RF components and assemblies, and we present a modular prototype with a high degree of reconfigurability and multifunctionality

Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications

Im Rahmen der vorliegenden Dissertation zum Thema „Through-Silicon Vias in SiGe BiCMOS and Interposer Technologies for Sub-THz Applications“ wurde auf Basis einer 130 nm SiGe BiCMOS Technologie ein Through-Silicon Via (TSV) Technologiemodul zur Herstellung elektrischer Durchkontaktierungen für die Anwendung im Millimeterwellen und Sub-THz Frequenzbereich entwickelt. TSVs wurden mittels elektromagnetischer Simulationen modelliert und in Bezug auf ihre elektrischen Eigenschaften bis in den sub-THz Bereich bis zu 300 GHz optimiert. Es wurden die Wechselwirkungen zwischen Modellierung, Fertigungstechnologie und den elektrischen Eigenschaften untersucht. Besonderes Augenmerk wurde auf die technologischen Einflussfaktoren gelegt. Daraus schlussfolgernd wurde das TSV Technologiemodul entwickelt und in eine SiGe BiCMOS Technologie integriert. Hierzu wurde eine Via-Middle Integration gewählt, welche eine Freilegung der TSVs von der Wafer Rückseite erfordert. Durch die geringe Waferdicke von ca. 75 μm wird einen Carrier Wafer Handling Prozess verwendet. Dieser Prozess wurde unter der Randbedingung entwickelt, dass eine nachfolgende Bearbeitung der Wafer innerhalb der BiCMOS Pilotlinie erfolgen kann. Die Rückseitenbearbeitung zielt darauf ab, einen Redistribution Layer auf der Rückseite der BiCMOS Wafer zu realisieren. Hierzu wurde ein Prozess entwickelt, um gleichzeitig verschiedene TSV Strukturen mit variablen Geometrien zu realisieren und damit eine hohe TSV Design Flexibilität zu gewährleisten. Die TSV Strukturen wurden von DC bis über 300 GHz charakterisiert und die elektrischen Eigenschaften extrahiert. Dabei wurde gezeigt, dass TSV Verbindungen mit sehr geringer Dämpfung <1 dB bis 300 GHz realisierbar sind und somit ausgezeichnete Hochfrequenzeigenschaften aufweisen. Zuletzt wurden vielfältige Anwendungen wie das Grounding von Hochfrequenzschaltkreisen, Interposer mit Waveguides und 300 GHz Antennen dargestellt. Das Potential für Millimeterwellen Packaging und 3D Integration wurde evaluiert. TSV Technologien sind heutzutage in vielen Anwendungen z.B. im Bereich der Systemintegration von Digitalschaltkreisen und der Spannungsversorgung von integrierten Schaltkreisen etabliert. Im Rahmen dieser Arbeit wurde der Einsatz von TSVs für Millimeterwellen und dem sub-THz Frequenzbereich untersucht und die Anwendung für den sub-THz Bereich bis 300 GHz demonstriert. Dadurch werden neue Möglichkeiten der Systemintegration und des Packaging von Höchstfrequenzsystemen geschaffen.:Bibliographische Beschreibung List of symbols and abbreviations Acknowledgement 1. Introduction 2. FEM Modeling of BiCMOS & Interposer Through-Silicon Vias 3. Fabrication of BiCMOS & Silicon Interposer with TSVs 4. Characterization of BiCMOS Embedded Through-Silicon Vias 5. Applications 6. Conclusion and Future Work 7. Appendix 8. Publications & Patents 9. Bibliography 10. List of Figures and Table

High-Density Solid-State Memory Devices and Technologies

This Special Issue aims to examine high-density solid-state memory devices and technologies from various standpoints in an attempt to foster their continuous success in the future. Considering that broadening of the range of applications will likely offer different types of solid-state memories their chance in the spotlight, the Special Issue is not focused on a specific storage solution but rather embraces all the most relevant solid-state memory devices and technologies currently on stage. Even the subjects dealt with in this Special Issue are widespread, ranging from process and design issues/innovations to the experimental and theoretical analysis of the operation and from the performance and reliability of memory devices and arrays to the exploitation of solid-state memories to pursue new computing paradigms

Heterogeneous 2.5D integration on through silicon interposer

© 2015 AIP Publishing LLC. Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity

Contributions to the performance of thin film capacitors for high reliability applications

Capacitors are critical devices in microelectronic assemblies that must be incorporated into electronic systems through a variety of ways such as integrated or discrete devices. This work has developed new thin film capacitors deposited directly onto multichip module or printed circuit board surfaces to benefit from closer integration that enhances system performance for use in high reliability applications. The capacitors serve as filters or provide tuning and energy storage functions. Unexpected performance was observed during development that included low adhesion of the films to the substrates, higher effective dielectric constants than reported in literature, and low yields. Three publications resulted from this work with Paper I presenting a study of thin films on low temperature cofired ceramic (LTCC) and their reliability for multiple functions. The thin film and LTCC system are modeled with results suggesting a mechanism of enhancing thin film adhesion to the LTCC through a combination film composition and surface modification. Paper II presents measurements of dielectric properties of thin film capacitors on LTCC. Multiple mechanisms are detailed that contribute to the measured dielectric constant values of the capacitors. One case is modeled to determine the extent of dielectric constant enhancement from fringe fields related to capacitor dimensions. Paper III describes the behavior of thin film capacitors with varying electrode compositions and configurations. Trends are observed that suggest energy band overlap and electrode work functions are influential in dielectric properties and yield of the capacitors. A preferred electrode composition and configuration is suggested based on the capacitor performance --Abstract, page iii