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Heterogeneous 2.5D integration on through silicon interposer
Authors
Banijamali B.
Bersch E.
+38 more
Bhardwaj J.
Chaware R.
Chen D. Y.
Chiou W. C.
De Vos J.
Gan H.
Horibe A.
Huang J.-H.
Huang S.-Y.
Hübner H.
Iyer S. S.
Jung D.
Katti G.
Khong C. H.
Kim B.
Knickerbocker J. U.
Le M. W.
Li H. Y.
Li H. Y.
Li Y.
Madden L.
Murugasen M.
Ohara Y.
Praveen S. K.
Rabaey J. M.
Reed J. D.
Sakai T.
Schmidt E.
Shigetou A.
Tominaga S.
Van Olmen J.
Yang K. F.
Yang Y.
Yoon S. W.
You H.-Y.
Yu A.
Zhang X. W.
Zhe L.
Publication date
1 January 2015
Publisher
'AIP Publishing'
Doi
Cite
Abstract
© 2015 AIP Publishing LLC. Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity
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info:doi/10.1063%2F1.4921463
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