A Survey of Parallel Message Authentication and Hashing Methods

مقدمة: الإنترنت، وتبادل المعلومات، والتواصل الاجتماعي، وغيرها من الأنشطة التي ازدادت بشكل كبير في السنوات الأخيرة. لذلك، يتطلب الأمر زيادة السرية والخصوصية. في الأيام الأخيرة، كان الاحتيال عبر الإنترنت واحدًا من العوائق الرئيسية لنشر استخدام تطبيقات الأعمال. وبالتالي، تحدث الثلاث مخاوف الأمنية الهامة بشكل يومي في عالم الأزياء الشفافة لدينا، وهي: الهوية، والمصادقة، والترخيص. التعرف هو إجراء يسمح بتحديد هوية كيان ما، والذي يمكن أن يكون شخصًا أو جهاز كمبيوتر أو أصل آخر مثل مبرمج برامج. طرق العمل: في أنظمة الأمان، المصادقة والترخيص هما إجراءان مكملان لتحديد من يمكنه الوصول إلى موارد المعلومات عبر الشبكة. تم تقديم العديد من الحلول في الأدبيات. وللحصول على أداء أفضل في خوارزميات المصادقة، استخدم الباحثون التوازي لزيادة الإنتاجية لخوارزمياتهم. من جهة، تم استخدام مجموعة من الطرق لزيادة مستوى الأمان في الأنظمة التشفيرية، بما في ذلك زيادة عدد الجولات، واستخدام جداول الاستبدال ودمج آليات الأمان الأخرى لتشفير الرسائل والمصادقة عليها. النتائج: أظهرت الدراسات الحديثة حول مصادقة الرسائل المتوازية وخوارزميات التجزئة أن وحدات معالجة الرسومات تتفوق في الأداء على الأنظمة الأساسية المتوازية الأخرى من حيث الأداء. الاستنتاجات: يقدم هذا العمل تنفيذًا متوازيًا لتقنيات مصادقة الرسائل على العديد من الأنظمة الأساسية. تدرس وتعرض الأعمال التي تناقش المصادقة والتجزئة وتنفيذها على منصة موازية كهدف رئيسي.Background: Currently, there are approximately 4.95 billion people who use the Internet. This massive audience desires internet shopping, information exchange, social networking, and other activities that have grown dramatically in recent years. Therefore, it creates the need for greater confidentiality and privacy. In recent days, fraud via the Internet has been one of the key impediments to the dissemination of the use of business apps. Therefore, the three important security concerns actually occur daily in our world of transparent fashion, more accurately: identity, authentication, and authorization. Identification is a procedure that permits the recognition of an entity, which may be a person, a computer, or another asset such as a software programmer. Materials and Methods: In security systems, authentication and authorization are two complementary procedures for deciding who may access the information resources across a network. Many solutions have been presented in the literature. To get more performance on the authentication algorithmic, researchers used parallelism to increase the throughput of their algorithms.  On the one hand, various approaches have been employed to enhance the security of cryptographic systems, including increasing the number of rounds, utilizing substitution tables, and integrating other security primitives for encryption and message authentication. Results: Recent studies on parallel message authentication and hashing algorithms have demonstrated that GPUs outperform other parallel platforms in terms of performance. Conclusion: This work presents a parallel implementation of message authentication techniques on several platforms. It is studying and demonstrating works which discuss authentication, hashing, and their implementation on a parallel platform as a main objective

Parallel arithmetic encryption for high-bandwidth communications on multicore/GPGPU platforms.

International audienceIn this work we study the feasibility of high-bandwidth, secure communications on generic machines equipped with the latest CPUs and General-Purpose Graphical Processing Units (GPGPU). We first analyze the suitability of current Nehalem CPU architectures. We show in particular that high performance CPUs are not sufficient by themselves to reach our performance objectives, and that encryption is the main bottleneck. Therefore we also consider the use of GPGPU, and more particularly we measure the bandwidth of the AES ciphering on CUDA. These tests lead us to the conclusion that finding an appropriate solution is extremely difficult

Rendimiento del algoritmo AES sobre arquitecturas de memoria compartida

Actualmente AES (Advanced Encryption Standard) es uno de los algoritmos de cifrado simétrico más utilizados para encriptar información. El volumen de datos sensibles que se trasmiten en las redes se incrementa constantemente y cifrarlos puede requerir un tiempo significativo. Por lo anterior, es importante adaptar este algoritmo para aprovechar la potencia de cómputo de las arquitecturas paralelas emergentes. En este trabajo presentamos un análisis del rendimiento de AES sobre diversas arquitecturas de memoria compartida (multicore Intel E5- 2695v4, Xeon Phi 7230 y GPU Nvidia GTX 960), para datos de entrada de distinto tamaño. Los resultados revelan que la GPU es la mejor alternativa para cifrar datos de entrada que no superan los 32MB. Sin embargo, para un volumen mayor de datos, el multicore alcanza el mejor rendimiento, seguido por el Xeon Phi.XIX Workshop Procesamiento Distribuido y Paralelo (WPDP)Red de Universidades con Carreras en Informática (RedUNCI

A Quantitative Study of Advanced Encryption Standard Performance as it Relates to Cryptographic Attack Feasibility

The advanced encryption standard (AES) is the premier symmetric key cryptosystem in use today. Given its prevalence, the security provided by AES is of utmost importance. Technology is advancing at an incredible rate, in both capability and popularity, much faster than its rate of advancement in the late 1990s when AES was selected as the replacement standard for DES. Although the literature surrounding AES is robust, most studies fall into either theoretical or practical yet infeasible. This research takes the unique approach drawn from the performance field and dual nature of AES performance. It uses benchmarks to assess the performance potential of computer systems for both general purpose and AES. Since general performance information is readily available, the ratio may be used as a predictor for AES performance and consequently attack potential. The design involved distributing USB drives to facilitators containing a bootable Linux operating system and the benchmark instruments. Upon boot, these devices conducted the benchmarks, gathered system specifications, and submitted them to a server for regression analysis. Although it is likely to be many years in the future, the results of this study may help better predict when attacks against AES key lengths will become feasible

Parallel Fast Walsh Transform Algorithm and Its Implementation with CUDA on GPUs

Some of the most important cryptographic characteristics of the Boolean and vector Boolean functions (nonlinearity, autocorrelation, differential uniformity) are connected with the Walsh spectrum. In this paper, we present several algorithms for computing the Walsh spectrum implemented in CUDA for parallel execution on GPU. They are based on the most popular sequential algorithm. The algorithms differ in the complexity of implementations, resources used, optimization strategies and techniques. In the end, we give some experimental results

Implementation of the AES encryption algorithm in parallel cpu and gpu architectures

Το αντικείμενο της παρούσας πτυχιακής εργασίας είναι η υλοποίηση του αλγορίθμου κρυπτογράφησης AES με χρήση CUDA παράλληλου κώδικα, με κύριο στόχο την επίτευξη σημαντικής επιτάχυνσης του αλγορίθμου, σε σχέση με την σειριακή υλοποίησή του. Για την υλοποίηση του λογισμικού, χρησιμοποιήθηκε ο αντίστοιχος κώδικας σε C ως βάση, αν και ενσωματώθηκαν αρκετές αλλαγές, παρ’όλη την συνάφεια που παρουσιάζει η C με την CUDA ως γλώσσες προγραμματισμού. Στην αρχή της ανάπτυξης του κώδικα, καλούμασταν να βρούμε έναν τρόπο να χρησιμοποιήσουμε την CUDA για να παράγουμε ένα πρόγραμμα το οποίο θα είχε ακριβώς την ίδια λειτουργικότητα με τον αρχικό σειριακό. Παρ’ότι αυτό μπορεί να φαίνεται απλό λόγω της ομοιότητας της C με την CUDA, το πραγματικό ζήτημα ήταν να βρούμε έναν τρόπο ώστε να αξιοποιήσουμε όσο δυνατόν καλύτερα το πλήθος των CUDA threads έτσι ώστε να πετύχουμε την καλύτερη δυνατή επιτάχυνση, χωρίς όμως παράλληλα να θυσιαστούν οποιεσδήποτε λειτουργίες του λογισμικού ή να μειωθεί η λειτουργικότητά του. Μετά την ανάπτυξη του CUDA κώδικα, συμπεριλήφθησαν κάποιες διορθώσεις και βελτιστοποιήσεις στο πρόγραμμά μας, έτσι ώστε να μειωθούν κατά το δυνατό οι περιττές και χρονοβόρες διαδικασίες. Στη συνέχεια, συμπεριλάβαμε κάποια εκτελέσιμα tests με σκοπό να μετρήσουμε στην πράξη την επιτάχυνση σε έναν επαναλαμβανόμενο κύκλο Κρυπτογράφισης-Αποκρυπτογράφισης. Τα αποτελέσματα επαλήθευσαν τις αρχικές μας εκτιμήσεις. Τέλος, καταλήξαμε ότι ορισμένες μορφές του AES αλγορίθμου μπορούν να επιταχυνθούν σε σημαντικό βαθμό, έτσι ώστε να ολοκληρώνονται ακόμα και 70 φορές πιο γρήγορα απ’τον σειριακό C κώδικα.The subject of this thesis is the implementation of the AES encryption algorithm in CUDA parallel code, aiming a significant acceleration over the original serial (C language) code. Parallel software development was realized using a baseline serial C code for the AES algorithm, though many changes have taken place, in spite of the similarity of the two implementations. In the beginning of the thesis, we were called to find a way to write code which would have identical functionality to the C code used as a baseline. Though the initial code was in C and CUDA supports C and C++ code, which is something that would make the production of new code seem easy, the main problem was finding a way to make proper use of all available CUDA threads and obtain the best possible acceleration, without removing any features of the algorithm or reducing its functionality. After the finalization and validation of the CUDA code, we implemented performance optimizations. Finally we developed some tests to determine the actual (real-time, not theoretical) acceleration to an Encryption-Decryption procedure, performed several (10/100/1000) times. Results confirmed our intuition. In conclusion, certain variants of the AES encryption algorithm can be accelerated by GPUs obtaining significantly improved performance, which could reach acceleration levels up to 70 times compared to the baseline serial code

Cryptoraptor : high throughput reconfigurable cryptographic processor for symmetric key encryption and cryptographic hash functions

textIn cryptographic processor design, the selection of functional primitives and connection structures between these primitives are extremely crucial to maximize throughput and flexibility. Hence, detailed analysis on the specifications and requirements of existing crypto-systems plays a crucial role in cryptographic processor design. This thesis provides the most comprehensive literature review that we are aware of on the widest range of existing cryptographic algorithms, their specifications, requirements, and hardware structures. In the light of this analysis, it also describes a high performance, low power, and highly flexible cryptographic processor, Cryptoraptor, that is designed to support both today's and tomorrow's encryption standards. To the best of our knowledge, the proposed cryptographic processor supports the widest range of cryptographic algorithms compared to other solutions in the literature and is the only crypto-specific processor targeting the future standards as well. Unlike previous work, we aim for maximum throughput for all known encryption standards, and to support future standards as well. Our 1GHz design achieves a peak throughput of 128Gbps for AES-128 which is competitive with ASIC designs and has 25X and 160X higher throughput per area than CPU and GPU solutions, respectively.Electrical and Computer Engineerin